2005-01-14 Andrew Cagney <cagney@gnu.org>

[deliverable/binutils-gdb.git] / opcodes / ChangeLog

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6c249e2eba99e26053db2414fcb4b15bc4f7a105..f4edcb3dcadf5f435629807fbff418aaa834bd77 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,41 @@
+2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
+
+2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
+
+2005-01-10  Andreas Schwab  <schwab@suse.de>
+
+       * disassemble.c (disassemble_init_for_target) <case
+       bfd_arch_ia64>: Set skip_zeroes to 16.
+       <case bfd_arch_tic4x>: Set skip_zeroes to 32.
+
+2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
+
+       * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
+
+2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
+
+       * avr-dis.c: Prettyprint. Added printing of symbol names in all
+       memory references. Convert avr_operand() to C90 formatting.
+
+2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
+
+       * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
+
+2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
+
+       * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
+       (no_op_insn): Initialize array with instructions that have no
+       operands.
+       * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
+
+2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
+
+       * arm-dis.c: Correct top-level comment.
+
 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 
        * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the