h8500-opc.h \
m32r-desc.h m32r-opc.h \
mcore-opc.h \
+ openrisc-desc.h openrisc-opc.h \
sh-opc.h \
sysdep.h \
ia64-asmtab.h \
m10300-dis.c \
m10300-opc.c \
ns32k-dis.c \
+ openrisc-asm.c \
+ openrisc-desc.c \
+ openrisc-dis.c \
+ openrisc-ibld.c \
+ openrisc-opc.c \
pdp11-dis.c \
pdp11-opc.c \
pj-dis.c \
mips-opc.lo \
mips16-opc.lo \
ns32k-dis.lo \
+ openrisc-asm.lo \
+ openrisc-desc.lo \
+ openrisc-dis.lo \
+ openrisc-ibld.lo \
+ openrisc-opc.lo \
pdp11-dis.lo \
pdp11-opc.lo \
pj-dis.lo \
$(SHELL) ./config.status --recheck
CLEANFILES = \
- stamp-m32r stamp-fr30 \
+ stamp-m32r stamp-fr30 stamp-openrisc \
libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
CGENDIR = @cgendir@
+CPUDIR = $(CGENDIR)/cpu
CGEN = `if test -f ../guile/libguile/guile ; then echo ../guile/libguile/guile; else echo guile ; fi`
CGENFLAGS = -v
if CGEN_MAINT
M32R_DEPS = stamp-m32r
FR30_DEPS = stamp-fr30
+OPENRISC_DEPS = stamp-openrisc
else
M32R_DEPS =
FR30_DEPS =
+OPENRISC_DEPS =
endif
run-cgen:
# For now, require developers to configure with --enable-cgen-maint.
$(srcdir)/m32r-desc.h $(srcdir)/m32r-desc.c $(srcdir)/m32r-opc.h $(srcdir)/m32r-opc.c $(srcdir)/m32r-ibld.c $(srcdir)/m32r-opinst.c $(srcdir)/m32r-asm.c $(srcdir)/m32r-dis.c: $(M32R_DEPS)
@true
-stamp-m32r: $(CGENDEPS) $(CGENDIR)/m32r.cpu $(CGENDIR)/m32r.opc
+stamp-m32r: $(CGENDEPS) $(CPUDIR)/m32r.cpu $(CPUDIR)/m32r.opc
$(MAKE) run-cgen arch=m32r prefix=m32r options=opinst extrafiles=opinst
$(srcdir)/fr30-desc.h $(srcdir)/fr30-desc.c $(srcdir)/fr30-opc.h $(srcdir)/fr30-opc.c $(srcdir)/fr30-ibld.c $(srcdir)/fr30-asm.c $(srcdir)/fr30-dis.c: $(FR30_DEPS)
@true
-stamp-fr30: $(CGENDEPS) $(CGENDIR)/fr30.cpu $(CGENDIR)/fr30.opc
+stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc
$(MAKE) run-cgen arch=fr30 prefix=fr30 options= extrafiles=
+$(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
+ @true
+stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
+ $(MAKE) run-cgen arch=openrisc prefix=openrisc options= extrafiles=
+
ia64-gen: ia64-gen.o
$(LINK) ia64-gen.o $(LIBIBERTY)
ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
sysdep.h config.h $(INCDIR)/dis-asm.h $(INCDIR)/opcode/ns32k.h \
opintl.h
+openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen.h \
+ openrisc-opc.h opintl.h
+openrisc-desc.lo: openrisc-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen.h \
+ openrisc-opc.h opintl.h $(INCDIR)/libiberty.h
+openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
+ $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h
+openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
+ $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h
+openrisc-opc.lo: openrisc-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+ $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h $(INCDIR)/opcode/cgen.h \
+ openrisc-opc.h $(INCDIR)/libiberty.h
pdp11-dis.lo: pdp11-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
$(INCDIR)/ansidecl.h $(INCDIR)/opcode/pdp11.h
pdp11-opc.lo: pdp11-opc.c $(INCDIR)/opcode/pdp11.h