[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.

[deliverable/binutils-gdb.git] / opcodes / aarch64-opc-2.c

diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 1831fe4d1f71c95298ea1282bdd677fad511985c..dcb6f2c2bcb8acf08a28cd31483979d54e9d9a3e 100644 (file)
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -1,5 +1,5 @@
 /* This file is automatically generated by aarch64-gen.  Do not edit!  */
-/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
+/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
@@ -35,6 +35,7 @@ const struct aarch64_operand aarch64_operands[] =
   {AARCH64_OPND_CLASS_INT_REG, "Rt_SYS", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "an integer register"},
   {AARCH64_OPND_CLASS_INT_REG, "Rd_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "an integer or stack pointer register"},
   {AARCH64_OPND_CLASS_INT_REG, "Rn_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer or stack pointer register"},
+  {AARCH64_OPND_CLASS_INT_REG, "PAIRREG", OPD_F_HAS_EXTRACTOR, {}, "the second reg of a pair"},
   {AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_EXT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional extension"},
   {AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_SFT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional shift"},
   {AARCH64_OPND_CLASS_FP_REG, "Fd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a floating-point register"},
@@ -106,11 +107,12 @@ const struct aarch64_operand aarch64_operands[] =
   {AARCH64_OPND_CLASS_SYSTEM, "PSTATEFIELD", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a PSTATE field name"},
   {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_AT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an address translation operation specifier"},
   {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_DC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a data cache maintenance operation specifier"},
-  {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instructin cache maintenance operation specifier"},
+  {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_IC", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an instruction cache maintenance operation specifier"},
   {AARCH64_OPND_CLASS_SYSTEM, "SYSREG_TLBI", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a TBL invalidation operation specifier"},
   {AARCH64_OPND_CLASS_SYSTEM, "BARRIER", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a barrier option name"},
   {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_ISB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the ISB option name SY or an optional 4-bit unsigned immediate"},
-  {AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an prefetch operation specifier"},
+  {AARCH64_OPND_CLASS_SYSTEM, "PRFOP", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "a prefetch operation specifier"},
+  {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB option name CSYNC"},
   {AARCH64_OPND_CLASS_NIL, "", 0, {0}, "DUMMY"},
 };
 
@@ -120,73 +122,74 @@ const struct aarch64_operand aarch64_operands[] =
 static const unsigned op_enum_table [] =
 {
   0,
-  660,
-  661,
-  662,
-  665,
-  666,
-  667,
-  668,
-  669,
-  663,
-  664,
-  670,
-  671,
-  693,
-  694,
-  697,
-  703,
-  704,
-  707,
-  709,
-  710,
-  699,
-  700,
-  713,
-  715,
+  744,
+  745,
+  746,
+  749,
+  750,
+  751,
+  752,
   753,
+  747,
+  748,
   754,
   755,
-  756,
-  12,
-  510,
-  511,
-  776,
+  777,
   778,
-  780,
-  760,
   779,
-  777,
-  259,
-  499,
-  509,
-  508,
-  758,
-  505,
-  502,
-  495,
-  494,
-  501,
-  504,
-  506,
-  507,
-  768,
-  526,
-  529,
-  532,
+  782,
+  783,
+  784,
+  785,
+  786,
+  780,
+  781,
+  787,
+  788,
+  831,
+  832,
+  833,
+  834,
+  12,
+  543,
+  544,
+  1026,
+  1028,
+  1030,
+  838,
+  1029,
+  1027,
+  273,
+  531,
+  542,
+  541,
+  836,
+  538,
+  535,
   527,
-  530,
-  626,
-  160,
-  161,
+  526,
+  533,
+  534,
+  537,
+  539,
+  540,
+  846,
+  559,
+  562,
+  565,
+  560,
+  563,
+  688,
   162,
   163,
-  420,
-  595,
-  314,
-  316,
-  336,
-  338,
+  164,
+  165,
+  450,
+  629,
+  342,
+  344,
+  364,
+  366,
 };
 
 /* Given the opcode enumerator OP, return the pointer to the corresponding