[AArch64] Add SVE condition codes

[deliverable/binutils-gdb.git] / opcodes / cgen-opc.c

diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c
index caea03321fe5b6d4bdd309a9da6fa5f4e955f00b..543ce32397b9c784f881ccdaf5393260b3dfdd77 100644 (file)
--- a/opcodes/cgen-opc.c
+++ b/opcodes/cgen-opc.c
@@ -1,6 +1,6 @@
 /* CGEN generic opcode support.
 
-   Copyright (C) 1996-2015 Free Software Foundation, Inc.
+   Copyright (C) 1996-2016 Free Software Foundation, Inc.
 
    This file is part of libopcodes.
 
@@ -460,9 +460,10 @@ cgen_lookup_insn (CGEN_CPU_DESC cd,
   if (cd->int_insn_p)
     {
       info = NULL;
-      buf = (unsigned char *) alloca (cd->max_insn_bitsize / 8);
+      buf = (unsigned char *) xmalloc (cd->max_insn_bitsize / 8);
       cgen_put_insn_value (cd, buf, length, insn_int_value);
       base_insn = insn_int_value;
+      free (buf);
     }
   else
     {