remove armelf sanitization.

[deliverable/binutils-gdb.git] / opcodes / cgen-opc.in

diff --git a/opcodes/cgen-opc.in b/opcodes/cgen-opc.in
index af6e672b5b04add88408f048914b4fb2608ae57e..197daedd7070d91361f9c06e0a812796bb7ddaa0 100644 (file)
--- a/opcodes/cgen-opc.in
+++ b/opcodes/cgen-opc.in
@@ -1,7 +1,7 @@
 /* Generic opcode table support for targets using CGEN. -*- C -*-
    CGEN: Cpu tools GENerator
 
-This file is used to generate @arch@-opc.c.
+THIS FILE IS USED TO GENERATE @prefix@-opc.c.
 
 Copyright (C) 1998 Free Software Foundation, Inc.
 
@@ -18,8 +18,8 @@ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include "sysdep.h"
 #include <stdio.h>
@@ -27,7 +27,16 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #include "libiberty.h"
 #include "bfd.h"
 #include "symcat.h"
-#include "@arch@-opc.h"
+#include "@prefix@-opc.h"
+#include "opintl.h"
+
+/* The hash functions are recorded here to help keep assembler code out of
+   the disassembler and vice versa.  */
+
+static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int asm_hash_insn PARAMS ((const char *));
+static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int dis_hash_insn PARAMS ((const char *, unsigned long));
 
 /* Look up instruction INSN_VALUE and extract its fields.
    INSN, if non-null, is the insn table entry.
@@ -41,7 +50,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
    wasn't recognized.  */
 
 const CGEN_INSN *
-@arch@_cgen_lookup_insn (insn, insn_value, length, fields, alias_p)
+@arch@_cgen_lookup_insn (od, insn, insn_value, length, fields, alias_p)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN *insn;
      cgen_insn_t insn_value;
      int length;
@@ -61,13 +71,13 @@ const CGEN_INSN *
          buf[0] = insn_value;
          break;
        case 16:
-         if (cgen_current_endian == CGEN_ENDIAN_BIG)
+         if (CGEN_OPCODE_ENDIAN (od) == CGEN_ENDIAN_BIG)
            bfd_putb16 (insn_value, buf);
          else
            bfd_putl16 (insn_value, buf);
          break;
        case 32:
-         if (cgen_current_endian == CGEN_ENDIAN_BIG)
+         if (CGEN_OPCODE_ENDIAN (od) == CGEN_ENDIAN_BIG)
            bfd_putb32 (insn_value, buf);
          else
            bfd_putl32 (insn_value, buf);
@@ -82,7 +92,7 @@ const CGEN_INSN *
       /* The instructions are stored in hash lists.
         Pick the first one and keep trying until we find the right one.  */
 
-      insn_list = CGEN_DIS_LOOKUP_INSN (buf, insn_value);
+      insn_list = CGEN_DIS_LOOKUP_INSN (od, buf, insn_value);
       while (insn_list != NULL)
        {
          insn = insn_list->insn;
@@ -95,8 +105,10 @@ const CGEN_INSN *
                 extract handler.  */
              if ((insn_value & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn))
                {
-                 int elength = (*CGEN_EXTRACT_FN (insn)) (insn, NULL,
-                                                          insn_value, fields);
+                 /* ??? 0 is passed for `pc' */
+                 int elength = (*CGEN_EXTRACT_FN (insn)) (od, insn, NULL,
+                                                          insn_value, fields,
+                                                          (bfd_vma) 0);
                  if (elength > 0)
                    {
                      /* sanity check */
@@ -120,7 +132,9 @@ const CGEN_INSN *
       if (length != CGEN_INSN_BITSIZE (insn))
        abort ();
 
-      length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, fields);
+      /* ??? 0 is passed for `pc' */
+      length = (*CGEN_EXTRACT_FN (insn)) (od, insn, NULL, insn_value, fields,
+                                         (bfd_vma) 0);
       /* Sanity check: must succeed.
         Could relax this later if it ever proves useful.  */
       if (length == 0)
@@ -136,7 +150,8 @@ const CGEN_INSN *
    in.  */
 
 void
-@arch@_cgen_get_insn_operands (insn, fields, indices)
+@arch@_cgen_get_insn_operands (od, insn, fields, indices)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN * insn;
      const CGEN_FIELDS * fields;
      int *indices;
@@ -153,7 +168,8 @@ void
       if (op == NULL)
        indices[i] = CGEN_OPERAND_INSTANCE_INDEX (opinst);
       else
-       indices[i] = @arch@_cgen_get_operand (CGEN_OPERAND_INDEX (op), fields);
+       indices[i] = @arch@_cgen_get_int_operand (CGEN_OPERAND_INDEX (op),
+                                                 fields);
     }
 }
 
@@ -166,7 +182,8 @@ void
    recognized.  */
 
 const CGEN_INSN *
-@arch@_cgen_lookup_get_insn_operands (insn, insn_value, length, indices)
+@arch@_cgen_lookup_get_insn_operands (od, insn, insn_value, length, indices)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN *insn;
      cgen_insn_t insn_value;
      int length;
@@ -176,11 +193,11 @@ const CGEN_INSN *
 
   /* Pass non-zero for ALIAS_P only if INSN != NULL.
      If INSN == NULL, we want a real insn.  */
-  insn = @arch@_cgen_lookup_insn (insn, insn_value, length, &fields,
+  insn = @arch@_cgen_lookup_insn (od, insn, insn_value, length, &fields,
                                  insn != NULL);
   if (! insn)
     return NULL;
 
-  @arch@_cgen_get_insn_operands (insn, &fields, indices);
+  @arch@_cgen_get_insn_operands (od, insn, &fields, indices);
   return insn;
 }