/* Generic opcode table support for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-This file is used to generate @arch@-opc.c.
+THIS FILE IS USED TO GENERATE @prefix@-opc.c.
Copyright (C) 1998 Free Software Foundation, Inc.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "sysdep.h"
#include <stdio.h>
#include "libiberty.h"
#include "bfd.h"
#include "symcat.h"
-#include "@arch@-opc.h"
+#include "@prefix@-opc.h"
+#include "opintl.h"
+
+/* Used by the ifield rtx function. */
+#define FLD(f) (fields->f)
+
+/* The hash functions are recorded here to help keep assembler code out of
+ the disassembler and vice versa. */
+
+static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int asm_hash_insn PARAMS ((const char *));
+static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
/* Look up instruction INSN_VALUE and extract its fields.
- If non-null INSN is the insn table entry.
+ INSN, if non-null, is the insn table entry.
Otherwise INSN_VALUE is examined to compute it.
LENGTH is the bit length of INSN_VALUE if known, otherwise 0.
+ 0 is only valid if `insn == NULL && ! CGEN_INT_INSN_P'.
+ If INSN != NULL, LENGTH must be valid.
ALIAS_P is non-zero if alias insns are to be included in the search.
- The result a pointer to the insn table entry, or NULL if the instruction
+
+ The result is a pointer to the insn table entry, or NULL if the instruction
wasn't recognized. */
const CGEN_INSN *
-@arch@_cgen_lookup_insn (insn, insn_value, length, fields, alias_p)
+@arch@_cgen_lookup_insn (od, insn, insn_value, length, fields, alias_p)
+ CGEN_OPCODE_DESC od;
const CGEN_INSN *insn;
- cgen_insn_t insn_value;
+ CGEN_INSN_BYTES insn_value;
int length;
CGEN_FIELDS *fields;
+ int alias_p;
{
- char buf[16];
+ unsigned char buf[CGEN_MAX_INSN_SIZE];
+ unsigned char *bufp;
+ CGEN_INSN_INT base_insn;
+#if CGEN_INT_INSN_P
+ CGEN_EXTRACT_INFO *info = NULL;
+#else
+ CGEN_EXTRACT_INFO ex_info;
+ CGEN_EXTRACT_INFO *info = &ex_info;
+#endif
+
+#if CGEN_INT_INSN_P
+ cgen_put_insn_value (od, buf, length, insn_value);
+ bufp = buf;
+ base_insn = insn_value; /*???*/
+#else
+ ex_info.dis_info = NULL;
+ ex_info.insn_bytes = insn_value;
+ ex_info.valid = -1;
+ base_insn = cgen_get_insn_value (od, buf, length);
+ bufp = insn_value;
+#endif
if (!insn)
{
const CGEN_INSN_LIST *insn_list;
-#ifdef CGEN_INT_INSN
- switch (length)
- {
- case 8:
- buf[0] = insn_value;
- break;
- case 16:
- if (cgen_current_endian == CGEN_ENDIAN_BIG)
- bfd_putb16 (insn_value, buf);
- else
- bfd_putl16 (insn_value, buf);
- break;
- case 32:
- if (cgen_current_endian == CGEN_ENDIAN_BIG)
- bfd_putb32 (insn_value, buf);
- else
- bfd_putl32 (insn_value, buf);
- break;
- default:
- abort ();
- }
-#else
- abort (); /* FIXME: unfinished */
-#endif
-
/* The instructions are stored in hash lists.
Pick the first one and keep trying until we find the right one. */
- insn_list = CGEN_DIS_LOOKUP_INSN (buf, insn_value);
+ insn_list = CGEN_DIS_LOOKUP_INSN (od, bufp, base_insn);
while (insn_list != NULL)
{
insn = insn_list->insn;
/* Basic bit mask must be correct. */
/* ??? May wish to allow target to defer this check until the
extract handler. */
- if ((insn_value & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn))
+ if ((base_insn & CGEN_INSN_BASE_MASK (insn))
+ == CGEN_INSN_BASE_VALUE (insn))
{
- length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, fields);
- if (length > 0)
- return insn;
+ /* ??? 0 is passed for `pc' */
+ int elength = (*CGEN_EXTRACT_FN (insn)) (od, insn, info,
+ base_insn, fields,
+ (bfd_vma) 0);
+ if (elength > 0)
+ {
+ /* sanity check */
+ if (length != 0 && length != elength)
+ abort ();
+ return insn;
+ }
}
}
if (! alias_p
&& CGEN_INSN_ATTR (insn, CGEN_INSN_ALIAS))
abort ();
+ /* Sanity check: length must be correct. */
+ if (length != CGEN_INSN_BITSIZE (insn))
+ abort ();
- length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, fields);
- if (length > 0)
- return insn;
+ /* ??? 0 is passed for `pc' */
+ length = (*CGEN_EXTRACT_FN (insn)) (od, insn, info, base_insn, fields,
+ (bfd_vma) 0);
+ /* Sanity check: must succeed.
+ Could relax this later if it ever proves useful. */
+ if (length == 0)
+ abort ();
+ return insn;
}
return NULL;
}
-/* Fill in the operand instances used by insn INSN_VALUE.
- If non-null INS is the insn table entry.
- Otherwise INSN_VALUE is examined to compute it.
- LENGTH is the number of bits in INSN_VALUE if known, otherwise 0.
+/* Fill in the operand instances used by INSN whose operands are FIELDS.
INDICES is a pointer to a buffer of MAX_OPERAND_INSTANCES ints to be filled
- in.
- The result a pointer to the insn table entry, or NULL if the instruction
- wasn't recognized. */
+ in. */
-const CGEN_INSN *
-@arch@_cgen_get_insn_operands (insn, insn_value, length, indices)
- const CGEN_INSN *insn;
- cgen_insn_t insn_value;
- int length;
+void
+@arch@_cgen_get_insn_operands (od, insn, fields, indices)
+ CGEN_OPCODE_DESC od;
+ const CGEN_INSN * insn;
+ const CGEN_FIELDS * fields;
int *indices;
{
- CGEN_FIELDS fields;
const CGEN_OPERAND_INSTANCE *opinst;
int i;
- /* FIXME: ALIAS insns are in transition from being record in the insn table
- to being recorded separately as macros. They don't have semantic code
- so they can't be used here. Thus we currently always ignore the INSN
- argument. */
- insn = @arch@_cgen_lookup_insn (NULL, insn_value, length, &fields, 0);
- if (! insn)
- return NULL;
-
for (i = 0, opinst = CGEN_INSN_OPERANDS (insn);
opinst != NULL
&& CGEN_OPERAND_INSTANCE_TYPE (opinst) != CGEN_OPERAND_INSTANCE_END;
if (op == NULL)
indices[i] = CGEN_OPERAND_INSTANCE_INDEX (opinst);
else
- indices[i] = @arch@_cgen_get_operand (CGEN_OPERAND_INDEX (op), &fields);
+ indices[i] = @arch@_cgen_get_int_operand (CGEN_OPERAND_INDEX (op),
+ fields);
}
+}
+
+/* Cover function to @arch@_cgen_get_insn_operands when either INSN or FIELDS
+ isn't known.
+ The INSN, INSN_VALUE, and LENGTH arguments are passed to
+ @arch@_cgen_lookup_insn unchanged.
+
+ The result is the insn table entry or NULL if the instruction wasn't
+ recognized. */
+
+const CGEN_INSN *
+@arch@_cgen_lookup_get_insn_operands (od, insn, insn_value, length, indices)
+ CGEN_OPCODE_DESC od;
+ const CGEN_INSN *insn;
+ CGEN_INSN_BYTES insn_value;
+ int length;
+ int *indices;
+{
+ CGEN_FIELDS fields;
+
+ /* Pass non-zero for ALIAS_P only if INSN != NULL.
+ If INSN == NULL, we want a real insn. */
+ insn = @arch@_cgen_lookup_insn (od, insn, insn_value, length, &fields,
+ insn != NULL);
+ if (! insn)
+ return NULL;
+ @arch@_cgen_get_insn_operands (od, insn, &fields, indices);
return insn;
}
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