/* Disassembler code for CR16.
- Copyright 2007, 2008, 2009, 2012, 2013 Free Software Foundation, Inc.
+ Copyright (C) 2007-2017 Free Software Foundation, Inc.
Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com).
This file is part of GAS, GDB and the GNU binutils.
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
#include "opcode/cr16.h"
#include "libiberty.h"
cinv_entry;
/* CR16 'cinv' options mapping. */
-const cinv_entry cr16_cinvs[] =
+static const cinv_entry cr16_cinvs[] =
{
{"cinv[i]", "cinv [i]"},
{"cinv[i,u]", "cinv [i,u]"},
REG_ARG_TYPE;
/* Current opcode table entry we're disassembling. */
-const inst *instruction;
+static const inst *instruction;
/* Current instruction we're disassembling. */
-ins cr16_currInsn;
+static ins cr16_currInsn;
/* The current instruction is read into 3 consecutive words. */
-wordU cr16_words[3];
+static wordU cr16_words[3];
/* Contains all words in appropriate order. */
-ULONGLONG cr16_allWords;
+static ULONGLONG cr16_allWords;
/* Holds the current processed argument number. */
-int processing_argument_number;
+static int processing_argument_number;
/* Nonzero means a IMM4 instruction. */
-int imm4flag;
+static int imm4flag;
/* Nonzero means the instruction's original size is
incremented (escape sequence is used). */
-int size_changed;
+static int size_changed;
/* Print the constant expression length. */
/* Search for a matching opcode. Return 1 for success, 0 for failure. */
int
-match_opcode (void)
+cr16_match_opcode (void)
{
unsigned long mask;
- /* The instruction 'constant' opcode doewsn't exceed 32 bits. */
+ /* The instruction 'constant' opcode doesn't exceed 32 bits. */
unsigned long doubleWord = (cr16_words[1]
+ (cr16_words[0] << 16)) & 0xffffffff;
switch (a->type)
{
case arg_r:
- p = makelongparameter (cr16_allWords,
+ p = makelongparameter (cr16_allWords,
inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->r = p.val;
break;
case arg_ic:
- p = makelongparameter (cr16_allWords,
+ p = makelongparameter (cr16_allWords,
inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->constant = p.val;
}
else if (instruction->size == 2)
{
- p = makelongparameter (cr16_allWords, inst_bit_size - 16,
+ p = makelongparameter (cr16_allWords, inst_bit_size - 16,
inst_bit_size);
a->constant = p.val;
}
/* Build the instruction's arguments. */
void
-make_instruction (void)
+cr16_make_instruction (void)
{
int i;
unsigned int shift;
for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
cr16_words[i] = get_word_at_PC (mem, info);
- cr16_allWords = ((ULONGLONG) cr16_words[0] << 32)
+ cr16_allWords = ((ULONGLONG) cr16_words[0] << 32)
+ ((unsigned long) cr16_words[1] << 16) + cr16_words[2];
}
/* Retrieve the encoding from current memory location. */
get_words_at_PC (memaddr, info);
/* Find a matching opcode in table. */
- is_decoded = match_opcode ();
+ is_decoded = cr16_match_opcode ();
/* If found, print the instruction's mnemonic and arguments. */
- if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
+ if (is_decoded > 0 && (cr16_words[0] != 0 || cr16_words[1] != 0))
{
if (strneq (instruction->mnemonic, "cinv", 4))
info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic));
if (((cr16_currInsn.nargs = get_number_of_operands ()) != 0)
&& ! (IS_INSN_MNEMONIC ("b")))
info->fprintf_func (info->stream, "\t");
- make_instruction ();
+ cr16_make_instruction ();
/* For push/pop/pushrtn with RA instructions. */
if ((INST_HAS_REG_LIST) && ((cr16_words[0] >> 7) & 0x1))
cr16_currInsn.nargs +=1;