/* Disassembler code for CRX.
- Copyright 2004, 2005, 2006, 2007, 2012 Free Software Foundation, Inc.
+ Copyright (C) 2004-2018 Free Software Foundation, Inc.
Contributed by Tomer Levi, NSC, Israel.
Written by Tomer Levi.
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
-#include "dis-asm.h"
#include "sysdep.h"
+#include "disassemble.h"
#include "opcode/crx.h"
/* String to print when opcode was not matched. */
cinv_entry;
/* CRX 'cinv' options. */
-const cinv_entry crx_cinvs[] =
+static const cinv_entry crx_cinvs[] =
{
- {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, {"[d,u]", 5},
- {"[d,i]", 6}, {"[d,i,u]", 7}, {"[b]", 8},
- {"[b,i]", 10}, {"[b,i,u]", 11}, {"[b,d]", 12},
+ {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, {"[d,u]", 5},
+ {"[d,i]", 6}, {"[d,i,u]", 7}, {"[b]", 8},
+ {"[b,i]", 10}, {"[b,i,u]", 11}, {"[b,d]", 12},
{"[b,d,u]", 13}, {"[b,d,i]", 14}, {"[b,d,i,u]", 15}
};
/* CO-Processor register (c<N>). */
COP_ARG,
/* CO-Processor special register (cs<N>). */
- COPS_ARG
+ COPS_ARG
}
REG_ARG_TYPE;
/* Number of valid 'cinv' instruction options. */
-int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
+static int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
/* Current opcode table entry we're disassembling. */
-const inst *instruction;
+static const inst *instruction;
/* Current instruction we're disassembling. */
-ins currInsn;
+static ins currInsn;
/* The current instruction is read into 3 consecutive words. */
-wordU words[3];
+static wordU words[3];
/* Contains all words in appropriate order. */
-ULONGLONG allWords;
+static ULONGLONG allWords;
/* Holds the current processed argument number. */
-int processing_argument_number;
+static int processing_argument_number;
/* Nonzero means a CST4 instruction. */
-int cst4flag;
+static int cst4flag;
/* Nonzero means the instruction's original size is
incremented (escape sequence is used). */
-int size_changed;
+static int size_changed;
static int get_number_of_operands (void);
static argtype getargtype (operand_type);
void
getregliststring (int mask, char *string, enum REG_ARG_TYPE core_cop)
{
- char temp_string[5];
+ char temp_string[16];
int i;
string[0] = '{';
else if (INST_HAS_REG_LIST)
{
- REG_ARG_TYPE reg_arg_type = IS_INSN_TYPE (COP_REG_INS) ?
- COP_ARG : IS_INSN_TYPE (COPS_REG_INS) ?
+ REG_ARG_TYPE reg_arg_type = IS_INSN_TYPE (COP_REG_INS) ?
+ COP_ARG : IS_INSN_TYPE (COPS_REG_INS) ?
COPS_ARG : (instruction->flags & USER_REG) ?
USER_REG_ARG : REG_ARG;
/* Prints the instruction by calling print_arguments after proper matching. */
int
-print_insn_crx (memaddr, info)
- bfd_vma memaddr;
- struct disassemble_info *info;
+print_insn_crx (bfd_vma memaddr, struct disassemble_info *info)
{
int is_decoded; /* Nonzero means instruction has a match. */
/* Find a matching opcode in table. */
is_decoded = match_opcode ();
/* If found, print the instruction's mnemonic and arguments. */
- if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0)
+ if (is_decoded > 0 && (words[0] != 0 || words[1] != 0))
{
info->fprintf_func (info->stream, "%s", instruction->mnemonic);
if ((currInsn.nargs = get_number_of_operands ()) != 0)