You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
-Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <ansidecl.h>
#include "sysdep.h"
#include "dis-asm.h"
+#include "libhppa.h"
#include "opcode/hppa.h"
-/* Initializer for an array of names of registers.
- There should be NUM_REGS strings in this initializer. */
-
-#define REGISTER_NAMES \
- {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
- "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
- "r20", "r21", "r22", "arg3", "arg2", "arg1", "arg0", "dp", "ret0", "ret1", \
- "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
- "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
- "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
- "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
- "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
- "fp4", "fp5", "fp6", "fp7", "fp8", \
- "fp9", "fp10", "fp11", "fp12", "fp13", "fp14", "fp15", \
- "fp16", "fp17", "fp18", "fp19", "fp20", "fp21", "fp22", "fp23", \
- "fp24", "fp25", "fp26", "fp27", "fp28", "fp29", "fp30", "fp31"}
-
-static const char *const reg_names[] = REGISTER_NAMES;
+/* Integer register names, indexed by the numbers which appear in the
+ opcodes. */
+static const char *const reg_names[] =
+ {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
+ "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
+ "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
+ "sp", "r31"};
+
+/* Floating point register names, indexed by the numbers which appear in the
+ opcodes. */
+static const char *const fp_reg_names[] =
+ {"fpsr", "fpe2", "fpe4", "fpe6",
+ "fr4", "fr5", "fr6", "fr7", "fr8",
+ "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
+ "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
+ "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
typedef unsigned int CORE_ADDR;
}
static void
-fput_reg_r (reg, info)
+fput_fp_reg (reg, info)
unsigned reg;
disassemble_info *info;
{
- (*info->fprintf_func) (info->stream, "%sR", reg ? reg_names[reg] : "r0");
+ (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
+}
+
+static void
+fput_fp_reg_r (reg, info)
+ unsigned reg;
+ disassemble_info *info;
+{
+ /* Special case floating point exception registers. */
+ if (reg < 4)
+ (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
+ else
+ (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
+ : "fr0");
}
static void
/* Routines to extract various sized constants out of hppa
instructions. */
-/* This assumes that no garbage lies outside of the lower bits of
- value. */
-
-static int
-sign_extend (val, bits)
- unsigned val, bits;
-{
- return (int)(val >> (bits - 1) ? (-1 << bits) | val : val);
-}
-
-/* For many immediate values the sign bit is the low bit! */
-
-static int
-low_sign_extend (val, bits)
- unsigned val, bits;
-{
- return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
-}
-/* extract the immediate field from a ld{bhw}s instruction */
-
-#if 0 /* not used */
-static unsigned
-get_field (val, from, to)
- unsigned val, from, to;
-{
- val = val >> (31 - to);
- return val & ((1 << (32 - from)) - 1);
-}
-
-static unsigned
-set_field (val, from, to, new_val)
- unsigned *val, from, to, new_val;
-{
- unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
- return *val = (*val & mask) | (new_val << (31 - from));
-}
-#endif
-
/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
static int
extract_3 (word)
return low_sign_extend (word & MASK_14, 14);
}
-#if 0
-/* deposit a 14 bit constant in a word */
-static unsigned
-deposit_14 (opnd, word)
- int opnd;
- unsigned word;
-{
- unsigned sign = (opnd < 0 ? 1 : 0);
-
- return word | ((unsigned)opnd << 1 & MASK_14) | sign;
-}
-#endif
-
/* extract a 21 bit constant */
static int
return sign_extend (val, 21) << 11;
}
-#if 0
-/* deposit a 21 bit constant in a word. Although 21 bit constants are
- usually the top 21 bits of a 32 bit constant, we assume that only
- the low 21 bits of opnd are relevant */
-
-static unsigned
-deposit_21 (opnd, word)
- unsigned opnd, word;
-{
- unsigned val = 0;
-
- val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
- val <<= 2;
- val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
- val <<= 2;
- val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
- val <<= 11;
- val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
- val <<= 1;
- val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
- return word | val;
-}
-#endif
-
/* extract a 12 bit constant from branch instructions */
static int
bfd_vma memaddr;
disassemble_info *info;
{
- unsigned int insn, i, op;
- FILE *stream = info->stream;
+ bfd_byte buffer[4];
+ unsigned int insn, i;
{
int status =
- (*info->read_memory_func) (memaddr, (bfd_byte*) &insn, sizeof (insn),
- info);
+ (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
if (status != 0)
{
(*info->memory_error_func) (status, memaddr, info);
}
}
+ insn = bfd_getb32 (buffer);
+
for (i = 0; i < NUMOPCODES; ++i)
{
const struct pa_opcode *opcode = &pa_opcodes[i];
(*info->fprintf_func) (info->stream, "%s", opcode->name);
- if (!strchr ("cCY<?!@-+&U>~nZFIMad", opcode->args[0]))
+ if (!strchr ("cfCY<?!@-+&U>~nHNZFIMadu|", opcode->args[0]))
(*info->fprintf_func) (info->stream, " ");
for (s = opcode->args; *s != '\0'; ++s)
{
break;
case 'X':
if (GET_FIELD (insn, 25, 25))
- fput_reg_r (GET_FIELD (insn, 11, 15), info);
+ fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
else
- fput_reg (GET_FIELD (insn, 11, 15), info);
+ fput_fp_reg (GET_FIELD (insn, 11, 15), info);
break;
case 'b':
fput_reg (GET_FIELD (insn, 6, 10), info);
break;
case 'E':
if (GET_FIELD (insn, 25, 25))
- fput_reg_r (GET_FIELD (insn, 6, 10), info);
+ fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
else
- fput_reg (GET_FIELD (insn, 6, 10), info);
+ fput_fp_reg (GET_FIELD (insn, 6, 10), info);
break;
case 't':
fput_reg (GET_FIELD (insn, 27, 31), info);
break;
case 'v':
if (GET_FIELD (insn, 25, 25))
- fput_reg_r (GET_FIELD (insn, 27, 31), info);
+ fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
else
- fput_reg (GET_FIELD (insn, 27, 31), info);
+ fput_fp_reg (GET_FIELD (insn, 27, 31), info);
break;
- case '4':
- fput_creg (GET_FIELD (insn, 6, 10), info);
+ case 'y':
+ fput_fp_reg (GET_FIELD (insn, 27, 31), info);
break;
+ case '4':
+ {
+ int reg = GET_FIELD (insn, 6, 10);
+
+ reg |= (GET_FIELD (insn, 26, 26) << 4);
+ fput_fp_reg (reg, info);
+ break;
+ }
case '6':
- fput_reg (GET_FIELD (insn, 11, 15), info);
- break;
+ {
+ int reg = GET_FIELD (insn, 11, 15);
+
+ reg |= (GET_FIELD (insn, 26, 26) << 4);
+ fput_fp_reg (reg, info);
+ break;
+ }
case '7':
- fput_reg (GET_FIELD (insn, 27, 31), info);
- break;
+ {
+ int reg = GET_FIELD (insn, 27, 31);
+
+ reg |= (GET_FIELD (insn, 26, 26) << 4);
+ fput_fp_reg (reg, info);
+ break;
+ }
case '8':
- fput_reg (GET_FIELD (insn, 16, 20), info);
- break;
+ {
+ int reg = GET_FIELD (insn, 16, 20);
+
+ reg |= (GET_FIELD (insn, 26, 26) << 4);
+ fput_fp_reg (reg, info);
+ break;
+ }
case '9':
- fput_reg (GET_FIELD (insn, 21, 25), info);
- break;
+ {
+ int reg = GET_FIELD (insn, 21, 25);
+
+ reg |= (GET_FIELD (insn, 26, 26) << 4);
+ fput_fp_reg (reg, info);
+ break;
+ }
case '5':
fput_const (extract_5_load (insn), info);
break;
case 's':
- fprintf_filtered (stream, "sr%d", GET_FIELD (insn, 16, 17));
+ (*info->fprintf_func) (info->stream,
+ "sr%d", GET_FIELD (insn, 16, 17));
break;
case 'S':
(*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
info);
break;
case '?':
- fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) + 8],
- info);
+ fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
+ + GET_FIELD (insn, 4, 4) * 8], info);
break;
case '@':
- fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) + 8],
- info);
+ fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
+ + GET_FIELD (insn, 4, 4) * 8], info);
break;
case 'a':
- (*info->fprintf_func) (info->stream, "%s",
- compare_cond_names[GET_COND (insn)]);
+ (*info->fprintf_func) (info->stream, "%s ",
+ compare_cond_names[GET_COND (insn)]);
break;
case 'd':
+ (*info->fprintf_func) (info->stream, "%s ",
+ add_cond_names[GET_COND (insn)]);
+ break;
case '!':
(*info->fprintf_func) (info->stream, "%s",
add_cond_names[GET_FIELD (insn, 16, 18)]);
(*info->fprintf_func) (info->stream, "%s ",
unit_cond_names[GET_COND (insn)]);
break;
+ case '|':
case '>':
case '~':
- (*info->fprintf_func) (info->stream, "%s ",
- shift_cond_names[GET_FIELD (insn, 16, 18)]);
+ (*info->fprintf_func)
+ (info->stream, "%s",
+ shift_cond_names[GET_FIELD (insn, 16, 18)]);
+
+ /* If the next character in args is 'n', it will handle
+ putting out the space. */
+ if (s[1] != 'n')
+ (*info->fprintf_func) (info->stream, " ");
break;
case 'V':
fput_const (extract_5_store (insn), info);
break;
+ case 'r':
+ fput_const (extract_5r_store (insn), info);
+ break;
case 'R':
fput_const (extract_5R_store (insn), info);
break;
else
(*info->fprintf_func) (info->stream, " ");
break;
+ case 'N':
+ if ((insn & 0x20) && s[1])
+ (*info->fprintf_func) (info->stream, ",n ");
+ else if (insn & 0x20)
+ (*info->fprintf_func) (info->stream, ",n");
+ else if (s[1])
+ (*info->fprintf_func) (info->stream, " ");
+ break;
case 'w':
(*info->print_address_func) (memaddr + 8 + extract_12 (insn),
info);
break;
case 'W':
- /* don't interpret an address if it's an external branch
- instruction. */
- op = GET_FIELD (insn, 0, 5);
- if (op != 0x38 /* be */ && op != 0x39 /* ble */)
- (*info->print_address_func) ((memaddr + 8
- + extract_17 (insn)),
- info);
- else
- fput_const (extract_17 (insn), info);
+ /* 17 bit PC-relative branch. */
+ (*info->print_address_func) ((memaddr + 8
+ + extract_17 (insn)),
+ info);
+ break;
+ case 'z':
+ /* 17 bit displacement. This is an offset from a register
+ so it gets disasssembled as just a number, not any sort
+ of address. */
+ fput_const (extract_17 (insn), info);
break;
case 'p':
(*info->fprintf_func) (info->stream, "%d",
case 'o':
fput_const (GET_FIELD (insn, 6, 20), info);
break;
+ case '3':
+ {
+ int reg = GET_FIELD (insn, 21, 22);
+ reg |= GET_FIELD (insn, 16, 18) << 2;
+ if (GET_FIELD (insn, 23, 23) != 0)
+ fput_fp_reg_r (reg, info);
+ else
+ fput_fp_reg (reg, info);
+ break;
+ }
+
case '2':
fput_const ((GET_FIELD (insn, 6, 22) << 5 |
GET_FIELD (insn, 27, 31)), info);
GET_FIELD (insn, 27, 31)), info);
break;
case 'u':
- (*info->fprintf_func) (info->stream, "%d", GET_FIELD (insn, 23, 25));
+ (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
break;
case 'F':
- /* if no destination completer, need a space here */
- if (GET_FIELD (insn, 21, 22) == 1)
+ /* if no destination completer and not before a completer
+ for fcmp, need a space here */
+ if (GET_FIELD (insn, 21, 22) == 1 || s[1] == 'M')
fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
info);
else
(*info->fprintf_func) (info->stream, "%s ",
- float_format_names[GET_FIELD
- (insn, 19, 20)]);
+ float_format_names[GET_FIELD
+ (insn, 19, 20)]);
break;
case 'G':
(*info->fprintf_func) (info->stream, "%s ",
17, 18)]);
break;
case 'H':
- fputs_filtered (float_format_names[GET_FIELD
- (insn, 26, 26)], info);
+ if (GET_FIELD (insn, 26, 26) == 1)
+ (*info->fprintf_func) (info->stream, "%s ",
+ float_format_names[0]);
+ else
+ (*info->fprintf_func) (info->stream, "%s ",
+ float_format_names[1]);
break;
case 'I':
- /* if no destination completer, need a space here */
- if (GET_FIELD (insn, 21, 22) == 1)
+ /* if no destination completer and not before a completer
+ for fcmp, need a space here */
+ if (GET_FIELD (insn, 21, 22) == 1 || s[1] == 'M')
fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
info);
else
- fprintf_filtered (stream, "%s ",
- float_format_names[GET_FIELD
- (insn, 20, 20)]);
+ (*info->fprintf_func) (info->stream, "%s ",
+ float_format_names[GET_FIELD
+ (insn, 20, 20)]);
break;
case 'J':
if (GET_FIELD (insn, 24, 24))
- fput_reg_r (GET_FIELD (insn, 6, 10), info);
+ fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
else
- fput_reg (GET_FIELD (insn, 6, 10), info);
+ fput_fp_reg (GET_FIELD (insn, 6, 10), info);
break;
case 'K':
if (GET_FIELD (insn, 19, 19))
- fput_reg_r (GET_FIELD (insn, 11, 15), info);
+ fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
else
- fput_reg (GET_FIELD (insn, 11, 15), info);
+ fput_fp_reg (GET_FIELD (insn, 11, 15), info);
break;
case 'M':
- fputs_filtered (float_comp_names[GET_FIELD (insn, 27, 31)],
- info);
+ (*info->fprintf_func) (info->stream, "%s ",
+ float_comp_names[GET_FIELD
+ (insn, 27, 31)]);
break;
default:
(*info->fprintf_func) (info->stream, "%c", *s);