Add missing break statement for case elfcpp::R_X86_64_PLTOFF64.

[deliverable/binutils-gdb.git] / opcodes / i386-dis.c

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 3eedac9ab6aa312bfe6e0858574a855eaa76b139..0e076060e0ed643696f5557b16ef0d8f7b5e94fe 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1,7 +1,5 @@
 /* Print i386 instructions for GDB, the GNU debugger.
-   Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013
-   Free Software Foundation, Inc.
+   Copyright (C) 1988-2014 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -429,7 +427,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define MaskVex { OP_VEX, mask_mode }
 
 #define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode }
+#define MVexVSIBDQWpX { OP_M, vex_vsib_d_w_d_mode }
 #define MVexVSIBQWpX { OP_M, vex_vsib_q_w_dq_mode }
+#define MVexVSIBQDWpX { OP_M, vex_vsib_q_w_d_mode }
 
 /* Used handle "rep" prefix for string instructions.  */
 #define Xbr { REP_Fixup, eSI_reg }
@@ -558,8 +558,12 @@ enum
 
   /* Similar to vex_w_dq_mode, with VSIB dword indices.  */
   vex_vsib_d_w_dq_mode,
+  /* Similar to vex_vsib_d_w_dq_mode, with smaller memory.  */
+  vex_vsib_d_w_d_mode,
   /* Similar to vex_w_dq_mode, with VSIB qword indices.  */
   vex_vsib_q_w_dq_mode,
+  /* Similar to vex_vsib_q_w_dq_mode, with smaller memory.  */
+  vex_vsib_q_w_d_mode,
 
   /* scalar, ignore vector length.  */
   scalar_mode,
@@ -715,6 +719,8 @@ enum
   MOD_8D = 0,
   MOD_C6_REG_7,
   MOD_C7_REG_7,
+  MOD_FF_REG_3,
+  MOD_FF_REG_5,
   MOD_0F01_REG_0,
   MOD_0F01_REG_1,
   MOD_0F01_REG_2,
@@ -767,6 +773,9 @@ enum
   MOD_0FB2,
   MOD_0FB4,
   MOD_0FB5,
+  MOD_0FC7_REG_3,
+  MOD_0FC7_REG_4,
+  MOD_0FC7_REG_5,
   MOD_0FC7_REG_6,
   MOD_0FC7_REG_7,
   MOD_0FD7,
@@ -882,6 +891,7 @@ enum
   PREFIX_0FAE_REG_1,
   PREFIX_0FAE_REG_2,
   PREFIX_0FAE_REG_3,
+  PREFIX_0FAE_REG_7,
   PREFIX_0FB8,
   PREFIX_0FBC,
   PREFIX_0FBD,
@@ -3229,9 +3239,9 @@ static const struct dis386 reg_table[][8] = {
     { "incQ",  { Evh1 } },
     { "decQ",  { Evh1 } },
     { "call{T|}", { indirEv, BND } },
-    { "Jcall{T|}", { indirEp } },
+    { MOD_TABLE (MOD_FF_REG_3) },
     { "jmp{T|}", { indirEv, BND } },
-    { "Jjmp{T|}", { indirEp } },
+    { MOD_TABLE (MOD_FF_REG_5) },
     { "pushU", { stackEv } },
     { Bad_Opcode },
   },
@@ -3352,9 +3362,9 @@ static const struct dis386 reg_table[][8] = {
     { Bad_Opcode },
     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
     { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { MOD_TABLE (MOD_0FC7_REG_3) },
+    { MOD_TABLE (MOD_0FC7_REG_4) },
+    { MOD_TABLE (MOD_0FC7_REG_5) },
     { MOD_TABLE (MOD_0FC7_REG_6) },
     { MOD_TABLE (MOD_0FC7_REG_7) },
   },
@@ -3757,6 +3767,13 @@ static const struct dis386 prefix_table[][4] = {
     { "wrgsbase", { Ev } },
   },
 
+  /* PREFIX_0FAE_REG_7 */
+  {
+    { "clflush",       { Mb } },
+    { Bad_Opcode },
+    { "clflushopt",    { Mb } },
+  },
+
   /* PREFIX_0FB8 */
   {
     { Bad_Opcode },
@@ -11049,6 +11066,14 @@ static const struct dis386 mod_table[][2] = {
     { Bad_Opcode },
     { RM_TABLE (RM_C7_REG_7) },
   },
+  {
+    /* MOD_FF_REG_3 */
+    { "Jcall{T|}", { indirEp } },
+  },
+  {
+    /* MOD_FF_REG_5 */
+    { "Jjmp{T|}", { indirEp } },
+  },
   {
     /* MOD_0F01_REG_0 */
     { X86_64_TABLE (X86_64_0F01_REG_0) },
@@ -11276,7 +11301,7 @@ static const struct dis386 mod_table[][2] = {
   },
   {
     /* MOD_0FAE_REG_7 */
-    { "clflush",       { Mb } },
+    { PREFIX_TABLE (PREFIX_0FAE_REG_7) },
     { RM_TABLE (RM_0FAE_REG_7) },
   },
   {
@@ -11291,6 +11316,18 @@ static const struct dis386 mod_table[][2] = {
     /* MOD_0FB5 */
     { "lgsS",          { Gv, Mp } },
   },
+  {
+    /* MOD_0FC7_REG_3 */
+    { "xrstors",               { FXSAVE } },
+  },
+  {
+    /* MOD_0FC7_REG_4 */
+    { "xsavec",                { FXSAVE } },
+  },
+  {
+    /* MOD_0FC7_REG_5 */
+    { "xsaves",                { FXSAVE } },
+  },
   {
     /* MOD_0FC7_REG_6 */
     { PREFIX_TABLE (PREFIX_0FC7_REG_6) },
@@ -11495,6 +11532,10 @@ static const struct dis386 rm_table[][8] = {
     { "mwait",         { { OP_Mwait, 0 } } },
     { "clac",          { Skip_MODRM } },
     { "stac",          { Skip_MODRM } },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "encls",         { Skip_MODRM } },
   },
   {
     /* RM_0F01_REG_2 */
@@ -11505,7 +11546,7 @@ static const struct dis386 rm_table[][8] = {
     { "vmfunc",                { Skip_MODRM } },
     { "xend",          { Skip_MODRM } },
     { "xtest",         { Skip_MODRM } },
-    { Bad_Opcode },
+    { "enclu",         { Skip_MODRM } },
   },
   {
     /* RM_0F01_REG_3 */
@@ -12635,7 +12676,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
     }
 
   /* Check if the REX prefix is used.  */
-  if (rex_ignored == 0 && (rex ^ rex_used) == 0)
+  if (rex_ignored == 0 && (rex ^ rex_used) == 0 && last_rex_prefix >= 0)
     all_prefixes[last_rex_prefix] = 0;
 
   /* Check if the SEG prefix is used.  */
@@ -13808,7 +13849,6 @@ intel_operand_size (int bytemode, int sizeflag)
        }
       /* FALLTHRU */
     case v_mode:
-    case v_bnd_mode:
     case v_swap_mode:
     case dq_mode:
       USED_REX (REX_W);
@@ -14080,6 +14120,14 @@ intel_operand_size (int bytemode, int sizeflag)
          oappend ("ZMMWORD PTR ");
        }
       break;
+    case vex_vsib_q_w_d_mode:
+    case vex_vsib_d_w_d_mode:
+      if (!need_vex || !vex.evex || vex.length != 512)
+       abort ();
+
+      oappend ("YMMWORD PTR ");
+
+      break;
     case mask_mode:
       if (!need_vex)
        abort ();
@@ -14090,6 +14138,7 @@ intel_operand_size (int bytemode, int sizeflag)
        abort ();
       oappend ("WORD PTR ");
       break;
+    case v_bnd_mode:
     default:
       break;
     }
@@ -14129,6 +14178,7 @@ OP_E_register (int bytemode, int sizeflag)
       names = names64;
       break;
     case m_mode:
+    case v_bnd_mode:
       names = address_mode == mode_64bit ? names64 : names32;
       break;
     case bnd_mode:
@@ -14143,7 +14193,6 @@ OP_E_register (int bytemode, int sizeflag)
       bytemode = v_mode;
       /* FALLTHRU */
     case v_mode:
-    case v_bnd_mode:
     case v_swap_mode:
     case dq_mode:
     case dqb_mode:
@@ -14196,13 +14245,13 @@ OP_E_memory (int bytemode, int sizeflag)
       switch (bytemode)
        {
        case vex_vsib_d_w_dq_mode:
+       case vex_vsib_d_w_d_mode:
+       case vex_vsib_q_w_dq_mode:
+       case vex_vsib_q_w_d_mode:
        case evex_x_gscat_mode:
        case xmm_mdq_mode:
          shift = vex.w ? 3 : 2;
          break;
-       case vex_vsib_q_w_dq_mode:
-         shift = 3;
-         break;
        case x_mode:
        case evex_half_bcst_xmmq_mode:
          if (vex.b)
@@ -14317,7 +14366,9 @@ OP_E_memory (int bytemode, int sizeflag)
          switch (bytemode)
            {
            case vex_vsib_d_w_dq_mode:
+           case vex_vsib_d_w_d_mode:
            case vex_vsib_q_w_dq_mode:
+           case vex_vsib_q_w_d_mode:
              if (!need_vex)
                abort ();
              if (vex.evex)
@@ -14333,13 +14384,17 @@ OP_E_memory (int bytemode, int sizeflag)
                  indexes64 = indexes32 = names_xmm;
                  break;
                case 256:
-                 if (!vex.w || bytemode == vex_vsib_q_w_dq_mode)
+                 if (!vex.w
+                     || bytemode == vex_vsib_q_w_dq_mode
+                     || bytemode == vex_vsib_q_w_d_mode)
                    indexes64 = indexes32 = names_ymm;
                  else
                    indexes64 = indexes32 = names_xmm;
                  break;
                case 512:
-                 if (!vex.w || bytemode == vex_vsib_q_w_dq_mode)
+                 if (!vex.w
+                     || bytemode == vex_vsib_q_w_dq_mode
+                     || bytemode == vex_vsib_q_w_d_mode)
                    indexes64 = indexes32 = names_zmm;
                  else
                    indexes64 = indexes32 = names_ymm;
@@ -15337,7 +15392,9 @@ OP_XMM (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
          names = names_xmm;
          break;
        case 256:
-         if (vex.w || bytemode != vex_vsib_q_w_dq_mode)
+         if (vex.w
+             || (bytemode != vex_vsib_q_w_dq_mode
+                 && bytemode != vex_vsib_q_w_d_mode))
            names = names_ymm;
          else
            names = names_xmm;
@@ -16043,6 +16100,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
        case vex_mode:
        case vex128_mode:
        case vex_vsib_q_w_dq_mode:
+       case vex_vsib_q_w_d_mode:
          names = names_xmm;
          break;
        case dq_mode:
@@ -16067,6 +16125,7 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
          names = names_ymm;
          break;
        case vex_vsib_q_w_dq_mode:
+       case vex_vsib_q_w_d_mode:
          names = vex.w ? names_ymm : names_xmm;
          break;
        case mask_mode: