/* Print i386 instructions for GDB, the GNU debugger.
- Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013
- Free Software Foundation, Inc.
+ Copyright (C) 1988-2014 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
#define MaskVex { OP_VEX, mask_mode }
#define MVexVSIBDWpX { OP_M, vex_vsib_d_w_dq_mode }
+#define MVexVSIBDQWpX { OP_M, vex_vsib_d_w_d_mode }
#define MVexVSIBQWpX { OP_M, vex_vsib_q_w_dq_mode }
+#define MVexVSIBQDWpX { OP_M, vex_vsib_q_w_d_mode }
/* Used handle "rep" prefix for string instructions. */
#define Xbr { REP_Fixup, eSI_reg }
/* Similar to vex_w_dq_mode, with VSIB dword indices. */
vex_vsib_d_w_dq_mode,
+ /* Similar to vex_vsib_d_w_dq_mode, with smaller memory. */
+ vex_vsib_d_w_d_mode,
/* Similar to vex_w_dq_mode, with VSIB qword indices. */
vex_vsib_q_w_dq_mode,
+ /* Similar to vex_vsib_q_w_dq_mode, with smaller memory. */
+ vex_vsib_q_w_d_mode,
/* scalar, ignore vector length. */
scalar_mode,
MOD_0FB2,
MOD_0FB4,
MOD_0FB5,
+ MOD_0FC7_REG_3,
+ MOD_0FC7_REG_4,
+ MOD_0FC7_REG_5,
MOD_0FC7_REG_6,
MOD_0FC7_REG_7,
MOD_0FD7,
PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2,
PREFIX_0FAE_REG_3,
+ PREFIX_0FAE_REG_7,
PREFIX_0FB8,
PREFIX_0FBC,
PREFIX_0FBD,
{ Bad_Opcode },
{ "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
{ Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
- { Bad_Opcode },
+ { MOD_TABLE (MOD_0FC7_REG_3) },
+ { MOD_TABLE (MOD_0FC7_REG_4) },
+ { MOD_TABLE (MOD_0FC7_REG_5) },
{ MOD_TABLE (MOD_0FC7_REG_6) },
{ MOD_TABLE (MOD_0FC7_REG_7) },
},
{ "wrgsbase", { Ev } },
},
+ /* PREFIX_0FAE_REG_7 */
+ {
+ { "clflush", { Mb } },
+ { Bad_Opcode },
+ { "clflushopt", { Mb } },
+ },
+
/* PREFIX_0FB8 */
{
{ Bad_Opcode },
},
{
/* MOD_0FAE_REG_7 */
- { "clflush", { Mb } },
+ { PREFIX_TABLE (PREFIX_0FAE_REG_7) },
{ RM_TABLE (RM_0FAE_REG_7) },
},
{
/* MOD_0FB5 */
{ "lgsS", { Gv, Mp } },
},
+ {
+ /* MOD_0FC7_REG_3 */
+ { "xrstors", { FXSAVE } },
+ },
+ {
+ /* MOD_0FC7_REG_4 */
+ { "xsavec", { FXSAVE } },
+ },
+ {
+ /* MOD_0FC7_REG_5 */
+ { "xsaves", { FXSAVE } },
+ },
{
/* MOD_0FC7_REG_6 */
{ PREFIX_TABLE (PREFIX_0FC7_REG_6) },
{ "mwait", { { OP_Mwait, 0 } } },
{ "clac", { Skip_MODRM } },
{ "stac", { Skip_MODRM } },
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "encls", { Skip_MODRM } },
},
{
/* RM_0F01_REG_2 */
{ "vmfunc", { Skip_MODRM } },
{ "xend", { Skip_MODRM } },
{ "xtest", { Skip_MODRM } },
- { Bad_Opcode },
+ { "enclu", { Skip_MODRM } },
},
{
/* RM_0F01_REG_3 */
oappend ("ZMMWORD PTR ");
}
break;
+ case vex_vsib_q_w_d_mode:
+ case vex_vsib_d_w_d_mode:
+ if (!need_vex || !vex.evex || vex.length != 512)
+ abort ();
+
+ oappend ("YMMWORD PTR ");
+
+ break;
case mask_mode:
if (!need_vex)
abort ();
switch (bytemode)
{
case vex_vsib_d_w_dq_mode:
+ case vex_vsib_d_w_d_mode:
+ case vex_vsib_q_w_dq_mode:
+ case vex_vsib_q_w_d_mode:
case evex_x_gscat_mode:
case xmm_mdq_mode:
shift = vex.w ? 3 : 2;
break;
- case vex_vsib_q_w_dq_mode:
- shift = 3;
- break;
case x_mode:
case evex_half_bcst_xmmq_mode:
if (vex.b)
switch (bytemode)
{
case vex_vsib_d_w_dq_mode:
+ case vex_vsib_d_w_d_mode:
case vex_vsib_q_w_dq_mode:
+ case vex_vsib_q_w_d_mode:
if (!need_vex)
abort ();
if (vex.evex)
indexes64 = indexes32 = names_xmm;
break;
case 256:
- if (!vex.w || bytemode == vex_vsib_q_w_dq_mode)
+ if (!vex.w
+ || bytemode == vex_vsib_q_w_dq_mode
+ || bytemode == vex_vsib_q_w_d_mode)
indexes64 = indexes32 = names_ymm;
else
indexes64 = indexes32 = names_xmm;
break;
case 512:
- if (!vex.w || bytemode == vex_vsib_q_w_dq_mode)
+ if (!vex.w
+ || bytemode == vex_vsib_q_w_dq_mode
+ || bytemode == vex_vsib_q_w_d_mode)
indexes64 = indexes32 = names_zmm;
else
indexes64 = indexes32 = names_ymm;
names = names_xmm;
break;
case 256:
- if (vex.w || bytemode != vex_vsib_q_w_dq_mode)
+ if (vex.w
+ || (bytemode != vex_vsib_q_w_dq_mode
+ && bytemode != vex_vsib_q_w_d_mode))
names = names_ymm;
else
names = names_xmm;
case vex_mode:
case vex128_mode:
case vex_vsib_q_w_dq_mode:
+ case vex_vsib_q_w_d_mode:
names = names_xmm;
break;
case dq_mode:
names = names_ymm;
break;
case vex_vsib_q_w_dq_mode:
+ case vex_vsib_q_w_d_mode:
names = vex.w ? names_ymm : names_xmm;
break;
case mask_mode: