/* Print i386 instructions for GDB, the GNU debugger.
- Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 97, 98, 1999
- Free Software Foundation, Inc.
+ Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+ 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
-This file is part of GDB.
+ This file is part of the GNU opcodes library.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+ MA 02110-1301, USA. */
-/*
- * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
- * July 1988
- * modified by John Hassey (hassey@dg-rtp.dg.com)
- * x86-64 support added by Jan Hubicka (jh@suse.cz)
- */
-/*
- * The main tables describing the instructions is essentially a copy
- * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
- * Programmers Manual. Usually, there is a capital letter, followed
- * by a small letter. The capital letter tell the addressing mode,
- * and the small letter tells about the operand size. Refer to
- * the Intel manual for details.
- */
+/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
+ July 1988
+ modified by John Hassey (hassey@dg-rtp.dg.com)
+ x86-64 support added by Jan Hubicka (jh@suse.cz)
+ VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
+
+/* The main tables describing the instructions is essentially a copy
+ of the "Opcode Map" chapter (Appendix A) of the Intel 80386
+ Programmers Manual. Usually, there is a capital letter, followed
+ by a small letter. The capital letter tell the addressing mode,
+ and the small letter tells about the operand size. Refer to
+ the Intel manual for details. */
-#include "dis-asm.h"
#include "sysdep.h"
+#include "dis-asm.h"
#include "opintl.h"
-
-#define MAXLEN 20
+#include "opcode/i386.h"
+#include "libiberty.h"
#include <setjmp.h>
-#ifndef UNIXWARE_COMPAT
-/* Set non-zero for broken, compatible instructions. Set to zero for
- non-broken opcodes. */
-#define UNIXWARE_COMPAT 1
-#endif
-
-static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
-
-struct dis_private
-{
+static int fetch_data (struct disassemble_info *, bfd_byte *);
+static void ckprefix (void);
+static const char *prefix_name (int, int);
+static int print_insn (bfd_vma, disassemble_info *);
+static void dofloat (int);
+static void OP_ST (int, int);
+static void OP_STi (int, int);
+static int putop (const char *, int);
+static void oappend (const char *);
+static void append_seg (void);
+static void OP_indirE (int, int);
+static void print_operand_value (char *, int, bfd_vma);
+static void OP_E_extended (int, int, int);
+static void print_displacement (char *, bfd_vma);
+static void OP_E (int, int);
+static void OP_G (int, int);
+static bfd_vma get64 (void);
+static bfd_signed_vma get32 (void);
+static bfd_signed_vma get32s (void);
+static int get16 (void);
+static void set_op (bfd_vma, int);
+static void OP_Skip_MODRM (int, int);
+static void OP_REG (int, int);
+static void OP_IMREG (int, int);
+static void OP_I (int, int);
+static void OP_I64 (int, int);
+static void OP_sI (int, int);
+static void OP_J (int, int);
+static void OP_SEG (int, int);
+static void OP_DIR (int, int);
+static void OP_OFF (int, int);
+static void OP_OFF64 (int, int);
+static void ptr_reg (int, int);
+static void OP_ESreg (int, int);
+static void OP_DSreg (int, int);
+static void OP_C (int, int);
+static void OP_D (int, int);
+static void OP_T (int, int);
+static void OP_R (int, int);
+static void OP_MMX (int, int);
+static void OP_XMM (int, int);
+static void OP_EM (int, int);
+static void OP_EX (int, int);
+static void OP_EMC (int,int);
+static void OP_MXC (int,int);
+static void OP_MS (int, int);
+static void OP_XS (int, int);
+static void OP_M (int, int);
+static void OP_0f07 (int, int);
+static void OP_Monitor (int, int);
+static void OP_Mwait (int, int);
+static void NOP_Fixup1 (int, int);
+static void NOP_Fixup2 (int, int);
+static void OP_3DNowSuffix (int, int);
+static void OP_SIMD_Suffix (int, int);
+static void BadOp (void);
+static void REP_Fixup (int, int);
+static void CMPXCHG8B_Fixup (int, int);
+static void XMM_Fixup (int, int);
+static void CRC32_Fixup (int, int);
+static void print_drex_arg (unsigned int, int, int);
+static void OP_DREX4 (int, int);
+static void OP_DREX3 (int, int);
+static void OP_DREX_ICMP (int, int);
+static void OP_DREX_FCMP (int, int);
+
+struct dis_private {
/* Points to first byte not fetched. */
bfd_byte *max_fetched;
- bfd_byte the_buffer[MAXLEN];
+ bfd_byte the_buffer[MAX_MNEM_SIZE];
bfd_vma insn_start;
+ int orig_sizeflag;
jmp_buf bailout;
};
-/* The opcode for the fwait instruction, which we treat as a prefix
- when we can. */
-#define FWAIT_OPCODE (0x9b)
+enum address_mode
+{
+ mode_16bit,
+ mode_32bit,
+ mode_64bit
+};
-/* Set to 1 for 64bit mode disassembly. */
-static int mode_64bit;
+enum address_mode address_mode;
/* Flags for the prefixes for the current instruction. See below. */
static int prefixes;
static int rex;
/* Bits of REX we've already used. */
static int rex_used;
-#define REX_MODE64 8
-#define REX_EXTX 4
-#define REX_EXTY 2
-#define REX_EXTZ 1
/* Mark parts used in the REX prefix. When we are testing for
empty prefix (for 8bit register REX extension), just mask it
out. Otherwise test for REX bit is excuse for existence of REX
#define USED_REX(value) \
{ \
if (value) \
- rex_used |= (rex & value) ? (value) | 0x40 : 0; \
+ { \
+ if ((rex & value)) \
+ rex_used |= (value) | REX_OPCODE; \
+ } \
else \
- rex_used |= 0x40; \
+ rex_used |= REX_OPCODE; \
}
+/* Special 'registers' for DREX handling */
+#define DREX_REG_UNKNOWN 1000 /* not initialized */
+#define DREX_REG_MEMORY 1001 /* use MODRM/SIB/OFFSET memory */
+
+/* The DREX byte has the following fields:
+ Bits 7-4 -- DREX.Dest, xmm destination register
+ Bit 3 -- DREX.OC0, operand config bit defines operand order
+ Bit 2 -- DREX.R, equivalent to REX_R bit, to extend ModRM register
+ Bit 1 -- DREX.X, equivalent to REX_X bit, to extend SIB index field
+ Bit 0 -- DREX.W, equivalent to REX_B bit, to extend ModRM r/m field,
+ SIB base field, or opcode reg field. */
+#define DREX_XMM(drex) ((drex >> 4) & 0xf)
+#define DREX_OC0(drex) ((drex >> 3) & 0x1)
+
/* Flags for prefixes which we somehow handled when printing the
current instruction. */
static int used_prefixes;
to ADDR (exclusive) are valid. Returns 1 for success, longjmps
on error. */
#define FETCH_DATA(info, addr) \
- ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
+ ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
? 1 : fetch_data ((info), (addr)))
static int
-fetch_data (info, addr)
- struct disassemble_info *info;
- bfd_byte *addr;
+fetch_data (struct disassemble_info *info, bfd_byte *addr)
{
int status;
- struct dis_private *priv = (struct dis_private *)info->private_data;
+ struct dis_private *priv = (struct dis_private *) info->private_data;
bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
- status = (*info->read_memory_func) (start,
- priv->max_fetched,
- addr - priv->max_fetched,
- info);
+ if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
+ status = (*info->read_memory_func) (start,
+ priv->max_fetched,
+ addr - priv->max_fetched,
+ info);
+ else
+ status = -1;
if (status != 0)
{
/* If we did manage to read at least one byte, then
- print_insn_i386 will do something sensible. Otherwise, print
- an error. We do that here because this is where we know
- STATUS. */
+ print_insn_i386 will do something sensible. Otherwise, print
+ an error. We do that here because this is where we know
+ STATUS. */
if (priv->max_fetched == priv->the_buffer)
(*info->memory_error_func) (status, start, info);
longjmp (priv->bailout, 1);
return 1;
}
-#define XX NULL, 0
-
-#define Eb OP_E, b_mode
-#define Ev OP_E, v_mode
-#define Ed OP_E, d_mode
-#define indirEb OP_indirE, b_mode
-#define Gb OP_G, b_mode
-#define Ev OP_E, v_mode
-#define Ed OP_E, d_mode
-#define indirEv OP_indirE, v_mode
-#define Ew OP_E, w_mode
-#define Ma OP_E, v_mode
-#define M OP_E, 0 /* lea */
-#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
-#define Gv OP_G, v_mode
-#define Gw OP_G, w_mode
-#define Rd OP_Rd, d_mode
-#define Rm OP_Rd, m_mode
-#define Ib OP_I, b_mode
-#define sIb OP_sI, b_mode /* sign extened byte */
-#define Iv OP_I, v_mode
-#define Iq OP_I, q_mode
-#define Iv64 OP_I64, v_mode
-#define Iw OP_I, w_mode
-#define Jb OP_J, b_mode
-#define Jv OP_J, v_mode
-#define Cm OP_C, m_mode
-#define Dm OP_D, m_mode
-#define Td OP_T, d_mode
-
-#define RMeAX OP_REG, eAX_reg
-#define RMeBX OP_REG, eBX_reg
-#define RMeCX OP_REG, eCX_reg
-#define RMeDX OP_REG, eDX_reg
-#define RMeSP OP_REG, eSP_reg
-#define RMeBP OP_REG, eBP_reg
-#define RMeSI OP_REG, eSI_reg
-#define RMeDI OP_REG, eDI_reg
-#define RMrAX OP_REG, rAX_reg
-#define RMrBX OP_REG, rBX_reg
-#define RMrCX OP_REG, rCX_reg
-#define RMrDX OP_REG, rDX_reg
-#define RMrSP OP_REG, rSP_reg
-#define RMrBP OP_REG, rBP_reg
-#define RMrSI OP_REG, rSI_reg
-#define RMrDI OP_REG, rDI_reg
-#define RMAL OP_REG, al_reg
-#define RMAL OP_REG, al_reg
-#define RMCL OP_REG, cl_reg
-#define RMDL OP_REG, dl_reg
-#define RMBL OP_REG, bl_reg
-#define RMAH OP_REG, ah_reg
-#define RMCH OP_REG, ch_reg
-#define RMDH OP_REG, dh_reg
-#define RMBH OP_REG, bh_reg
-#define RMAX OP_REG, ax_reg
-#define RMDX OP_REG, dx_reg
-
-#define eAX OP_IMREG, eAX_reg
-#define eBX OP_IMREG, eBX_reg
-#define eCX OP_IMREG, eCX_reg
-#define eDX OP_IMREG, eDX_reg
-#define eSP OP_IMREG, eSP_reg
-#define eBP OP_IMREG, eBP_reg
-#define eSI OP_IMREG, eSI_reg
-#define eDI OP_IMREG, eDI_reg
-#define AL OP_IMREG, al_reg
-#define AL OP_IMREG, al_reg
-#define CL OP_IMREG, cl_reg
-#define DL OP_IMREG, dl_reg
-#define BL OP_IMREG, bl_reg
-#define AH OP_IMREG, ah_reg
-#define CH OP_IMREG, ch_reg
-#define DH OP_IMREG, dh_reg
-#define BH OP_IMREG, bh_reg
-#define AX OP_IMREG, ax_reg
-#define DX OP_IMREG, dx_reg
-#define indirDX OP_IMREG, indir_dx_reg
-
-#define Sw OP_SEG, w_mode
-#define Ap OP_DIR, 0
-#define Ob OP_OFF, b_mode
-#define Ob64 OP_OFF64, b_mode
-#define Ov OP_OFF, v_mode
-#define Ov64 OP_OFF64, v_mode
-#define Xb OP_DSreg, eSI_reg
-#define Xv OP_DSreg, eSI_reg
-#define Yb OP_ESreg, eDI_reg
-#define Yv OP_ESreg, eDI_reg
-#define DSBX OP_DSreg, eBX_reg
-
-#define es OP_REG, es_reg
-#define ss OP_REG, ss_reg
-#define cs OP_REG, cs_reg
-#define ds OP_REG, ds_reg
-#define fs OP_REG, fs_reg
-#define gs OP_REG, gs_reg
-
-#define MX OP_MMX, 0
-#define XM OP_XMM, 0
-#define EM OP_EM, v_mode
-#define EX OP_EX, v_mode
-#define MS OP_MS, v_mode
-#define None OP_E, 0
-#define OPSUF OP_3DNowSuffix, 0
-#define OPSIMD OP_SIMD_Suffix, 0
+#define XX { NULL, 0 }
+
+#define Eb { OP_E, b_mode }
+#define Ev { OP_E, v_mode }
+#define Ed { OP_E, d_mode }
+#define Edq { OP_E, dq_mode }
+#define Edqw { OP_E, dqw_mode }
+#define Edqb { OP_E, dqb_mode }
+#define Edqd { OP_E, dqd_mode }
+#define Eq { OP_E, q_mode }
+#define indirEv { OP_indirE, stack_v_mode }
+#define indirEp { OP_indirE, f_mode }
+#define stackEv { OP_E, stack_v_mode }
+#define Em { OP_E, m_mode }
+#define Ew { OP_E, w_mode }
+#define M { OP_M, 0 } /* lea, lgdt, etc. */
+#define Ma { OP_M, v_mode }
+#define Mb { OP_M, b_mode }
+#define Md { OP_M, d_mode }
+#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
+#define Mq { OP_M, q_mode }
+#define Gb { OP_G, b_mode }
+#define Gv { OP_G, v_mode }
+#define Gd { OP_G, d_mode }
+#define Gdq { OP_G, dq_mode }
+#define Gm { OP_G, m_mode }
+#define Gw { OP_G, w_mode }
+#define Rd { OP_R, d_mode }
+#define Rm { OP_R, m_mode }
+#define Ib { OP_I, b_mode }
+#define sIb { OP_sI, b_mode } /* sign extened byte */
+#define Iv { OP_I, v_mode }
+#define Iq { OP_I, q_mode }
+#define Iv64 { OP_I64, v_mode }
+#define Iw { OP_I, w_mode }
+#define I1 { OP_I, const_1_mode }
+#define Jb { OP_J, b_mode }
+#define Jv { OP_J, v_mode }
+#define Cm { OP_C, m_mode }
+#define Dm { OP_D, m_mode }
+#define Td { OP_T, d_mode }
+#define Skip_MODRM { OP_Skip_MODRM, 0 }
+
+#define RMeAX { OP_REG, eAX_reg }
+#define RMeBX { OP_REG, eBX_reg }
+#define RMeCX { OP_REG, eCX_reg }
+#define RMeDX { OP_REG, eDX_reg }
+#define RMeSP { OP_REG, eSP_reg }
+#define RMeBP { OP_REG, eBP_reg }
+#define RMeSI { OP_REG, eSI_reg }
+#define RMeDI { OP_REG, eDI_reg }
+#define RMrAX { OP_REG, rAX_reg }
+#define RMrBX { OP_REG, rBX_reg }
+#define RMrCX { OP_REG, rCX_reg }
+#define RMrDX { OP_REG, rDX_reg }
+#define RMrSP { OP_REG, rSP_reg }
+#define RMrBP { OP_REG, rBP_reg }
+#define RMrSI { OP_REG, rSI_reg }
+#define RMrDI { OP_REG, rDI_reg }
+#define RMAL { OP_REG, al_reg }
+#define RMAL { OP_REG, al_reg }
+#define RMCL { OP_REG, cl_reg }
+#define RMDL { OP_REG, dl_reg }
+#define RMBL { OP_REG, bl_reg }
+#define RMAH { OP_REG, ah_reg }
+#define RMCH { OP_REG, ch_reg }
+#define RMDH { OP_REG, dh_reg }
+#define RMBH { OP_REG, bh_reg }
+#define RMAX { OP_REG, ax_reg }
+#define RMDX { OP_REG, dx_reg }
+
+#define eAX { OP_IMREG, eAX_reg }
+#define eBX { OP_IMREG, eBX_reg }
+#define eCX { OP_IMREG, eCX_reg }
+#define eDX { OP_IMREG, eDX_reg }
+#define eSP { OP_IMREG, eSP_reg }
+#define eBP { OP_IMREG, eBP_reg }
+#define eSI { OP_IMREG, eSI_reg }
+#define eDI { OP_IMREG, eDI_reg }
+#define AL { OP_IMREG, al_reg }
+#define CL { OP_IMREG, cl_reg }
+#define DL { OP_IMREG, dl_reg }
+#define BL { OP_IMREG, bl_reg }
+#define AH { OP_IMREG, ah_reg }
+#define CH { OP_IMREG, ch_reg }
+#define DH { OP_IMREG, dh_reg }
+#define BH { OP_IMREG, bh_reg }
+#define AX { OP_IMREG, ax_reg }
+#define DX { OP_IMREG, dx_reg }
+#define zAX { OP_IMREG, z_mode_ax_reg }
+#define indirDX { OP_IMREG, indir_dx_reg }
+
+#define Sw { OP_SEG, w_mode }
+#define Sv { OP_SEG, v_mode }
+#define Ap { OP_DIR, 0 }
+#define Ob { OP_OFF64, b_mode }
+#define Ov { OP_OFF64, v_mode }
+#define Xb { OP_DSreg, eSI_reg }
+#define Xv { OP_DSreg, eSI_reg }
+#define Xz { OP_DSreg, eSI_reg }
+#define Yb { OP_ESreg, eDI_reg }
+#define Yv { OP_ESreg, eDI_reg }
+#define DSBX { OP_DSreg, eBX_reg }
+
+#define es { OP_REG, es_reg }
+#define ss { OP_REG, ss_reg }
+#define cs { OP_REG, cs_reg }
+#define ds { OP_REG, ds_reg }
+#define fs { OP_REG, fs_reg }
+#define gs { OP_REG, gs_reg }
+
+#define MX { OP_MMX, 0 }
+#define XM { OP_XMM, 0 }
+#define EM { OP_EM, v_mode }
+#define EMd { OP_EM, d_mode }
+#define EMx { OP_EM, x_mode }
+#define EXw { OP_EX, w_mode }
+#define EXd { OP_EX, d_mode }
+#define EXq { OP_EX, q_mode }
+#define EXx { OP_EX, x_mode }
+#define MS { OP_MS, v_mode }
+#define XS { OP_XS, v_mode }
+#define EMCq { OP_EMC, q_mode }
+#define MXC { OP_MXC, 0 }
+#define OPSUF { OP_3DNowSuffix, 0 }
+#define OPSIMD { OP_SIMD_Suffix, 0 }
+#define XMM0 { XMM_Fixup, 0 }
+
+/* Used handle "rep" prefix for string instructions. */
+#define Xbr { REP_Fixup, eSI_reg }
+#define Xvr { REP_Fixup, eSI_reg }
+#define Ybr { REP_Fixup, eDI_reg }
+#define Yvr { REP_Fixup, eDI_reg }
+#define Yzr { REP_Fixup, eDI_reg }
+#define indirDXr { REP_Fixup, indir_dx_reg }
+#define ALr { REP_Fixup, al_reg }
+#define eAXr { REP_Fixup, eAX_reg }
+
+#define cond_jump_flag { NULL, cond_jump_mode }
+#define loop_jcxz_flag { NULL, loop_jcxz_mode }
/* bits in sizeflag */
-#if 0 /* leave undefined until someone adds the extra flag to objdump */
#define SUFFIX_ALWAYS 4
-#endif
#define AFLAG 2
#define DFLAG 1
-typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
-
-static void OP_E PARAMS ((int, int));
-static void OP_G PARAMS ((int, int));
-static void OP_I PARAMS ((int, int));
-static void OP_I64 PARAMS ((int, int));
-static void OP_OFF PARAMS ((int, int));
-static void OP_REG PARAMS ((int, int));
-static void OP_IMREG PARAMS ((int, int));
-static void OP_OFF64 PARAMS ((int, int));
-static void OP_indirE PARAMS ((int, int));
-static void OP_sI PARAMS ((int, int));
-static void OP_REG PARAMS ((int, int));
-static void OP_J PARAMS ((int, int));
-static void OP_DIR PARAMS ((int, int));
-static void OP_OFF PARAMS ((int, int));
-static void OP_ESreg PARAMS ((int, int));
-static void OP_DSreg PARAMS ((int, int));
-static void OP_SEG PARAMS ((int, int));
-static void OP_C PARAMS ((int, int));
-static void OP_D PARAMS ((int, int));
-static void OP_T PARAMS ((int, int));
-static void OP_Rd PARAMS ((int, int));
-static void OP_ST PARAMS ((int, int));
-static void OP_STi PARAMS ((int, int));
-static void OP_MMX PARAMS ((int, int));
-static void OP_XMM PARAMS ((int, int));
-static void OP_EM PARAMS ((int, int));
-static void OP_EX PARAMS ((int, int));
-static void OP_MS PARAMS ((int, int));
-static void OP_3DNowSuffix PARAMS ((int, int));
-static void OP_SIMD_Suffix PARAMS ((int, int));
-static void SIMD_Fixup PARAMS ((int, int));
-
-static void append_seg PARAMS ((void));
-static void set_op PARAMS ((unsigned int op, int));
-static void putop PARAMS ((const char *template, int sizeflag));
-static void dofloat PARAMS ((int sizeflag));
-static int get16 PARAMS ((void));
-static bfd_vma get64 PARAMS ((void));
-static bfd_signed_vma get32 PARAMS ((void));
-static bfd_signed_vma get32s PARAMS ((void));
-static void ckprefix PARAMS ((void));
-static const char *prefix_name PARAMS ((int, int));
-static void ptr_reg PARAMS ((int, int));
-static void BadOp PARAMS ((void));
-
#define b_mode 1 /* byte operand */
#define v_mode 2 /* operand size depends on prefixes */
#define w_mode 3 /* word operand */
#define d_mode 4 /* double word operand */
#define q_mode 5 /* quad word operand */
-#define x_mode 6
-#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
+#define t_mode 6 /* ten-byte operand */
+#define x_mode 7 /* 16-byte XMM operand */
+#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
+#define cond_jump_mode 9
+#define loop_jcxz_mode 10
+#define dq_mode 11 /* operand size depends on REX prefixes. */
+#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
+#define f_mode 13 /* 4- or 6-byte pointer operand */
+#define const_1_mode 14
+#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
+#define z_mode 16 /* non-quad operand size depends on prefixes */
+#define o_mode 17 /* 16-byte operand */
+#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
+#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
+
+/* Flags that are OR'ed into the bytemode field to pass extra information. */
+#define DREX_OC1 0x4000 /* OC1 bit set */
+#define DREX_NO_OC0 0x2000 /* OC0 bit not used */
+#define DREX_MASK 0x6000 /* mask to delete */
#define es_reg 100
#define cs_reg 101
#define rSI_reg 138
#define rDI_reg 139
+#define z_mode_ax_reg 149
#define indir_dx_reg 150
-#define USE_GROUPS 1
-#define USE_PREFIX_USER_TABLE 2
-
-#define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0
-#define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0
-#define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0
-#define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0
-#define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0
-#define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0
-#define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0
-#define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0
-#define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0
-#define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0
-#define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0
-#define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0
-#define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0
-#define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0
-#define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0
-#define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0
-#define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0
-#define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0
-#define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0
-#define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0
-#define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0
-#define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0
-#define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0
-
-#define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-#define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0
-
-#define FLOATCODE 50
-#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
+#define FLOATCODE 1
+#define USE_REG_TABLE 2
+#define USE_MOD_TABLE 3
+#define USE_RM_TABLE 4
+#define USE_PREFIX_TABLE 5
+#define USE_X86_64_TABLE 6
+#define USE_3BYTE_TABLE 7
+
+#define FLOAT NULL, { { NULL, FLOATCODE } }
+
+#define DIS386(T, I) NULL, { { NULL, (T)}, { NULL, (I) } }
+#define REG_TABLE(I) DIS386 (USE_REG_TABLE, (I))
+#define MOD_TABLE(I) DIS386 (USE_MOD_TABLE, (I))
+#define RM_TABLE(I) DIS386 (USE_RM_TABLE, (I))
+#define PREFIX_TABLE(I) DIS386 (USE_PREFIX_TABLE, (I))
+#define X86_64_TABLE(I) DIS386 (USE_X86_64_TABLE, (I))
+#define THREE_BYTE_TABLE(I) DIS386 (USE_3BYTE_TABLE, (I))
+
+#define REG_80 0
+#define REG_81 (REG_80 + 1)
+#define REG_82 (REG_81 + 1)
+#define REG_8F (REG_82 + 1)
+#define REG_C0 (REG_8F + 1)
+#define REG_C1 (REG_C0 + 1)
+#define REG_C6 (REG_C1 + 1)
+#define REG_C7 (REG_C6 + 1)
+#define REG_D0 (REG_C7 + 1)
+#define REG_D1 (REG_D0 + 1)
+#define REG_D2 (REG_D1 + 1)
+#define REG_D3 (REG_D2 + 1)
+#define REG_F6 (REG_D3 + 1)
+#define REG_F7 (REG_F6 + 1)
+#define REG_FE (REG_F7 + 1)
+#define REG_FF (REG_FE + 1)
+#define REG_0F00 (REG_FF + 1)
+#define REG_0F01 (REG_0F00 + 1)
+#define REG_0F0E (REG_0F01 + 1)
+#define REG_0F18 (REG_0F0E + 1)
+#define REG_0F71 (REG_0F18 + 1)
+#define REG_0F72 (REG_0F71 + 1)
+#define REG_0F73 (REG_0F72 + 1)
+#define REG_0FA6 (REG_0F73 + 1)
+#define REG_0FA7 (REG_0FA6 + 1)
+#define REG_0FAE (REG_0FA7 + 1)
+#define REG_0FBA (REG_0FAE + 1)
+#define REG_0FC7 (REG_0FBA + 1)
+
+#define MOD_8D 0
+#define MOD_0F13 (MOD_8D + 1)
+#define MOD_0F17 (MOD_0F13 + 1)
+#define MOD_0F20 (MOD_0F17 + 1)
+#define MOD_0F21 (MOD_0F20 + 1)
+#define MOD_0F22 (MOD_0F21 + 1)
+#define MOD_0F23 (MOD_0F22 + 1)
+#define MOD_0F24 (MOD_0F23 + 1)
+#define MOD_0F26 (MOD_0F24 + 1)
+#define MOD_0FB2 (MOD_0F26 + 1)
+#define MOD_0FB4 (MOD_0FB2 + 1)
+#define MOD_0FB5 (MOD_0FB4 + 1)
+#define MOD_0F01_REG_0 (MOD_0FB5 + 1)
+#define MOD_0F01_REG_1 (MOD_0F01_REG_0 + 1)
+#define MOD_0F01_REG_2 (MOD_0F01_REG_1 + 1)
+#define MOD_0F01_REG_3 (MOD_0F01_REG_2 + 1)
+#define MOD_0F01_REG_7 (MOD_0F01_REG_3 + 1)
+#define MOD_0F18_REG_0 (MOD_0F01_REG_7 + 1)
+#define MOD_0F18_REG_1 (MOD_0F18_REG_0 + 1)
+#define MOD_0F18_REG_2 (MOD_0F18_REG_1 + 1)
+#define MOD_0F18_REG_3 (MOD_0F18_REG_2 + 1)
+#define MOD_0F71_REG_2 (MOD_0F18_REG_3 + 1)
+#define MOD_0F71_REG_4 (MOD_0F71_REG_2 + 1)
+#define MOD_0F71_REG_6 (MOD_0F71_REG_4 + 1)
+#define MOD_0F72_REG_2 (MOD_0F71_REG_6 + 1)
+#define MOD_0F72_REG_4 (MOD_0F72_REG_2 + 1)
+#define MOD_0F72_REG_6 (MOD_0F72_REG_4 + 1)
+#define MOD_0F73_REG_2 (MOD_0F72_REG_6 + 1)
+#define MOD_0F73_REG_3 (MOD_0F73_REG_2 + 1)
+#define MOD_0F73_REG_6 (MOD_0F73_REG_3 + 1)
+#define MOD_0F73_REG_7 (MOD_0F73_REG_6 + 1)
+#define MOD_0FAE_REG_0 (MOD_0F73_REG_7 + 1)
+#define MOD_0FAE_REG_1 (MOD_0FAE_REG_0 + 1)
+#define MOD_0FAE_REG_2 (MOD_0FAE_REG_1 + 1)
+#define MOD_0FAE_REG_3 (MOD_0FAE_REG_2 + 1)
+#define MOD_0FAE_REG_5 (MOD_0FAE_REG_3 + 1)
+#define MOD_0FAE_REG_6 (MOD_0FAE_REG_5 + 1)
+#define MOD_0FAE_REG_7 (MOD_0FAE_REG_6 + 1)
+#define MOD_0FC7_REG_6 (MOD_0FAE_REG_7 + 1)
+#define MOD_0FC7_REG_7 (MOD_0FC7_REG_6 + 1)
+#define MOD_0F12_PREFIX_0 (MOD_0FC7_REG_7 + 1)
+#define MOD_0F16_PREFIX_0 (MOD_0F12_PREFIX_0 + 1)
+#define MOD_0FF0_PREFIX_3 (MOD_0F16_PREFIX_0 + 1)
+#define MOD_62_32BIT (MOD_0FF0_PREFIX_3 + 1)
+#define MOD_C4_32BIT (MOD_62_32BIT + 1)
+#define MOD_C5_32BIT (MOD_C4_32BIT + 1)
+
+#define RM_0F01_REG_0 0
+#define RM_0F01_REG_1 (RM_0F01_REG_0 + 1)
+#define RM_0F01_REG_3 (RM_0F01_REG_1 + 1)
+#define RM_0F01_REG_7 (RM_0F01_REG_3 + 1)
+#define RM_0FAE_REG_5 (RM_0F01_REG_7 + 1)
+#define RM_0FAE_REG_6 (RM_0FAE_REG_5 + 1)
+#define RM_0FAE_REG_7 (RM_0FAE_REG_6 + 1)
+
+#define PREFIX_90 0
+#define PREFIX_0F10 (PREFIX_90 + 1)
+#define PREFIX_0F11 (PREFIX_0F10 + 1)
+#define PREFIX_0F12 (PREFIX_0F11 + 1)
+#define PREFIX_0F16 (PREFIX_0F12 + 1)
+#define PREFIX_0F2A (PREFIX_0F16 + 1)
+#define PREFIX_0F2B (PREFIX_0F2A + 1)
+#define PREFIX_0F2C (PREFIX_0F2B + 1)
+#define PREFIX_0F2D (PREFIX_0F2C + 1)
+#define PREFIX_0F2E (PREFIX_0F2D + 1)
+#define PREFIX_0F2F (PREFIX_0F2E + 1)
+#define PREFIX_0F51 (PREFIX_0F2F + 1)
+#define PREFIX_0F52 (PREFIX_0F51 + 1)
+#define PREFIX_0F53 (PREFIX_0F52 + 1)
+#define PREFIX_0F58 (PREFIX_0F53 + 1)
+#define PREFIX_0F59 (PREFIX_0F58 + 1)
+#define PREFIX_0F5A (PREFIX_0F59 + 1)
+#define PREFIX_0F5B (PREFIX_0F5A + 1)
+#define PREFIX_0F5C (PREFIX_0F5B + 1)
+#define PREFIX_0F5D (PREFIX_0F5C + 1)
+#define PREFIX_0F5E (PREFIX_0F5D + 1)
+#define PREFIX_0F5F (PREFIX_0F5E + 1)
+#define PREFIX_0F60 (PREFIX_0F5F + 1)
+#define PREFIX_0F61 (PREFIX_0F60 + 1)
+#define PREFIX_0F62 (PREFIX_0F61 + 1)
+#define PREFIX_0F6C (PREFIX_0F62 + 1)
+#define PREFIX_0F6D (PREFIX_0F6C + 1)
+#define PREFIX_0F6F (PREFIX_0F6D + 1)
+#define PREFIX_0F70 (PREFIX_0F6F + 1)
+#define PREFIX_0F78 (PREFIX_0F70 + 1)
+#define PREFIX_0F79 (PREFIX_0F78 + 1)
+#define PREFIX_0F7C (PREFIX_0F79 + 1)
+#define PREFIX_0F7D (PREFIX_0F7C + 1)
+#define PREFIX_0F7E (PREFIX_0F7D + 1)
+#define PREFIX_0F7F (PREFIX_0F7E + 1)
+#define PREFIX_0FB8 (PREFIX_0F7F + 1)
+#define PREFIX_0FBD (PREFIX_0FB8 + 1)
+#define PREFIX_0FC2 (PREFIX_0FBD + 1)
+#define PREFIX_0FD0 (PREFIX_0FC2 + 1)
+#define PREFIX_0FD6 (PREFIX_0FD0 + 1)
+#define PREFIX_0FE6 (PREFIX_0FD6 + 1)
+#define PREFIX_0FE7 (PREFIX_0FE6 + 1)
+#define PREFIX_0FF0 (PREFIX_0FE7 + 1)
+#define PREFIX_0FF7 (PREFIX_0FF0 + 1)
+#define PREFIX_0F3810 (PREFIX_0FF7 + 1)
+#define PREFIX_0F3814 (PREFIX_0F3810 + 1)
+#define PREFIX_0F3815 (PREFIX_0F3814 + 1)
+#define PREFIX_0F3817 (PREFIX_0F3815 + 1)
+#define PREFIX_0F3820 (PREFIX_0F3817 + 1)
+#define PREFIX_0F3821 (PREFIX_0F3820 + 1)
+#define PREFIX_0F3822 (PREFIX_0F3821 + 1)
+#define PREFIX_0F3823 (PREFIX_0F3822 + 1)
+#define PREFIX_0F3824 (PREFIX_0F3823 + 1)
+#define PREFIX_0F3825 (PREFIX_0F3824 + 1)
+#define PREFIX_0F3828 (PREFIX_0F3825 + 1)
+#define PREFIX_0F3829 (PREFIX_0F3828 + 1)
+#define PREFIX_0F382A (PREFIX_0F3829 + 1)
+#define PREFIX_0F382B (PREFIX_0F382A + 1)
+#define PREFIX_0F3830 (PREFIX_0F382B + 1)
+#define PREFIX_0F3831 (PREFIX_0F3830 + 1)
+#define PREFIX_0F3832 (PREFIX_0F3831 + 1)
+#define PREFIX_0F3833 (PREFIX_0F3832 + 1)
+#define PREFIX_0F3834 (PREFIX_0F3833 + 1)
+#define PREFIX_0F3835 (PREFIX_0F3834 + 1)
+#define PREFIX_0F3837 (PREFIX_0F3835 + 1)
+#define PREFIX_0F3838 (PREFIX_0F3837 + 1)
+#define PREFIX_0F3839 (PREFIX_0F3838 + 1)
+#define PREFIX_0F383A (PREFIX_0F3839 + 1)
+#define PREFIX_0F383B (PREFIX_0F383A + 1)
+#define PREFIX_0F383C (PREFIX_0F383B + 1)
+#define PREFIX_0F383D (PREFIX_0F383C + 1)
+#define PREFIX_0F383E (PREFIX_0F383D + 1)
+#define PREFIX_0F383F (PREFIX_0F383E + 1)
+#define PREFIX_0F3840 (PREFIX_0F383F + 1)
+#define PREFIX_0F3841 (PREFIX_0F3840 + 1)
+#define PREFIX_0F38F0 (PREFIX_0F3841 + 1)
+#define PREFIX_0F38F1 (PREFIX_0F38F0 + 1)
+#define PREFIX_0F3A08 (PREFIX_0F38F1 + 1)
+#define PREFIX_0F3A09 (PREFIX_0F3A08 + 1)
+#define PREFIX_0F3A0A (PREFIX_0F3A09 + 1)
+#define PREFIX_0F3A0B (PREFIX_0F3A0A + 1)
+#define PREFIX_0F3A0C (PREFIX_0F3A0B + 1)
+#define PREFIX_0F3A0D (PREFIX_0F3A0C + 1)
+#define PREFIX_0F3A0E (PREFIX_0F3A0D + 1)
+#define PREFIX_0F3A14 (PREFIX_0F3A0E + 1)
+#define PREFIX_0F3A15 (PREFIX_0F3A14 + 1)
+#define PREFIX_0F3A16 (PREFIX_0F3A15 + 1)
+#define PREFIX_0F3A17 (PREFIX_0F3A16 + 1)
+#define PREFIX_0F3A20 (PREFIX_0F3A17 + 1)
+#define PREFIX_0F3A21 (PREFIX_0F3A20 + 1)
+#define PREFIX_0F3A22 (PREFIX_0F3A21 + 1)
+#define PREFIX_0F3A40 (PREFIX_0F3A22 + 1)
+#define PREFIX_0F3A41 (PREFIX_0F3A40 + 1)
+#define PREFIX_0F3A42 (PREFIX_0F3A41 + 1)
+#define PREFIX_0F3A60 (PREFIX_0F3A42 + 1)
+#define PREFIX_0F3A61 (PREFIX_0F3A60 + 1)
+#define PREFIX_0F3A62 (PREFIX_0F3A61 + 1)
+#define PREFIX_0F3A63 (PREFIX_0F3A62 + 1)
+#define PREFIX_0F73_REG_3 (PREFIX_0F3A63 + 1)
+#define PREFIX_0F73_REG_7 (PREFIX_0F73_REG_3 + 1)
+#define PREFIX_0FC7_REG_6 (PREFIX_0F73_REG_7 + 1)
+
+#define X86_64_06 0
+#define X86_64_07 (X86_64_06 + 1)
+#define X86_64_0D (X86_64_07 + 1)
+#define X86_64_16 (X86_64_0D + 1)
+#define X86_64_17 (X86_64_16 + 1)
+#define X86_64_1E (X86_64_17 + 1)
+#define X86_64_1F (X86_64_1E + 1)
+#define X86_64_27 (X86_64_1F + 1)
+#define X86_64_2F (X86_64_27 + 1)
+#define X86_64_37 (X86_64_2F + 1)
+#define X86_64_3F (X86_64_37 + 1)
+#define X86_64_60 (X86_64_3F + 1)
+#define X86_64_61 (X86_64_60 + 1)
+#define X86_64_62 (X86_64_61 + 1)
+#define X86_64_63 (X86_64_62 + 1)
+#define X86_64_6D (X86_64_63 + 1)
+#define X86_64_6F (X86_64_6D + 1)
+#define X86_64_9A (X86_64_6F + 1)
+#define X86_64_C4 (X86_64_9A + 1)
+#define X86_64_C5 (X86_64_C4 + 1)
+#define X86_64_CE (X86_64_C5 + 1)
+#define X86_64_D4 (X86_64_CE + 1)
+#define X86_64_D5 (X86_64_D4 + 1)
+#define X86_64_EA (X86_64_D5 + 1)
+#define X86_64_0F01_REG_0 (X86_64_EA + 1)
+#define X86_64_0F01_REG_1 (X86_64_0F01_REG_0 + 1)
+#define X86_64_0F01_REG_2 (X86_64_0F01_REG_1 + 1)
+#define X86_64_0F01_REG_3 (X86_64_0F01_REG_2 + 1)
+
+#define THREE_BYTE_0F24 0
+#define THREE_BYTE_0F25 (THREE_BYTE_0F24 + 1)
+#define THREE_BYTE_0F38 (THREE_BYTE_0F25 + 1)
+#define THREE_BYTE_0F3A (THREE_BYTE_0F38 + 1)
+#define THREE_BYTE_0F7A (THREE_BYTE_0F3A + 1)
+#define THREE_BYTE_0F7B (THREE_BYTE_0F7A + 1)
+
+typedef void (*op_rtn) (int bytemode, int sizeflag);
struct dis386 {
const char *name;
- op_rtn op1;
- int bytemode1;
- op_rtn op2;
- int bytemode2;
- op_rtn op3;
- int bytemode3;
+ struct
+ {
+ op_rtn rtn;
+ int bytemode;
+ } op[MAX_OPERANDS];
};
/* Upper case letters in the instruction names here are macros.
'A' => print 'b' if no register operands or suffix_always is true
'B' => print 'b' if suffix_always is true
+ 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
+ . size prefix
+ 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
+ . suffix_always is true
'E' => print 'e' if 32-bit form of jcxz
+ 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
+ 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
+ 'H' => print ",pt" or ",pn" branch hint
+ 'I' => honor following macro letter even in Intel mode (implemented only
+ . for some of the macro letters)
+ 'J' => print 'l'
+ 'K' => print 'd' or 'q' if rex prefix is present.
'L' => print 'l' if suffix_always is true
'N' => print 'n' if instruction has no wait "prefix"
- 'O' => print 'd', or 'o'
+ 'O' => print 'd' or 'o' (or 'q' in Intel mode)
'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
- or suffix_always is true
- print 'q' if rex prefix is present.
- 'I' => print 'q' in 64bit mode and behave as 'P' otherwise
- 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true
- 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
+ . or suffix_always is true. print 'q' if rex prefix is present.
+ 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
+ . is true
+ 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
'S' => print 'w', 'l' or 'q' if suffix_always is true
- 'T' => print 'q' in 64bit mode and behave as 'I' otherwise
+ 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
+ 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
+ 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
+ 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
'X' => print 's', 'd' depending on data16 prefix (for XMM)
- 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
'Y' => 'q' if instruction has an REX 64bit overwrite prefix
-*/
-
-static const struct dis386 dis386_att[] = {
- /* 00 */
- { "addB", Eb, Gb, XX },
- { "addS", Ev, Gv, XX },
- { "addB", Gb, Eb, XX },
- { "addS", Gv, Ev, XX },
- { "addB", AL, Ib, XX },
- { "addS", eAX, Iv, XX },
- { "pushI", es, XX, XX },
- { "popI", es, XX, XX },
- /* 08 */
- { "orB", Eb, Gb, XX },
- { "orS", Ev, Gv, XX },
- { "orB", Gb, Eb, XX },
- { "orS", Gv, Ev, XX },
- { "orB", AL, Ib, XX },
- { "orS", eAX, Iv, XX },
- { "pushI", cs, XX, XX },
- { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
- /* 10 */
- { "adcB", Eb, Gb, XX },
- { "adcS", Ev, Gv, XX },
- { "adcB", Gb, Eb, XX },
- { "adcS", Gv, Ev, XX },
- { "adcB", AL, Ib, XX },
- { "adcS", eAX, Iv, XX },
- { "pushI", ss, XX, XX },
- { "popI", ss, XX, XX },
- /* 18 */
- { "sbbB", Eb, Gb, XX },
- { "sbbS", Ev, Gv, XX },
- { "sbbB", Gb, Eb, XX },
- { "sbbS", Gv, Ev, XX },
- { "sbbB", AL, Ib, XX },
- { "sbbS", eAX, Iv, XX },
- { "pushI", ds, XX, XX },
- { "popI", ds, XX, XX },
- /* 20 */
- { "andB", Eb, Gb, XX },
- { "andS", Ev, Gv, XX },
- { "andB", Gb, Eb, XX },
- { "andS", Gv, Ev, XX },
- { "andB", AL, Ib, XX },
- { "andS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG ES prefix */
- { "daa", XX, XX, XX },
- /* 28 */
- { "subB", Eb, Gb, XX },
- { "subS", Ev, Gv, XX },
- { "subB", Gb, Eb, XX },
- { "subS", Gv, Ev, XX },
- { "subB", AL, Ib, XX },
- { "subS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG CS prefix */
- { "das", XX, XX, XX },
- /* 30 */
- { "xorB", Eb, Gb, XX },
- { "xorS", Ev, Gv, XX },
- { "xorB", Gb, Eb, XX },
- { "xorS", Gv, Ev, XX },
- { "xorB", AL, Ib, XX },
- { "xorS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG SS prefix */
- { "aaa", XX, XX, XX },
- /* 38 */
- { "cmpB", Eb, Gb, XX },
- { "cmpS", Ev, Gv, XX },
- { "cmpB", Gb, Eb, XX },
- { "cmpS", Gv, Ev, XX },
- { "cmpB", AL, Ib, XX },
- { "cmpS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG DS prefix */
- { "aas", XX, XX, XX },
- /* 40 */
- { "incS", RMeAX, XX, XX },
- { "incS", RMeCX, XX, XX },
- { "incS", RMeDX, XX, XX },
- { "incS", RMeBX, XX, XX },
- { "incS", RMeSP, XX, XX },
- { "incS", RMeBP, XX, XX },
- { "incS", RMeSI, XX, XX },
- { "incS", RMeDI, XX, XX },
- /* 48 */
- { "decS", RMeAX, XX, XX },
- { "decS", RMeCX, XX, XX },
- { "decS", RMeDX, XX, XX },
- { "decS", RMeBX, XX, XX },
- { "decS", RMeSP, XX, XX },
- { "decS", RMeBP, XX, XX },
- { "decS", RMeSI, XX, XX },
- { "decS", RMeDI, XX, XX },
- /* 50 */
- { "pushS", RMeAX, XX, XX },
- { "pushS", RMeCX, XX, XX },
- { "pushS", RMeDX, XX, XX },
- { "pushS", RMeBX, XX, XX },
- { "pushS", RMeSP, XX, XX },
- { "pushS", RMeBP, XX, XX },
- { "pushS", RMeSI, XX, XX },
- { "pushS", RMeDI, XX, XX },
- /* 58 */
- { "popS", RMeAX, XX, XX },
- { "popS", RMeCX, XX, XX },
- { "popS", RMeDX, XX, XX },
- { "popS", RMeBX, XX, XX },
- { "popS", RMeSP, XX, XX },
- { "popS", RMeBP, XX, XX },
- { "popS", RMeSI, XX, XX },
- { "popS", RMeDI, XX, XX },
- /* 60 */
- { "pushaP", XX, XX, XX },
- { "popaP", XX, XX, XX },
- { "boundS", Gv, Ma, XX },
- { "arpl", Ew, Gw, XX },
- { "(bad)", XX, XX, XX }, /* seg fs */
- { "(bad)", XX, XX, XX }, /* seg gs */
- { "(bad)", XX, XX, XX }, /* op size prefix */
- { "(bad)", XX, XX, XX }, /* adr size prefix */
- /* 68 */
- { "pushI", Iv, XX, XX }, /* 386 book wrong */
- { "imulS", Gv, Ev, Iv },
- { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
- { "imulS", Gv, Ev, sIb },
- { "insb", Yb, indirDX, XX },
- { "insR", Yv, indirDX, XX },
- { "outsb", indirDX, Xb, XX },
- { "outsR", indirDX, Xv, XX },
- /* 70 */
- { "jo", Jb, XX, XX },
- { "jno", Jb, XX, XX },
- { "jb", Jb, XX, XX },
- { "jae", Jb, XX, XX },
- { "je", Jb, XX, XX },
- { "jne", Jb, XX, XX },
- { "jbe", Jb, XX, XX },
- { "ja", Jb, XX, XX },
- /* 78 */
- { "js", Jb, XX, XX },
- { "jns", Jb, XX, XX },
- { "jp", Jb, XX, XX },
- { "jnp", Jb, XX, XX },
- { "jl", Jb, XX, XX },
- { "jge", Jb, XX, XX },
- { "jle", Jb, XX, XX },
- { "jg", Jb, XX, XX },
- /* 80 */
- { GRP1b },
- { GRP1S },
- { "(bad)", XX, XX, XX },
- { GRP1Ss },
- { "testB", Eb, Gb, XX },
- { "testS", Ev, Gv, XX },
- { "xchgB", Eb, Gb, XX },
- { "xchgS", Ev, Gv, XX },
- /* 88 */
- { "movB", Eb, Gb, XX },
- { "movS", Ev, Gv, XX },
- { "movB", Gb, Eb, XX },
- { "movS", Gv, Ev, XX },
- { "movQ", Ev, Sw, XX },
- { "leaS", Gv, M, XX },
- { "movQ", Sw, Ev, XX },
- { "popT", Ev, XX, XX },
- /* 90 */
- { "nop", XX, XX, XX },
- /* FIXME: NOP with REPz prefix is called PAUSE. */
- { "xchgS", RMeCX, eAX, XX },
- { "xchgS", RMeDX, eAX, XX },
- { "xchgS", RMeBX, eAX, XX },
- { "xchgS", RMeSP, eAX, XX },
- { "xchgS", RMeBP, eAX, XX },
- { "xchgS", RMeSI, eAX, XX },
- { "xchgS", RMeDI, eAX, XX },
- /* 98 */
- { "cWtR", XX, XX, XX },
- { "cRtO", XX, XX, XX },
- { "lcallI", Ap, XX, XX },
- { "(bad)", XX, XX, XX }, /* fwait */
- { "pushfI", XX, XX, XX },
- { "popfI", XX, XX, XX },
- { "sahf", XX, XX, XX },
- { "lahf", XX, XX, XX },
- /* a0 */
- { "movB", AL, Ob, XX },
- { "movS", eAX, Ov, XX },
- { "movB", Ob, AL, XX },
- { "movS", Ov, eAX, XX },
- { "movsb", Yb, Xb, XX },
- { "movsR", Yv, Xv, XX },
- { "cmpsb", Xb, Yb, XX },
- { "cmpsR", Xv, Yv, XX },
- /* a8 */
- { "testB", AL, Ib, XX },
- { "testS", eAX, Iv, XX },
- { "stosB", Yb, AL, XX },
- { "stosS", Yv, eAX, XX },
- { "lodsB", AL, Xb, XX },
- { "lodsS", eAX, Xv, XX },
- { "scasB", AL, Yb, XX },
- { "scasS", eAX, Yv, XX },
- /* b0 */
- { "movB", RMAL, Ib, XX },
- { "movB", RMCL, Ib, XX },
- { "movB", RMDL, Ib, XX },
- { "movB", RMBL, Ib, XX },
- { "movB", RMAH, Ib, XX },
- { "movB", RMCH, Ib, XX },
- { "movB", RMDH, Ib, XX },
- { "movB", RMBH, Ib, XX },
- /* b8 */
- { "movS", RMeAX, Iv, XX },
- { "movS", RMeCX, Iv, XX },
- { "movS", RMeDX, Iv, XX },
- { "movS", RMeBX, Iv, XX },
- { "movS", RMeSP, Iv, XX },
- { "movS", RMeBP, Iv, XX },
- { "movS", RMeSI, Iv, XX },
- { "movS", RMeDI, Iv, XX },
- /* c0 */
- { GRP2b },
- { GRP2S },
- { "retI", Iw, XX, XX },
- { "retI", XX, XX, XX },
- { "lesS", Gv, Mp, XX },
- { "ldsS", Gv, Mp, XX },
- { "movA", Eb, Ib, XX },
- { "movQ", Ev, Iv, XX },
- /* c8 */
- { "enterI", Iw, Ib, XX },
- { "leaveI", XX, XX, XX },
- { "lretP", Iw, XX, XX },
- { "lretP", XX, XX, XX },
- { "int3", XX, XX, XX },
- { "int", Ib, XX, XX },
- { "into", XX, XX, XX},
- { "iretP", XX, XX, XX },
- /* d0 */
- { GRP2b_one },
- { GRP2S_one },
- { GRP2b_cl },
- { GRP2S_cl },
- { "aam", sIb, XX, XX },
- { "aad", sIb, XX, XX },
- { "(bad)", XX, XX, XX },
- { "xlat", DSBX, XX, XX },
- /* d8 */
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- /* e0 */
- { "loopne", Jb, XX, XX },
- { "loope", Jb, XX, XX },
- { "loop", Jb, XX, XX },
- { "jEcxz", Jb, XX, XX },
- { "inB", AL, Ib, XX },
- { "inS", eAX, Ib, XX },
- { "outB", Ib, AL, XX },
- { "outS", Ib, eAX, XX },
- /* e8 */
- { "callI", Jv, XX, XX },
- { "jmpI", Jv, XX, XX },
- { "ljmpI", Ap, XX, XX },
- { "jmp", Jb, XX, XX },
- { "inB", AL, indirDX, XX },
- { "inS", eAX, indirDX, XX },
- { "outB", indirDX, AL, XX },
- { "outS", indirDX, eAX, XX },
- /* f0 */
- { "(bad)", XX, XX, XX }, /* lock prefix */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* repne */
- { "(bad)", XX, XX, XX }, /* repz */
- { "hlt", XX, XX, XX },
- { "cmc", XX, XX, XX },
- { GRP3b },
- { GRP3S },
- /* f8 */
- { "clc", XX, XX, XX },
- { "stc", XX, XX, XX },
- { "cli", XX, XX, XX },
- { "sti", XX, XX, XX },
- { "cld", XX, XX, XX },
- { "std", XX, XX, XX },
- { GRP4 },
- { GRP5 },
-};
+ 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
-static const struct dis386 dis386_intel[] = {
- /* 00 */
- { "add", Eb, Gb, XX },
- { "add", Ev, Gv, XX },
- { "add", Gb, Eb, XX },
- { "add", Gv, Ev, XX },
- { "add", AL, Ib, XX },
- { "add", eAX, Iv, XX },
- { "push", es, XX, XX },
- { "pop", es, XX, XX },
- /* 08 */
- { "or", Eb, Gb, XX },
- { "or", Ev, Gv, XX },
- { "or", Gb, Eb, XX },
- { "or", Gv, Ev, XX },
- { "or", AL, Ib, XX },
- { "or", eAX, Iv, XX },
- { "push", cs, XX, XX },
- { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
- /* 10 */
- { "adc", Eb, Gb, XX },
- { "adc", Ev, Gv, XX },
- { "adc", Gb, Eb, XX },
- { "adc", Gv, Ev, XX },
- { "adc", AL, Ib, XX },
- { "adc", eAX, Iv, XX },
- { "push", ss, XX, XX },
- { "pop", ss, XX, XX },
- /* 18 */
- { "sbb", Eb, Gb, XX },
- { "sbb", Ev, Gv, XX },
- { "sbb", Gb, Eb, XX },
- { "sbb", Gv, Ev, XX },
- { "sbb", AL, Ib, XX },
- { "sbb", eAX, Iv, XX },
- { "push", ds, XX, XX },
- { "pop", ds, XX, XX },
- /* 20 */
- { "and", Eb, Gb, XX },
- { "and", Ev, Gv, XX },
- { "and", Gb, Eb, XX },
- { "and", Gv, Ev, XX },
- { "and", AL, Ib, XX },
- { "and", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG ES prefix */
- { "daa", XX, XX, XX },
- /* 28 */
- { "sub", Eb, Gb, XX },
- { "sub", Ev, Gv, XX },
- { "sub", Gb, Eb, XX },
- { "sub", Gv, Ev, XX },
- { "sub", AL, Ib, XX },
- { "sub", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG CS prefix */
- { "das", XX, XX, XX },
- /* 30 */
- { "xor", Eb, Gb, XX },
- { "xor", Ev, Gv, XX },
- { "xor", Gb, Eb, XX },
- { "xor", Gv, Ev, XX },
- { "xor", AL, Ib, XX },
- { "xor", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG SS prefix */
- { "aaa", XX, XX, XX },
- /* 38 */
- { "cmp", Eb, Gb, XX },
- { "cmp", Ev, Gv, XX },
- { "cmp", Gb, Eb, XX },
- { "cmp", Gv, Ev, XX },
- { "cmp", AL, Ib, XX },
- { "cmp", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG DS prefix */
- { "aas", XX, XX, XX },
- /* 40 */
- { "inc", RMeAX, XX, XX },
- { "inc", RMeCX, XX, XX },
- { "inc", RMeDX, XX, XX },
- { "inc", RMeBX, XX, XX },
- { "inc", RMeSP, XX, XX },
- { "inc", RMeBP, XX, XX },
- { "inc", RMeSI, XX, XX },
- { "inc", RMeDI, XX, XX },
- /* 48 */
- { "dec", RMeAX, XX, XX },
- { "dec", RMeCX, XX, XX },
- { "dec", RMeDX, XX, XX },
- { "dec", RMeBX, XX, XX },
- { "dec", RMeSP, XX, XX },
- { "dec", RMeBP, XX, XX },
- { "dec", RMeSI, XX, XX },
- { "dec", RMeDI, XX, XX },
- /* 50 */
- { "push", RMeAX, XX, XX },
- { "push", RMeCX, XX, XX },
- { "push", RMeDX, XX, XX },
- { "push", RMeBX, XX, XX },
- { "push", RMeSP, XX, XX },
- { "push", RMeBP, XX, XX },
- { "push", RMeSI, XX, XX },
- { "push", RMeDI, XX, XX },
- /* 58 */
- { "pop", RMeAX, XX, XX },
- { "pop", RMeCX, XX, XX },
- { "pop", RMeDX, XX, XX },
- { "pop", RMeBX, XX, XX },
- { "pop", RMeSP, XX, XX },
- { "pop", RMeBP, XX, XX },
- { "pop", RMeSI, XX, XX },
- { "pop", RMeDI, XX, XX },
- /* 60 */
- { "pusha", XX, XX, XX },
- { "popa", XX, XX, XX },
- { "bound", Gv, Ma, XX },
- { "arpl", Ew, Gw, XX },
- { "(bad)", XX, XX, XX }, /* seg fs */
- { "(bad)", XX, XX, XX }, /* seg gs */
- { "(bad)", XX, XX, XX }, /* op size prefix */
- { "(bad)", XX, XX, XX }, /* adr size prefix */
- /* 68 */
- { "push", Iv, XX, XX }, /* 386 book wrong */
- { "imul", Gv, Ev, Iv },
- { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
- { "imul", Gv, Ev, sIb },
- { "ins", Yb, indirDX, XX },
- { "ins", Yv, indirDX, XX },
- { "outs", indirDX, Xb, XX },
- { "outs", indirDX, Xv, XX },
- /* 70 */
- { "jo", Jb, XX, XX },
- { "jno", Jb, XX, XX },
- { "jb", Jb, XX, XX },
- { "jae", Jb, XX, XX },
- { "je", Jb, XX, XX },
- { "jne", Jb, XX, XX },
- { "jbe", Jb, XX, XX },
- { "ja", Jb, XX, XX },
- /* 78 */
- { "js", Jb, XX, XX },
- { "jns", Jb, XX, XX },
- { "jp", Jb, XX, XX },
- { "jnp", Jb, XX, XX },
- { "jl", Jb, XX, XX },
- { "jge", Jb, XX, XX },
- { "jle", Jb, XX, XX },
- { "jg", Jb, XX, XX },
- /* 80 */
- { GRP1b },
- { GRP1S },
- { "(bad)", XX, XX, XX },
- { GRP1Ss },
- { "test", Eb, Gb, XX },
- { "test", Ev, Gv, XX },
- { "xchg", Eb, Gb, XX },
- { "xchg", Ev, Gv, XX },
- /* 88 */
- { "mov", Eb, Gb, XX },
- { "mov", Ev, Gv, XX },
- { "mov", Gb, Eb, XX },
- { "mov", Gv, Ev, XX },
- { "mov", Ev, Sw, XX },
- { "lea", Gv, M, XX },
- { "mov", Sw, Ev, XX },
- { "pop", Ev, XX, XX },
- /* 90 */
- { "nop", XX, XX, XX },
- /* FIXME: NOP with REPz prefix is called PAUSE. */
- { "xchg", RMeCX, eAX, XX },
- { "xchg", RMeDX, eAX, XX },
- { "xchg", RMeBX, eAX, XX },
- { "xchg", RMeSP, eAX, XX },
- { "xchg", RMeBP, eAX, XX },
- { "xchg", RMeSI, eAX, XX },
- { "xchg", RMeDI, eAX, XX },
- /* 98 */
- { "cW", XX, XX, XX }, /* cwde and cbw */
- { "cR", XX, XX, XX }, /* cdq and cwd */
- { "lcall", Ap, XX, XX },
- { "(bad)", XX, XX, XX }, /* fwait */
- { "pushf", XX, XX, XX },
- { "popf", XX, XX, XX },
- { "sahf", XX, XX, XX },
- { "lahf", XX, XX, XX },
- /* a0 */
- { "mov", AL, Ob, XX },
- { "mov", eAX, Ov, XX },
- { "mov", Ob, AL, XX },
- { "mov", Ov, eAX, XX },
- { "movs", Yb, Xb, XX },
- { "movs", Yv, Xv, XX },
- { "cmps", Xb, Yb, XX },
- { "cmps", Xv, Yv, XX },
- /* a8 */
- { "test", AL, Ib, XX },
- { "test", eAX, Iv, XX },
- { "stos", Yb, AL, XX },
- { "stos", Yv, eAX, XX },
- { "lods", AL, Xb, XX },
- { "lods", eAX, Xv, XX },
- { "scas", AL, Yb, XX },
- { "scas", eAX, Yv, XX },
- /* b0 */
- { "mov", RMAL, Ib, XX },
- { "mov", RMCL, Ib, XX },
- { "mov", RMDL, Ib, XX },
- { "mov", RMBL, Ib, XX },
- { "mov", RMAH, Ib, XX },
- { "mov", RMCH, Ib, XX },
- { "mov", RMDH, Ib, XX },
- { "mov", RMBH, Ib, XX },
- /* b8 */
- { "mov", RMeAX, Iv, XX },
- { "mov", RMeCX, Iv, XX },
- { "mov", RMeDX, Iv, XX },
- { "mov", RMeBX, Iv, XX },
- { "mov", RMeSP, Iv, XX },
- { "mov", RMeBP, Iv, XX },
- { "mov", RMeSI, Iv, XX },
- { "mov", RMeDI, Iv, XX },
- /* c0 */
- { GRP2b },
- { GRP2S },
- { "ret", Iw, XX, XX },
- { "ret", XX, XX, XX },
- { "les", Gv, Mp, XX },
- { "lds", Gv, Mp, XX },
- { "mov", Eb, Ib, XX },
- { "mov", Ev, Iv, XX },
- /* c8 */
- { "enter", Iw, Ib, XX },
- { "leave", XX, XX, XX },
- { "lret", Iw, XX, XX },
- { "lret", XX, XX, XX },
- { "int3", XX, XX, XX },
- { "int", Ib, XX, XX },
- { "into", XX, XX, XX },
- { "iret", XX, XX, XX },
- /* d0 */
- { GRP2b_one },
- { GRP2S_one },
- { GRP2b_cl },
- { GRP2S_cl },
- { "aam", sIb, XX, XX },
- { "aad", sIb, XX, XX },
- { "(bad)", XX, XX, XX },
- { "xlat", DSBX, XX, XX },
- /* d8 */
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- /* e0 */
- { "loopne", Jb, XX, XX },
- { "loope", Jb, XX, XX },
- { "loop", Jb, XX, XX },
- { "jEcxz", Jb, XX, XX },
- { "in", AL, Ib, XX },
- { "in", eAX, Ib, XX },
- { "out", Ib, AL, XX },
- { "out", Ib, eAX, XX },
- /* e8 */
- { "call", Jv, XX, XX },
- { "jmp", Jv, XX, XX },
- { "ljmp", Ap, XX, XX },
- { "jmp", Jb, XX, XX },
- { "in", AL, indirDX, XX },
- { "in", eAX, indirDX, XX },
- { "out", indirDX, AL, XX },
- { "out", indirDX, eAX, XX },
- /* f0 */
- { "(bad)", XX, XX, XX }, /* lock prefix */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* repne */
- { "(bad)", XX, XX, XX }, /* repz */
- { "hlt", XX, XX, XX },
- { "cmc", XX, XX, XX },
- { GRP3b },
- { GRP3S },
- /* f8 */
- { "clc", XX, XX, XX },
- { "stc", XX, XX, XX },
- { "cli", XX, XX, XX },
- { "sti", XX, XX, XX },
- { "cld", XX, XX, XX },
- { "std", XX, XX, XX },
- { GRP4 },
- { GRP5 },
-};
+ Many of the above letters print nothing in Intel mode. See "putop"
+ for the details.
-/* 64bit mode is having some instruction set differences, so separate table is
- needed. */
-static const struct dis386 disx86_64_att[] = {
- /* 00 */
- { "addB", Eb, Gb, XX },
- { "addS", Ev, Gv, XX },
- { "addB", Gb, Eb, XX },
- { "addS", Gv, Ev, XX },
- { "addB", AL, Ib, XX },
- { "addS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 08 */
- { "orB", Eb, Gb, XX },
- { "orS", Ev, Gv, XX },
- { "orB", Gb, Eb, XX },
- { "orS", Gv, Ev, XX },
- { "orB", AL, Ib, XX },
- { "orS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
- /* 10 */
- { "adcB", Eb, Gb, XX },
- { "adcS", Ev, Gv, XX },
- { "adcB", Gb, Eb, XX },
- { "adcS", Gv, Ev, XX },
- { "adcB", AL, Ib, XX },
- { "adcS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 18 */
- { "sbbB", Eb, Gb, XX },
- { "sbbS", Ev, Gv, XX },
- { "sbbB", Gb, Eb, XX },
- { "sbbS", Gv, Ev, XX },
- { "sbbB", AL, Ib, XX },
- { "sbbS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 20 */
- { "andB", Eb, Gb, XX },
- { "andS", Ev, Gv, XX },
- { "andB", Gb, Eb, XX },
- { "andS", Gv, Ev, XX },
- { "andB", AL, Ib, XX },
- { "andS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG ES prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 28 */
- { "subB", Eb, Gb, XX },
- { "subS", Ev, Gv, XX },
- { "subB", Gb, Eb, XX },
- { "subS", Gv, Ev, XX },
- { "subB", AL, Ib, XX },
- { "subS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG CS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 30 */
- { "xorB", Eb, Gb, XX },
- { "xorS", Ev, Gv, XX },
- { "xorB", Gb, Eb, XX },
- { "xorS", Gv, Ev, XX },
- { "xorB", AL, Ib, XX },
- { "xorS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG SS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 38 */
- { "cmpB", Eb, Gb, XX },
- { "cmpS", Ev, Gv, XX },
- { "cmpB", Gb, Eb, XX },
- { "cmpS", Gv, Ev, XX },
- { "cmpB", AL, Ib, XX },
- { "cmpS", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG DS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- /* 40 */
- { "(bad)", XX, XX, XX }, /* REX prefix area. */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* 48 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* 50 */
- { "pushI", RMrAX, XX, XX },
- { "pushI", RMrCX, XX, XX },
- { "pushI", RMrDX, XX, XX },
- { "pushI", RMrBX, XX, XX },
- { "pushI", RMrSP, XX, XX },
- { "pushI", RMrBP, XX, XX },
- { "pushI", RMrSI, XX, XX },
- { "pushI", RMrDI, XX, XX },
- /* 58 */
- { "popI", RMrAX, XX, XX },
- { "popI", RMrCX, XX, XX },
- { "popI", RMrDX, XX, XX },
- { "popI", RMrBX, XX, XX },
- { "popI", RMrSP, XX, XX },
- { "popI", RMrBP, XX, XX },
- { "popI", RMrSI, XX, XX },
- { "popI", RMrDI, XX, XX },
- /* 60 */
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "movslR", Gv, Ed, XX },
- { "(bad)", XX, XX, XX }, /* seg fs */
- { "(bad)", XX, XX, XX }, /* seg gs */
- { "(bad)", XX, XX, XX }, /* op size prefix */
- { "(bad)", XX, XX, XX }, /* adr size prefix */
- /* 68 */
- { "pushI", Iq, XX, XX }, /* 386 book wrong */
- { "imulS", Gv, Ev, Iv },
- { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
- { "imulS", Gv, Ev, sIb },
- { "insb", Yb, indirDX, XX },
- { "insR", Yv, indirDX, XX },
- { "outsb", indirDX, Xb, XX },
- { "outsR", indirDX, Xv, XX },
- /* 70 */
- { "jo", Jb, XX, XX },
- { "jno", Jb, XX, XX },
- { "jb", Jb, XX, XX },
- { "jae", Jb, XX, XX },
- { "je", Jb, XX, XX },
- { "jne", Jb, XX, XX },
- { "jbe", Jb, XX, XX },
- { "ja", Jb, XX, XX },
- /* 78 */
- { "js", Jb, XX, XX },
- { "jns", Jb, XX, XX },
- { "jp", Jb, XX, XX },
- { "jnp", Jb, XX, XX },
- { "jl", Jb, XX, XX },
- { "jge", Jb, XX, XX },
- { "jle", Jb, XX, XX },
- { "jg", Jb, XX, XX },
- /* 80 */
- { GRP1b },
- { GRP1S },
- { "(bad)", XX, XX, XX },
- { GRP1Ss },
- { "testB", Eb, Gb, XX },
- { "testS", Ev, Gv, XX },
- { "xchgB", Eb, Gb, XX },
- { "xchgS", Ev, Gv, XX },
- /* 88 */
- { "movB", Eb, Gb, XX },
- { "movS", Ev, Gv, XX },
- { "movB", Gb, Eb, XX },
- { "movS", Gv, Ev, XX },
- { "movQ", Ev, Sw, XX },
- { "leaS", Gv, M, XX },
- { "movQ", Sw, Ev, XX },
- { "popI", Ev, XX, XX },
- /* 90 */
- { "nop", XX, XX, XX },
- /* FIXME: NOP with REPz prefix is called PAUSE. */
- { "xchgS", RMeCX, eAX, XX },
- { "xchgS", RMeDX, eAX, XX },
- { "xchgS", RMeBX, eAX, XX },
- { "xchgS", RMeSP, eAX, XX },
- { "xchgS", RMeBP, eAX, XX },
- { "xchgS", RMeSI, eAX, XX },
- { "xchgS", RMeDI, eAX, XX },
- /* 98 */
- { "cWtR", XX, XX, XX },
- { "cRtO", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* fwait */
- { "pushfI", XX, XX, XX },
- { "popfI", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* reserved. */
- /* a0 */
- { "movB", AL, Ob64, XX },
- { "movS", eAX, Ov64, XX },
- { "movB", Ob64, AL, XX },
- { "movS", Ov64, eAX, XX },
- { "movsb", Yb, Xb, XX },
- { "movsR", Yv, Xv, XX },
- { "cmpsb", Xb, Yb, XX },
- { "cmpsR", Xv, Yv, XX },
- /* a8 */
- { "testB", AL, Ib, XX },
- { "testS", eAX, Iv, XX },
- { "stosB", Yb, AL, XX },
- { "stosS", Yv, eAX, XX },
- { "lodsB", AL, Xb, XX },
- { "lodsS", eAX, Xv, XX },
- { "scasB", AL, Yb, XX },
- { "scasS", eAX, Yv, XX },
- /* b0 */
- { "movB", RMAL, Ib, XX },
- { "movB", RMCL, Ib, XX },
- { "movB", RMDL, Ib, XX },
- { "movB", RMBL, Ib, XX },
- { "movB", RMAH, Ib, XX },
- { "movB", RMCH, Ib, XX },
- { "movB", RMDH, Ib, XX },
- { "movB", RMBH, Ib, XX },
- /* b8 */
- { "movS", RMeAX, Iv64, XX },
- { "movS", RMeCX, Iv64, XX },
- { "movS", RMeDX, Iv64, XX },
- { "movS", RMeBX, Iv64, XX },
- { "movS", RMeSP, Iv64, XX },
- { "movS", RMeBP, Iv64, XX },
- { "movS", RMeSI, Iv64, XX },
- { "movS", RMeDI, Iv64, XX },
- /* c0 */
- { GRP2b },
- { GRP2S },
- { "retI", Iw, XX, XX },
- { "retI", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "ldsS", Gv, Mp, XX },
- { "movA", Eb, Ib, XX },
- { "movQ", Ev, Iv, XX },
- /* c8 */
- { "enterI", Iw, Ib, XX },
- { "leaveI", XX, XX, XX },
- { "lretP", Iw, XX, XX },
- { "lretP", XX, XX, XX },
- { "int3", XX, XX, XX },
- { "int", Ib, XX, XX },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "iretP", XX, XX, XX },
- /* d0 */
- { GRP2b_one },
- { GRP2S_one },
- { GRP2b_cl },
- { GRP2S_cl },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "xlat", DSBX, XX, XX },
- /* d8 */
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- { FLOAT },
- /* e0 */
- { "loopne", Jb, XX, XX },
- { "loope", Jb, XX, XX },
- { "loop", Jb, XX, XX },
- { "jEcxz", Jb, XX, XX },
- { "inB", AL, Ib, XX },
- { "inS", eAX, Ib, XX },
- { "outB", Ib, AL, XX },
- { "outS", Ib, eAX, XX },
- /* e8 */
- { "callI", Jv, XX, XX },
- { "jmpI", Jv, XX, XX },
- { "(bad)", XX, XX, XX }, /* reserved. */
- { "jmp", Jb, XX, XX },
- { "inB", AL, indirDX, XX },
- { "inS", eAX, indirDX, XX },
- { "outB", indirDX, AL, XX },
- { "outS", indirDX, eAX, XX },
- /* f0 */
- { "(bad)", XX, XX, XX }, /* lock prefix */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* repne */
- { "(bad)", XX, XX, XX }, /* repz */
- { "hlt", XX, XX, XX },
- { "cmc", XX, XX, XX },
- { GRP3b },
- { GRP3S },
- /* f8 */
- { "clc", XX, XX, XX },
- { "stc", XX, XX, XX },
- { "cli", XX, XX, XX },
- { "sti", XX, XX, XX },
- { "cld", XX, XX, XX },
- { "std", XX, XX, XX },
- { GRP4 },
- { GRP5 },
-};
+ Braces '{' and '}', and vertical bars '|', indicate alternative
+ mnemonic strings for AT&T and Intel. */
-static const struct dis386 dis386_64_intel[] = {
+static const struct dis386 dis386[] = {
/* 00 */
- { "add", Eb, Gb, XX },
- { "add", Ev, Gv, XX },
- { "add", Gb, Eb, XX },
- { "add", Gv, Ev, XX },
- { "add", AL, Ib, XX },
- { "add", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "addB", { Eb, Gb } },
+ { "addS", { Ev, Gv } },
+ { "addB", { Gb, Eb } },
+ { "addS", { Gv, Ev } },
+ { "addB", { AL, Ib } },
+ { "addS", { eAX, Iv } },
+ { X86_64_TABLE (X86_64_06) },
+ { X86_64_TABLE (X86_64_07) },
/* 08 */
- { "or", Eb, Gb, XX },
- { "or", Ev, Gv, XX },
- { "or", Gb, Eb, XX },
- { "or", Gv, Ev, XX },
- { "or", AL, Ib, XX },
- { "or", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
+ { "orB", { Eb, Gb } },
+ { "orS", { Ev, Gv } },
+ { "orB", { Gb, Eb } },
+ { "orS", { Gv, Ev } },
+ { "orB", { AL, Ib } },
+ { "orS", { eAX, Iv } },
+ { X86_64_TABLE (X86_64_0D) },
+ { "(bad)", { XX } }, /* 0x0f extended opcode escape */
/* 10 */
- { "adc", Eb, Gb, XX },
- { "adc", Ev, Gv, XX },
- { "adc", Gb, Eb, XX },
- { "adc", Gv, Ev, XX },
- { "adc", AL, Ib, XX },
- { "adc", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "adcB", { Eb, Gb } },
+ { "adcS", { Ev, Gv } },
+ { "adcB", { Gb, Eb } },
+ { "adcS", { Gv, Ev } },
+ { "adcB", { AL, Ib } },
+ { "adcS", { eAX, Iv } },
+ { X86_64_TABLE (X86_64_16) },
+ { X86_64_TABLE (X86_64_17) },
/* 18 */
- { "sbb", Eb, Gb, XX },
- { "sbb", Ev, Gv, XX },
- { "sbb", Gb, Eb, XX },
- { "sbb", Gv, Ev, XX },
- { "sbb", AL, Ib, XX },
- { "sbb", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "sbbB", { Eb, Gb } },
+ { "sbbS", { Ev, Gv } },
+ { "sbbB", { Gb, Eb } },
+ { "sbbS", { Gv, Ev } },
+ { "sbbB", { AL, Ib } },
+ { "sbbS", { eAX, Iv } },
+ { X86_64_TABLE (X86_64_1E) },
+ { X86_64_TABLE (X86_64_1F) },
/* 20 */
- { "and", Eb, Gb, XX },
- { "and", Ev, Gv, XX },
- { "and", Gb, Eb, XX },
- { "and", Gv, Ev, XX },
- { "and", AL, Ib, XX },
- { "and", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG ES prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "andB", { Eb, Gb } },
+ { "andS", { Ev, Gv } },
+ { "andB", { Gb, Eb } },
+ { "andS", { Gv, Ev } },
+ { "andB", { AL, Ib } },
+ { "andS", { eAX, Iv } },
+ { "(bad)", { XX } }, /* SEG ES prefix */
+ { X86_64_TABLE (X86_64_27) },
/* 28 */
- { "sub", Eb, Gb, XX },
- { "sub", Ev, Gv, XX },
- { "sub", Gb, Eb, XX },
- { "sub", Gv, Ev, XX },
- { "sub", AL, Ib, XX },
- { "sub", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG CS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "subB", { Eb, Gb } },
+ { "subS", { Ev, Gv } },
+ { "subB", { Gb, Eb } },
+ { "subS", { Gv, Ev } },
+ { "subB", { AL, Ib } },
+ { "subS", { eAX, Iv } },
+ { "(bad)", { XX } }, /* SEG CS prefix */
+ { X86_64_TABLE (X86_64_2F) },
/* 30 */
- { "xor", Eb, Gb, XX },
- { "xor", Ev, Gv, XX },
- { "xor", Gb, Eb, XX },
- { "xor", Gv, Ev, XX },
- { "xor", AL, Ib, XX },
- { "xor", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG SS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "xorB", { Eb, Gb } },
+ { "xorS", { Ev, Gv } },
+ { "xorB", { Gb, Eb } },
+ { "xorS", { Gv, Ev } },
+ { "xorB", { AL, Ib } },
+ { "xorS", { eAX, Iv } },
+ { "(bad)", { XX } }, /* SEG SS prefix */
+ { X86_64_TABLE (X86_64_37) },
/* 38 */
- { "cmp", Eb, Gb, XX },
- { "cmp", Ev, Gv, XX },
- { "cmp", Gb, Eb, XX },
- { "cmp", Gv, Ev, XX },
- { "cmp", AL, Ib, XX },
- { "cmp", eAX, Iv, XX },
- { "(bad)", XX, XX, XX }, /* SEG DS prefix */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "cmpB", { Eb, Gb } },
+ { "cmpS", { Ev, Gv } },
+ { "cmpB", { Gb, Eb } },
+ { "cmpS", { Gv, Ev } },
+ { "cmpB", { AL, Ib } },
+ { "cmpS", { eAX, Iv } },
+ { "(bad)", { XX } }, /* SEG DS prefix */
+ { X86_64_TABLE (X86_64_3F) },
/* 40 */
- { "(bad)", XX, XX, XX }, /* REX prefix area. */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "inc{S|}", { RMeAX } },
+ { "inc{S|}", { RMeCX } },
+ { "inc{S|}", { RMeDX } },
+ { "inc{S|}", { RMeBX } },
+ { "inc{S|}", { RMeSP } },
+ { "inc{S|}", { RMeBP } },
+ { "inc{S|}", { RMeSI } },
+ { "inc{S|}", { RMeDI } },
/* 48 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "dec{S|}", { RMeAX } },
+ { "dec{S|}", { RMeCX } },
+ { "dec{S|}", { RMeDX } },
+ { "dec{S|}", { RMeBX } },
+ { "dec{S|}", { RMeSP } },
+ { "dec{S|}", { RMeBP } },
+ { "dec{S|}", { RMeSI } },
+ { "dec{S|}", { RMeDI } },
/* 50 */
- { "push", RMrAX, XX, XX },
- { "push", RMrCX, XX, XX },
- { "push", RMrDX, XX, XX },
- { "push", RMrBX, XX, XX },
- { "push", RMrSP, XX, XX },
- { "push", RMrBP, XX, XX },
- { "push", RMrSI, XX, XX },
- { "push", RMrDI, XX, XX },
+ { "pushV", { RMrAX } },
+ { "pushV", { RMrCX } },
+ { "pushV", { RMrDX } },
+ { "pushV", { RMrBX } },
+ { "pushV", { RMrSP } },
+ { "pushV", { RMrBP } },
+ { "pushV", { RMrSI } },
+ { "pushV", { RMrDI } },
/* 58 */
- { "pop", RMrAX, XX, XX },
- { "pop", RMrCX, XX, XX },
- { "pop", RMrDX, XX, XX },
- { "pop", RMrBX, XX, XX },
- { "pop", RMrSP, XX, XX },
- { "pop", RMrBP, XX, XX },
- { "pop", RMrSI, XX, XX },
- { "pop", RMrDI, XX, XX },
+ { "popV", { RMrAX } },
+ { "popV", { RMrCX } },
+ { "popV", { RMrDX } },
+ { "popV", { RMrBX } },
+ { "popV", { RMrSP } },
+ { "popV", { RMrBP } },
+ { "popV", { RMrSI } },
+ { "popV", { RMrDI } },
/* 60 */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "movsx", Gv, Ed, XX },
- { "(bad)", XX, XX, XX }, /* seg fs */
- { "(bad)", XX, XX, XX }, /* seg gs */
- { "(bad)", XX, XX, XX }, /* op size prefix */
- { "(bad)", XX, XX, XX }, /* adr size prefix */
+ { X86_64_TABLE (X86_64_60) },
+ { X86_64_TABLE (X86_64_61) },
+ { X86_64_TABLE (X86_64_62) },
+ { X86_64_TABLE (X86_64_63) },
+ { "(bad)", { XX } }, /* seg fs */
+ { "(bad)", { XX } }, /* seg gs */
+ { "(bad)", { XX } }, /* op size prefix */
+ { "(bad)", { XX } }, /* adr size prefix */
/* 68 */
- { "push", Iq, XX, XX }, /* 386 book wrong */
- { "imul", Gv, Ev, Iv },
- { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
- { "imul", Gv, Ev, sIb },
- { "ins", Yb, indirDX, XX },
- { "ins", Yv, indirDX, XX },
- { "outs", indirDX, Xb, XX },
- { "outs", indirDX, Xv, XX },
+ { "pushT", { Iq } },
+ { "imulS", { Gv, Ev, Iv } },
+ { "pushT", { sIb } },
+ { "imulS", { Gv, Ev, sIb } },
+ { "ins{b|}", { Ybr, indirDX } },
+ { X86_64_TABLE (X86_64_6D) },
+ { "outs{b|}", { indirDXr, Xb } },
+ { X86_64_TABLE (X86_64_6F) },
/* 70 */
- { "jo", Jb, XX, XX },
- { "jno", Jb, XX, XX },
- { "jb", Jb, XX, XX },
- { "jae", Jb, XX, XX },
- { "je", Jb, XX, XX },
- { "jne", Jb, XX, XX },
- { "jbe", Jb, XX, XX },
- { "ja", Jb, XX, XX },
+ { "joH", { Jb, XX, cond_jump_flag } },
+ { "jnoH", { Jb, XX, cond_jump_flag } },
+ { "jbH", { Jb, XX, cond_jump_flag } },
+ { "jaeH", { Jb, XX, cond_jump_flag } },
+ { "jeH", { Jb, XX, cond_jump_flag } },
+ { "jneH", { Jb, XX, cond_jump_flag } },
+ { "jbeH", { Jb, XX, cond_jump_flag } },
+ { "jaH", { Jb, XX, cond_jump_flag } },
/* 78 */
- { "js", Jb, XX, XX },
- { "jns", Jb, XX, XX },
- { "jp", Jb, XX, XX },
- { "jnp", Jb, XX, XX },
- { "jl", Jb, XX, XX },
- { "jge", Jb, XX, XX },
- { "jle", Jb, XX, XX },
- { "jg", Jb, XX, XX },
+ { "jsH", { Jb, XX, cond_jump_flag } },
+ { "jnsH", { Jb, XX, cond_jump_flag } },
+ { "jpH", { Jb, XX, cond_jump_flag } },
+ { "jnpH", { Jb, XX, cond_jump_flag } },
+ { "jlH", { Jb, XX, cond_jump_flag } },
+ { "jgeH", { Jb, XX, cond_jump_flag } },
+ { "jleH", { Jb, XX, cond_jump_flag } },
+ { "jgH", { Jb, XX, cond_jump_flag } },
/* 80 */
- { GRP1b },
- { GRP1S },
- { "(bad)", XX, XX, XX },
- { GRP1Ss },
- { "test", Eb, Gb, XX },
- { "test", Ev, Gv, XX },
- { "xchg", Eb, Gb, XX },
- { "xchg", Ev, Gv, XX },
+ { REG_TABLE (REG_80) },
+ { REG_TABLE (REG_81) },
+ { "(bad)", { XX } },
+ { REG_TABLE (REG_82) },
+ { "testB", { Eb, Gb } },
+ { "testS", { Ev, Gv } },
+ { "xchgB", { Eb, Gb } },
+ { "xchgS", { Ev, Gv } },
/* 88 */
- { "mov", Eb, Gb, XX },
- { "mov", Ev, Gv, XX },
- { "mov", Gb, Eb, XX },
- { "mov", Gv, Ev, XX },
- { "mov", Ev, Sw, XX },
- { "lea", Gv, M, XX },
- { "mov", Sw, Ev, XX },
- { "pop", Ev, XX, XX },
+ { "movB", { Eb, Gb } },
+ { "movS", { Ev, Gv } },
+ { "movB", { Gb, Eb } },
+ { "movS", { Gv, Ev } },
+ { "movD", { Sv, Sw } },
+ { MOD_TABLE (MOD_8D) },
+ { "movD", { Sw, Sv } },
+ { REG_TABLE (REG_8F) },
/* 90 */
- { "nop", XX, XX, XX },
- /* FIXME: NOP with REPz prefix is called PAUSE. */
- { "xchg", RMeCX, eAX, XX },
- { "xchg", RMeDX, eAX, XX },
- { "xchg", RMeBX, eAX, XX },
- { "xchg", RMeSP, eAX, XX },
- { "xchg", RMeBP, eAX, XX },
- { "xchg", RMeSI, eAX, XX },
- { "xchg", RMeDI, eAX, XX },
+ { PREFIX_TABLE (PREFIX_90) },
+ { "xchgS", { RMeCX, eAX } },
+ { "xchgS", { RMeDX, eAX } },
+ { "xchgS", { RMeBX, eAX } },
+ { "xchgS", { RMeSP, eAX } },
+ { "xchgS", { RMeBP, eAX } },
+ { "xchgS", { RMeSI, eAX } },
+ { "xchgS", { RMeDI, eAX } },
/* 98 */
- { "cW", XX, XX, XX }, /* cwde and cbw */
- { "cR", XX, XX, XX }, /* cdq and cwd */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* fwait */
- { "pushf", XX, XX, XX },
- { "popf", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
+ { "cW{t|}R", { XX } },
+ { "cR{t|}O", { XX } },
+ { X86_64_TABLE (X86_64_9A) },
+ { "(bad)", { XX } }, /* fwait */
+ { "pushfT", { XX } },
+ { "popfT", { XX } },
+ { "sahf", { XX } },
+ { "lahf", { XX } },
/* a0 */
- { "mov", AL, Ob, XX },
- { "mov", eAX, Ov, XX },
- { "mov", Ob, AL, XX },
- { "mov", Ov, eAX, XX },
- { "movs", Yb, Xb, XX },
- { "movs", Yv, Xv, XX },
- { "cmps", Xb, Yb, XX },
- { "cmps", Xv, Yv, XX },
+ { "movB", { AL, Ob } },
+ { "movS", { eAX, Ov } },
+ { "movB", { Ob, AL } },
+ { "movS", { Ov, eAX } },
+ { "movs{b|}", { Ybr, Xb } },
+ { "movs{R|}", { Yvr, Xv } },
+ { "cmps{b|}", { Xb, Yb } },
+ { "cmps{R|}", { Xv, Yv } },
/* a8 */
- { "test", AL, Ib, XX },
- { "test", eAX, Iv, XX },
- { "stos", Yb, AL, XX },
- { "stos", Yv, eAX, XX },
- { "lods", AL, Xb, XX },
- { "lods", eAX, Xv, XX },
- { "scas", AL, Yb, XX },
- { "scas", eAX, Yv, XX },
+ { "testB", { AL, Ib } },
+ { "testS", { eAX, Iv } },
+ { "stosB", { Ybr, AL } },
+ { "stosS", { Yvr, eAX } },
+ { "lodsB", { ALr, Xb } },
+ { "lodsS", { eAXr, Xv } },
+ { "scasB", { AL, Yb } },
+ { "scasS", { eAX, Yv } },
/* b0 */
- { "mov", RMAL, Ib, XX },
- { "mov", RMCL, Ib, XX },
- { "mov", RMDL, Ib, XX },
- { "mov", RMBL, Ib, XX },
- { "mov", RMAH, Ib, XX },
- { "mov", RMCH, Ib, XX },
- { "mov", RMDH, Ib, XX },
- { "mov", RMBH, Ib, XX },
+ { "movB", { RMAL, Ib } },
+ { "movB", { RMCL, Ib } },
+ { "movB", { RMDL, Ib } },
+ { "movB", { RMBL, Ib } },
+ { "movB", { RMAH, Ib } },
+ { "movB", { RMCH, Ib } },
+ { "movB", { RMDH, Ib } },
+ { "movB", { RMBH, Ib } },
/* b8 */
- { "mov", RMeAX, Iv, XX },
- { "mov", RMeCX, Iv, XX },
- { "mov", RMeDX, Iv, XX },
- { "mov", RMeBX, Iv, XX },
- { "mov", RMeSP, Iv, XX },
- { "mov", RMeBP, Iv, XX },
- { "mov", RMeSI, Iv, XX },
- { "mov", RMeDI, Iv, XX },
+ { "movS", { RMeAX, Iv64 } },
+ { "movS", { RMeCX, Iv64 } },
+ { "movS", { RMeDX, Iv64 } },
+ { "movS", { RMeBX, Iv64 } },
+ { "movS", { RMeSP, Iv64 } },
+ { "movS", { RMeBP, Iv64 } },
+ { "movS", { RMeSI, Iv64 } },
+ { "movS", { RMeDI, Iv64 } },
/* c0 */
- { GRP2b },
- { GRP2S },
- { "ret", Iw, XX, XX },
- { "ret", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "lds", Gv, Mp, XX },
- { "mov", Eb, Ib, XX },
- { "mov", Ev, Iv, XX },
+ { REG_TABLE (REG_C0) },
+ { REG_TABLE (REG_C1) },
+ { "retT", { Iw } },
+ { "retT", { XX } },
+ { X86_64_TABLE (X86_64_C4) },
+ { X86_64_TABLE (X86_64_C5) },
+ { REG_TABLE (REG_C6) },
+ { REG_TABLE (REG_C7) },
/* c8 */
- { "enter", Iw, Ib, XX },
- { "leave", XX, XX, XX },
- { "lret", Iw, XX, XX },
- { "lret", XX, XX, XX },
- { "int3", XX, XX, XX },
- { "int", Ib, XX, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "iret", XX, XX, XX },
+ { "enterT", { Iw, Ib } },
+ { "leaveT", { XX } },
+ { "lretP", { Iw } },
+ { "lretP", { XX } },
+ { "int3", { XX } },
+ { "int", { Ib } },
+ { X86_64_TABLE (X86_64_CE) },
+ { "iretP", { XX } },
/* d0 */
- { GRP2b_one },
- { GRP2S_one },
- { GRP2b_cl },
- { GRP2S_cl },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "xlat", DSBX, XX, XX },
+ { REG_TABLE (REG_D0) },
+ { REG_TABLE (REG_D1) },
+ { REG_TABLE (REG_D2) },
+ { REG_TABLE (REG_D3) },
+ { X86_64_TABLE (X86_64_D4) },
+ { X86_64_TABLE (X86_64_D5) },
+ { "(bad)", { XX } },
+ { "xlat", { DSBX } },
/* d8 */
{ FLOAT },
{ FLOAT },
{ FLOAT },
{ FLOAT },
/* e0 */
- { "loopne", Jb, XX, XX },
- { "loope", Jb, XX, XX },
- { "loop", Jb, XX, XX },
- { "jEcxz", Jb, XX, XX },
- { "in", AL, Ib, XX },
- { "in", eAX, Ib, XX },
- { "out", Ib, AL, XX },
- { "out", Ib, eAX, XX },
- /* e8 */
- { "call", Jv, XX, XX },
- { "jmp", Jv, XX, XX },
- { "(bad)", XX, XX, XX }, /* Reserved. */
- { "jmp", Jb, XX, XX },
- { "in", AL, indirDX, XX },
- { "in", eAX, indirDX, XX },
- { "out", indirDX, AL, XX },
- { "out", indirDX, eAX, XX },
- /* f0 */
- { "(bad)", XX, XX, XX }, /* lock prefix */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX }, /* repne */
- { "(bad)", XX, XX, XX }, /* repz */
- { "hlt", XX, XX, XX },
- { "cmc", XX, XX, XX },
- { GRP3b },
- { GRP3S },
- /* f8 */
- { "clc", XX, XX, XX },
- { "stc", XX, XX, XX },
- { "cli", XX, XX, XX },
- { "sti", XX, XX, XX },
- { "cld", XX, XX, XX },
- { "std", XX, XX, XX },
- { GRP4 },
- { GRP5 },
-};
-
-static const struct dis386 dis386_twobyte_att[] = {
- /* 00 */
- { GRP6 },
- { GRP7 },
- { "larS", Gv, Ew, XX },
- { "lslS", Gv, Ew, XX },
- { "(bad)", XX, XX, XX },
- { "syscall", XX, XX, XX },
- { "clts", XX, XX, XX },
- { "sysretP", XX, XX, XX },
- /* 08 */
- { "invd", XX, XX, XX },
- { "wbinvd", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "ud2a", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { GRPAMD },
- { "femms", XX, XX, XX },
- { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
- /* 10 */
- { PREGRP8 },
- { PREGRP9 },
- { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
- { "movlpX", EX, XM, SIMD_Fixup, 'h' },
- { "unpcklpX", XM, EX, XX },
- { "unpckhpX", XM, EX, XX },
- { "movhpX", XM, EX, SIMD_Fixup, 'l' },
- { "movhpX", EX, XM, SIMD_Fixup, 'l' },
- /* 18 */
- { GRP14 },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* 20 */
- /* these are all backward in appendix A of the intel book */
- { "movL", Rm, Cm, XX },
- { "movL", Rm, Dm, XX },
- { "movL", Cm, Rm, XX },
- { "movL", Dm, Rm, XX },
- { "movL", Rd, Td, XX },
- { "(bad)", XX, XX, XX },
- { "movL", Td, Rd, XX },
- { "(bad)", XX, XX, XX },
- /* 28 */
- { "movapX", XM, EX, XX },
- { "movapX", EX, XM, XX },
- { PREGRP2 },
- { "movntpX", Ev, XM, XX },
- { PREGRP4 },
- { PREGRP3 },
- { "ucomisX", XM,EX, XX },
- { "comisX", XM,EX, XX },
- /* 30 */
- { "wrmsr", XX, XX, XX },
- { "rdtsc", XX, XX, XX },
- { "rdmsr", XX, XX, XX },
- { "rdpmc", XX, XX, XX },
- { "sysenter", XX, XX, XX },
- { "sysexit", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* 38 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* 40 */
- { "cmovo", Gv, Ev, XX },
- { "cmovno", Gv, Ev, XX },
- { "cmovb", Gv, Ev, XX },
- { "cmovae", Gv, Ev, XX },
- { "cmove", Gv, Ev, XX },
- { "cmovne", Gv, Ev, XX },
- { "cmovbe", Gv, Ev, XX },
- { "cmova", Gv, Ev, XX },
- /* 48 */
- { "cmovs", Gv, Ev, XX },
- { "cmovns", Gv, Ev, XX },
- { "cmovp", Gv, Ev, XX },
- { "cmovnp", Gv, Ev, XX },
- { "cmovl", Gv, Ev, XX },
- { "cmovge", Gv, Ev, XX },
- { "cmovle", Gv, Ev, XX },
- { "cmovg", Gv, Ev, XX },
- /* 50 */
- { "movmskpX", Gv, EX, XX },
- { PREGRP13 },
- { PREGRP12 },
- { PREGRP11 },
- { "andpX", XM, EX, XX },
- { "andnpX", XM, EX, XX },
- { "orpX", XM, EX, XX },
- { "xorpX", XM, EX, XX },
- /* 58 */
- { PREGRP0 },
- { PREGRP10 },
- { PREGRP17 },
- { PREGRP16 },
- { PREGRP14 },
- { PREGRP7 },
- { PREGRP5 },
- { PREGRP6 },
- /* 60 */
- { "punpcklbw", MX, EM, XX },
- { "punpcklwd", MX, EM, XX },
- { "punpckldq", MX, EM, XX },
- { "packsswb", MX, EM, XX },
- { "pcmpgtb", MX, EM, XX },
- { "pcmpgtw", MX, EM, XX },
- { "pcmpgtd", MX, EM, XX },
- { "packuswb", MX, EM, XX },
- /* 68 */
- { "punpckhbw", MX, EM, XX },
- { "punpckhwd", MX, EM, XX },
- { "punpckhdq", MX, EM, XX },
- { "packssdw", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { PREGRP24 },
- { "movd", MX, Ed, XX },
- { PREGRP19 },
- /* 70 */
- { PREGRP22 },
- { GRP10 },
- { GRP11 },
- { GRP12 },
- { "pcmpeqb", MX, EM, XX },
- { "pcmpeqw", MX, EM, XX },
- { "pcmpeqd", MX, EM, XX },
- { "emms", XX, XX, XX },
- /* 78 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { PREGRP23 },
- { PREGRP20 },
- /* 80 */
- { "jo", Jv, XX, XX },
- { "jno", Jv, XX, XX },
- { "jb", Jv, XX, XX },
- { "jae", Jv, XX, XX },
- { "je", Jv, XX, XX },
- { "jne", Jv, XX, XX },
- { "jbe", Jv, XX, XX },
- { "ja", Jv, XX, XX },
- /* 88 */
- { "js", Jv, XX, XX },
- { "jns", Jv, XX, XX },
- { "jp", Jv, XX, XX },
- { "jnp", Jv, XX, XX },
- { "jl", Jv, XX, XX },
- { "jge", Jv, XX, XX },
- { "jle", Jv, XX, XX },
- { "jg", Jv, XX, XX },
- /* 90 */
- { "seto", Eb, XX, XX },
- { "setno", Eb, XX, XX },
- { "setb", Eb, XX, XX },
- { "setae", Eb, XX, XX },
- { "sete", Eb, XX, XX },
- { "setne", Eb, XX, XX },
- { "setbe", Eb, XX, XX },
- { "seta", Eb, XX, XX },
- /* 98 */
- { "sets", Eb, XX, XX },
- { "setns", Eb, XX, XX },
- { "setp", Eb, XX, XX },
- { "setnp", Eb, XX, XX },
- { "setl", Eb, XX, XX },
- { "setge", Eb, XX, XX },
- { "setle", Eb, XX, XX },
- { "setg", Eb, XX, XX },
- /* a0 */
- { "pushI", fs, XX, XX },
- { "popI", fs, XX, XX },
- { "cpuid", XX, XX, XX },
- { "btS", Ev, Gv, XX },
- { "shldS", Ev, Gv, Ib },
- { "shldS", Ev, Gv, CL },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- /* a8 */
- { "pushI", gs, XX, XX },
- { "popI", gs, XX, XX },
- { "rsm", XX, XX, XX },
- { "btsS", Ev, Gv, XX },
- { "shrdS", Ev, Gv, Ib },
- { "shrdS", Ev, Gv, CL },
- { GRP13 },
- { "imulS", Gv, Ev, XX },
- /* b0 */
- { "cmpxchgB", Eb, Gb, XX },
- { "cmpxchgS", Ev, Gv, XX },
- { "lssS", Gv, Mp, XX },
- { "btrS", Ev, Gv, XX },
- { "lfsS", Gv, Mp, XX },
- { "lgsS", Gv, Mp, XX },
- { "movzbR", Gv, Eb, XX },
- { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */
- /* b8 */
- { "(bad)", XX, XX, XX },
- { "ud2b", XX, XX, XX },
- { GRP8 },
- { "btcS", Ev, Gv, XX },
- { "bsfS", Gv, Ev, XX },
- { "bsrS", Gv, Ev, XX },
- { "movsbR", Gv, Eb, XX },
- { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */
- /* c0 */
- { "xaddB", Eb, Gb, XX },
- { "xaddS", Ev, Gv, XX },
- { PREGRP1 },
- { "movntiS", Ev, Gv, XX },
- { "pinsrw", MX, Ev, Ib },
- { "pextrw", Ev, MX, Ib },
- { "shufpX", XM, EX, Ib },
- { GRP9 },
- /* c8 */
- { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
- { "bswap", RMeCX, XX, XX },
- { "bswap", RMeDX, XX, XX },
- { "bswap", RMeBX, XX, XX },
- { "bswap", RMeSP, XX, XX },
- { "bswap", RMeBP, XX, XX },
- { "bswap", RMeSI, XX, XX },
- { "bswap", RMeDI, XX, XX },
- /* d0 */
- { "(bad)", XX, XX, XX },
- { "psrlw", MX, EM, XX },
- { "psrld", MX, EM, XX },
- { "psrlq", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { "pmullw", MX, EM, XX },
- { PREGRP21 },
- { "pmovmskb", Ev, MX, XX },
- /* d8 */
- { "psubusb", MX, EM, XX },
- { "psubusw", MX, EM, XX },
- { "pminub", MX, EM, XX },
- { "pand", MX, EM, XX },
- { "paddusb", MX, EM, XX },
- { "paddusw", MX, EM, XX },
- { "pmaxub", MX, EM, XX },
- { "pandn", MX, EM, XX },
- /* e0 */
- { "pavgb", MX, EM, XX },
- { "psraw", MX, EM, XX },
- { "psrad", MX, EM, XX },
- { "pavgw", MX, EM, XX },
- { "pmulhuw", MX, EM, XX },
- { "pmulhw", MX, EM, XX },
- { PREGRP15 },
- { "movntq", Ev, MX, XX },
+ { "loopneFH", { Jb, XX, loop_jcxz_flag } },
+ { "loopeFH", { Jb, XX, loop_jcxz_flag } },
+ { "loopFH", { Jb, XX, loop_jcxz_flag } },
+ { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
+ { "inB", { AL, Ib } },
+ { "inG", { zAX, Ib } },
+ { "outB", { Ib, AL } },
+ { "outG", { Ib, zAX } },
/* e8 */
- { "psubsb", MX, EM, XX },
- { "psubsw", MX, EM, XX },
- { "pminsw", MX, EM, XX },
- { "por", MX, EM, XX },
- { "paddsb", MX, EM, XX },
- { "paddsw", MX, EM, XX },
- { "pmaxsw", MX, EM, XX },
- { "pxor", MX, EM, XX },
+ { "callT", { Jv } },
+ { "jmpT", { Jv } },
+ { X86_64_TABLE (X86_64_EA) },
+ { "jmp", { Jb } },
+ { "inB", { AL, indirDX } },
+ { "inG", { zAX, indirDX } },
+ { "outB", { indirDX, AL } },
+ { "outG", { indirDX, zAX } },
/* f0 */
- { "(bad)", XX, XX, XX },
- { "psllw", MX, EM, XX },
- { "pslld", MX, EM, XX },
- { "psllq", MX, EM, XX },
- { "pmuludq", MX, EM, XX },
- { "pmaddwd", MX, EM, XX },
- { "psadbw", MX, EM, XX },
- { PREGRP18 },
+ { "(bad)", { XX } }, /* lock prefix */
+ { "icebp", { XX } },
+ { "(bad)", { XX } }, /* repne */
+ { "(bad)", { XX } }, /* repz */
+ { "hlt", { XX } },
+ { "cmc", { XX } },
+ { REG_TABLE (REG_F6) },
+ { REG_TABLE (REG_F7) },
/* f8 */
- { "psubb", MX, EM, XX },
- { "psubw", MX, EM, XX },
- { "psubd", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { "paddb", MX, EM, XX },
- { "paddw", MX, EM, XX },
- { "paddd", MX, EM, XX },
- { "(bad)", XX, XX, XX }
+ { "clc", { XX } },
+ { "stc", { XX } },
+ { "cli", { XX } },
+ { "sti", { XX } },
+ { "cld", { XX } },
+ { "std", { XX } },
+ { REG_TABLE (REG_FE) },
+ { REG_TABLE (REG_FF) },
};
-static const struct dis386 dis386_twobyte_intel[] = {
+static const struct dis386 dis386_twobyte[] = {
/* 00 */
- { GRP6 },
- { GRP7 },
- { "lar", Gv, Ew, XX },
- { "lsl", Gv, Ew, XX },
- { "(bad)", XX, XX, XX },
- { "syscall", XX, XX, XX },
- { "clts", XX, XX, XX },
- { "sysretP", XX, XX, XX },
+ { REG_TABLE (REG_0F00 ) },
+ { REG_TABLE (REG_0F01 ) },
+ { "larS", { Gv, Ew } },
+ { "lslS", { Gv, Ew } },
+ { "(bad)", { XX } },
+ { "syscall", { XX } },
+ { "clts", { XX } },
+ { "sysretP", { XX } },
/* 08 */
- { "invd", XX, XX, XX },
- { "wbinvd", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "ud2a", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { GRPAMD },
- { "femms" , XX, XX, XX},
- { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
+ { "invd", { XX } },
+ { "wbinvd", { XX } },
+ { "(bad)", { XX } },
+ { "ud2a", { XX } },
+ { "(bad)", { XX } },
+ { REG_TABLE (REG_0F0E) },
+ { "femms", { XX } },
+ { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
/* 10 */
- { PREGRP8 },
- { PREGRP9 },
- { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
- { "movlpX", EX, XM, SIMD_Fixup, 'h' },
- { "unpcklpX", XM, EX, XX },
- { "unpckhpX", XM, EX, XX },
- { "movhpX", XM, EX, SIMD_Fixup, 'l' },
- { "movhpX", EX, XM, SIMD_Fixup, 'l' },
+ { PREFIX_TABLE (PREFIX_0F10) },
+ { PREFIX_TABLE (PREFIX_0F11) },
+ { PREFIX_TABLE (PREFIX_0F12) },
+ { MOD_TABLE (MOD_0F13) },
+ { "unpcklpX", { XM, EXx } },
+ { "unpckhpX", { XM, EXx } },
+ { PREFIX_TABLE (PREFIX_0F16) },
+ { MOD_TABLE (MOD_0F17) },
/* 18 */
- { GRP14 },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { REG_TABLE (REG_0F18) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "nopQ", { Ev } },
/* 20 */
- /* these are all backward in appendix A of the intel book */
- { "mov", Rm, Cm, XX },
- { "mov", Rm, Dm, XX },
- { "mov", Cm, Rm, XX },
- { "mov", Dm, Rm, XX },
- { "mov", Rd, Td, XX },
- { "(bad)", XX, XX, XX },
- { "mov", Td, Rd, XX },
- { "(bad)", XX, XX, XX },
+ { MOD_TABLE (MOD_0F20) },
+ { MOD_TABLE (MOD_0F21) },
+ { MOD_TABLE (MOD_0F22) },
+ { MOD_TABLE (MOD_0F23) },
+ { MOD_TABLE (MOD_0F24) },
+ { THREE_BYTE_TABLE (THREE_BYTE_0F25) },
+ { MOD_TABLE (MOD_0F26) },
+ { "(bad)", { XX } },
/* 28 */
- { "movapX", XM, EX, XX },
- { "movapX", EX, XM, XX },
- { PREGRP2 },
- { "movntpX", Ev, XM, XX },
- { PREGRP4 },
- { PREGRP3 },
- { "ucomisX", XM,EX, XX },
- { "comisX", XM,EX, XX },
+ { "movapX", { XM, EXx } },
+ { "movapX", { EXx, XM } },
+ { PREFIX_TABLE (PREFIX_0F2A) },
+ { PREFIX_TABLE (PREFIX_0F2B) },
+ { PREFIX_TABLE (PREFIX_0F2C) },
+ { PREFIX_TABLE (PREFIX_0F2D) },
+ { PREFIX_TABLE (PREFIX_0F2E) },
+ { PREFIX_TABLE (PREFIX_0F2F) },
/* 30 */
- { "wrmsr", XX, XX, XX },
- { "rdtsc", XX, XX, XX },
- { "rdmsr", XX, XX, XX },
- { "rdpmc", XX, XX, XX },
- { "sysenter", XX, XX, XX },
- { "sysexit", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "wrmsr", { XX } },
+ { "rdtsc", { XX } },
+ { "rdmsr", { XX } },
+ { "rdpmc", { XX } },
+ { "sysenter", { XX } },
+ { "sysexit", { XX } },
+ { "(bad)", { XX } },
+ { "getsec", { XX } },
/* 38 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { THREE_BYTE_TABLE (THREE_BYTE_0F38) },
+ { "(bad)", { XX } },
+ { THREE_BYTE_TABLE (THREE_BYTE_0F3A) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
/* 40 */
- { "cmovo", Gv, Ev, XX },
- { "cmovno", Gv, Ev, XX },
- { "cmovb", Gv, Ev, XX },
- { "cmovae", Gv, Ev, XX },
- { "cmove", Gv, Ev, XX },
- { "cmovne", Gv, Ev, XX },
- { "cmovbe", Gv, Ev, XX },
- { "cmova", Gv, Ev, XX },
+ { "cmovo", { Gv, Ev } },
+ { "cmovno", { Gv, Ev } },
+ { "cmovb", { Gv, Ev } },
+ { "cmovae", { Gv, Ev } },
+ { "cmove", { Gv, Ev } },
+ { "cmovne", { Gv, Ev } },
+ { "cmovbe", { Gv, Ev } },
+ { "cmova", { Gv, Ev } },
/* 48 */
- { "cmovs", Gv, Ev, XX },
- { "cmovns", Gv, Ev, XX },
- { "cmovp", Gv, Ev, XX },
- { "cmovnp", Gv, Ev, XX },
- { "cmovl", Gv, Ev, XX },
- { "cmovge", Gv, Ev, XX },
- { "cmovle", Gv, Ev, XX },
- { "cmovg", Gv, Ev, XX },
+ { "cmovs", { Gv, Ev } },
+ { "cmovns", { Gv, Ev } },
+ { "cmovp", { Gv, Ev } },
+ { "cmovnp", { Gv, Ev } },
+ { "cmovl", { Gv, Ev } },
+ { "cmovge", { Gv, Ev } },
+ { "cmovle", { Gv, Ev } },
+ { "cmovg", { Gv, Ev } },
/* 50 */
- { "movmskpX", Gv, EX, XX },
- { PREGRP13 },
- { PREGRP12 },
- { PREGRP11 },
- { "andpX", XM, EX, XX },
- { "andnpX", XM, EX, XX },
- { "orpX", XM, EX, XX },
- { "xorpX", XM, EX, XX },
+ { "movmskpX", { Gdq, XS } },
+ { PREFIX_TABLE (PREFIX_0F51) },
+ { PREFIX_TABLE (PREFIX_0F52) },
+ { PREFIX_TABLE (PREFIX_0F53) },
+ { "andpX", { XM, EXx } },
+ { "andnpX", { XM, EXx } },
+ { "orpX", { XM, EXx } },
+ { "xorpX", { XM, EXx } },
/* 58 */
- { PREGRP0 },
- { PREGRP10 },
- { PREGRP17 },
- { PREGRP16 },
- { PREGRP14 },
- { PREGRP7 },
- { PREGRP5 },
- { PREGRP6 },
+ { PREFIX_TABLE (PREFIX_0F58) },
+ { PREFIX_TABLE (PREFIX_0F59) },
+ { PREFIX_TABLE (PREFIX_0F5A) },
+ { PREFIX_TABLE (PREFIX_0F5B) },
+ { PREFIX_TABLE (PREFIX_0F5C) },
+ { PREFIX_TABLE (PREFIX_0F5D) },
+ { PREFIX_TABLE (PREFIX_0F5E) },
+ { PREFIX_TABLE (PREFIX_0F5F) },
/* 60 */
- { "punpcklbw", MX, EM, XX },
- { "punpcklwd", MX, EM, XX },
- { "punpckldq", MX, EM, XX },
- { "packsswb", MX, EM, XX },
- { "pcmpgtb", MX, EM, XX },
- { "pcmpgtw", MX, EM, XX },
- { "pcmpgtd", MX, EM, XX },
- { "packuswb", MX, EM, XX },
+ { PREFIX_TABLE (PREFIX_0F60) },
+ { PREFIX_TABLE (PREFIX_0F61) },
+ { PREFIX_TABLE (PREFIX_0F62) },
+ { "packsswb", { MX, EM } },
+ { "pcmpgtb", { MX, EM } },
+ { "pcmpgtw", { MX, EM } },
+ { "pcmpgtd", { MX, EM } },
+ { "packuswb", { MX, EM } },
/* 68 */
- { "punpckhbw", MX, EM, XX },
- { "punpckhwd", MX, EM, XX },
- { "punpckhdq", MX, EM, XX },
- { "packssdw", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { PREGRP24 },
- { "movd", MX, Ed, XX },
- { PREGRP19 },
+ { "punpckhbw", { MX, EM } },
+ { "punpckhwd", { MX, EM } },
+ { "punpckhdq", { MX, EM } },
+ { "packssdw", { MX, EM } },
+ { PREFIX_TABLE (PREFIX_0F6C) },
+ { PREFIX_TABLE (PREFIX_0F6D) },
+ { "movK", { MX, Edq } },
+ { PREFIX_TABLE (PREFIX_0F6F) },
/* 70 */
- { PREGRP22 },
- { GRP10 },
- { GRP11 },
- { GRP12 },
- { "pcmpeqb", MX, EM, XX },
- { "pcmpeqw", MX, EM, XX },
- { "pcmpeqd", MX, EM, XX },
- { "emms", XX, XX, XX },
+ { PREFIX_TABLE (PREFIX_0F70) },
+ { REG_TABLE (REG_0F71) },
+ { REG_TABLE (REG_0F72) },
+ { REG_TABLE (REG_0F73) },
+ { "pcmpeqb", { MX, EM } },
+ { "pcmpeqw", { MX, EM } },
+ { "pcmpeqd", { MX, EM } },
+ { "emms", { XX } },
/* 78 */
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { PREGRP23 },
- { PREGRP20 },
+ { PREFIX_TABLE (PREFIX_0F78) },
+ { PREFIX_TABLE (PREFIX_0F79) },
+ { THREE_BYTE_TABLE (THREE_BYTE_0F7A) },
+ { THREE_BYTE_TABLE (THREE_BYTE_0F7B) },
+ { PREFIX_TABLE (PREFIX_0F7C) },
+ { PREFIX_TABLE (PREFIX_0F7D) },
+ { PREFIX_TABLE (PREFIX_0F7E) },
+ { PREFIX_TABLE (PREFIX_0F7F) },
/* 80 */
- { "jo", Jv, XX, XX },
- { "jno", Jv, XX, XX },
- { "jb", Jv, XX, XX },
- { "jae", Jv, XX, XX },
- { "je", Jv, XX, XX },
- { "jne", Jv, XX, XX },
- { "jbe", Jv, XX, XX },
- { "ja", Jv, XX, XX },
+ { "joH", { Jv, XX, cond_jump_flag } },
+ { "jnoH", { Jv, XX, cond_jump_flag } },
+ { "jbH", { Jv, XX, cond_jump_flag } },
+ { "jaeH", { Jv, XX, cond_jump_flag } },
+ { "jeH", { Jv, XX, cond_jump_flag } },
+ { "jneH", { Jv, XX, cond_jump_flag } },
+ { "jbeH", { Jv, XX, cond_jump_flag } },
+ { "jaH", { Jv, XX, cond_jump_flag } },
/* 88 */
- { "js", Jv, XX, XX },
- { "jns", Jv, XX, XX },
- { "jp", Jv, XX, XX },
- { "jnp", Jv, XX, XX },
- { "jl", Jv, XX, XX },
- { "jge", Jv, XX, XX },
- { "jle", Jv, XX, XX },
- { "jg", Jv, XX, XX },
+ { "jsH", { Jv, XX, cond_jump_flag } },
+ { "jnsH", { Jv, XX, cond_jump_flag } },
+ { "jpH", { Jv, XX, cond_jump_flag } },
+ { "jnpH", { Jv, XX, cond_jump_flag } },
+ { "jlH", { Jv, XX, cond_jump_flag } },
+ { "jgeH", { Jv, XX, cond_jump_flag } },
+ { "jleH", { Jv, XX, cond_jump_flag } },
+ { "jgH", { Jv, XX, cond_jump_flag } },
/* 90 */
- { "seto", Eb, XX, XX },
- { "setno", Eb, XX, XX },
- { "setb", Eb, XX, XX },
- { "setae", Eb, XX, XX },
- { "sete", Eb, XX, XX },
- { "setne", Eb, XX, XX },
- { "setbe", Eb, XX, XX },
- { "seta", Eb, XX, XX },
+ { "seto", { Eb } },
+ { "setno", { Eb } },
+ { "setb", { Eb } },
+ { "setae", { Eb } },
+ { "sete", { Eb } },
+ { "setne", { Eb } },
+ { "setbe", { Eb } },
+ { "seta", { Eb } },
/* 98 */
- { "sets", Eb, XX, XX },
- { "setns", Eb, XX, XX },
- { "setp", Eb, XX, XX },
- { "setnp", Eb, XX, XX },
- { "setl", Eb, XX, XX },
- { "setge", Eb, XX, XX },
- { "setle", Eb, XX, XX },
- { "setg", Eb, XX, XX },
+ { "sets", { Eb } },
+ { "setns", { Eb } },
+ { "setp", { Eb } },
+ { "setnp", { Eb } },
+ { "setl", { Eb } },
+ { "setge", { Eb } },
+ { "setle", { Eb } },
+ { "setg", { Eb } },
/* a0 */
- { "push", fs, XX, XX },
- { "pop", fs, XX, XX },
- { "cpuid", XX, XX, XX },
- { "bt", Ev, Gv, XX },
- { "shld", Ev, Gv, Ib },
- { "shld", Ev, Gv, CL },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "pushT", { fs } },
+ { "popT", { fs } },
+ { "cpuid", { XX } },
+ { "btS", { Ev, Gv } },
+ { "shldS", { Ev, Gv, Ib } },
+ { "shldS", { Ev, Gv, CL } },
+ { REG_TABLE (REG_0FA6) },
+ { REG_TABLE (REG_0FA7) },
/* a8 */
- { "push", gs, XX, XX },
- { "pop", gs, XX, XX },
- { "rsm" , XX, XX, XX},
- { "bts", Ev, Gv, XX },
- { "shrd", Ev, Gv, Ib },
- { "shrd", Ev, Gv, CL },
- { GRP13 },
- { "imul", Gv, Ev, XX },
+ { "pushT", { gs } },
+ { "popT", { gs } },
+ { "rsm", { XX } },
+ { "btsS", { Ev, Gv } },
+ { "shrdS", { Ev, Gv, Ib } },
+ { "shrdS", { Ev, Gv, CL } },
+ { REG_TABLE (REG_0FAE) },
+ { "imulS", { Gv, Ev } },
/* b0 */
- { "cmpxchg", Eb, Gb, XX },
- { "cmpxchg", Ev, Gv, XX },
- { "lss", Gv, Mp, XX },
- { "btr", Ev, Gv, XX },
- { "lfs", Gv, Mp, XX },
- { "lgs", Gv, Mp, XX },
- { "movzx", Gv, Eb, XX },
- { "movzx", Gv, Ew, XX },
+ { "cmpxchgB", { Eb, Gb } },
+ { "cmpxchgS", { Ev, Gv } },
+ { MOD_TABLE (MOD_0FB2) },
+ { "btrS", { Ev, Gv } },
+ { MOD_TABLE (MOD_0FB4) },
+ { MOD_TABLE (MOD_0FB5) },
+ { "movz{bR|x}", { Gv, Eb } },
+ { "movz{wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
/* b8 */
- { "(bad)", XX, XX, XX },
- { "ud2b", XX, XX, XX },
- { GRP8 },
- { "btc", Ev, Gv, XX },
- { "bsf", Gv, Ev, XX },
- { "bsr", Gv, Ev, XX },
- { "movsx", Gv, Eb, XX },
- { "movsx", Gv, Ew, XX },
+ { PREFIX_TABLE (PREFIX_0FB8) },
+ { "ud2b", { XX } },
+ { REG_TABLE (REG_0FBA) },
+ { "btcS", { Ev, Gv } },
+ { "bsfS", { Gv, Ev } },
+ { PREFIX_TABLE (PREFIX_0FBD) },
+ { "movs{bR|x}", { Gv, Eb } },
+ { "movs{wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
/* c0 */
- { "xadd", Eb, Gb, XX },
- { "xadd", Ev, Gv, XX },
- { PREGRP1 },
- { "movnti", Ev, Gv, XX },
- { "pinsrw", MX, Ev, Ib },
- { "pextrw", Ev, MX, Ib },
- { "shufpX", XM, EX, Ib },
- { GRP9 },
+ { "xaddB", { Eb, Gb } },
+ { "xaddS", { Ev, Gv } },
+ { PREFIX_TABLE (PREFIX_0FC2) },
+ { "movntiS", { Ev, Gv } },
+ { "pinsrw", { MX, Edqw, Ib } },
+ { "pextrw", { Gdq, MS, Ib } },
+ { "shufpX", { XM, EXx, Ib } },
+ { REG_TABLE (REG_0FC7) },
/* c8 */
- { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
- { "bswap", RMeCX, XX, XX },
- { "bswap", RMeDX, XX, XX },
- { "bswap", RMeBX, XX, XX },
- { "bswap", RMeSP, XX, XX },
- { "bswap", RMeBP, XX, XX },
- { "bswap", RMeSI, XX, XX },
- { "bswap", RMeDI, XX, XX },
+ { "bswap", { RMeAX } },
+ { "bswap", { RMeCX } },
+ { "bswap", { RMeDX } },
+ { "bswap", { RMeBX } },
+ { "bswap", { RMeSP } },
+ { "bswap", { RMeBP } },
+ { "bswap", { RMeSI } },
+ { "bswap", { RMeDI } },
/* d0 */
- { "(bad)", XX, XX, XX },
- { "psrlw", MX, EM, XX },
- { "psrld", MX, EM, XX },
- { "psrlq", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { "pmullw", MX, EM, XX },
- { PREGRP21 },
- { "pmovmskb", Ev, MX, XX },
+ { PREFIX_TABLE (PREFIX_0FD0) },
+ { "psrlw", { MX, EM } },
+ { "psrld", { MX, EM } },
+ { "psrlq", { MX, EM } },
+ { "paddq", { MX, EM } },
+ { "pmullw", { MX, EM } },
+ { PREFIX_TABLE (PREFIX_0FD6) },
+ { "pmovmskb", { Gdq, MS } },
/* d8 */
- { "psubusb", MX, EM, XX },
- { "psubusw", MX, EM, XX },
- { "pminub", MX, EM, XX },
- { "pand", MX, EM, XX },
- { "paddusb", MX, EM, XX },
- { "paddusw", MX, EM, XX },
- { "pmaxub", MX, EM, XX },
- { "pandn", MX, EM, XX },
+ { "psubusb", { MX, EM } },
+ { "psubusw", { MX, EM } },
+ { "pminub", { MX, EM } },
+ { "pand", { MX, EM } },
+ { "paddusb", { MX, EM } },
+ { "paddusw", { MX, EM } },
+ { "pmaxub", { MX, EM } },
+ { "pandn", { MX, EM } },
/* e0 */
- { "pavgb", MX, EM, XX },
- { "psraw", MX, EM, XX },
- { "psrad", MX, EM, XX },
- { "pavgw", MX, EM, XX },
- { "pmulhuw", MX, EM, XX },
- { "pmulhw", MX, EM, XX },
- { PREGRP15 },
- { "movntq", Ev, MX, XX },
+ { "pavgb", { MX, EM } },
+ { "psraw", { MX, EM } },
+ { "psrad", { MX, EM } },
+ { "pavgw", { MX, EM } },
+ { "pmulhuw", { MX, EM } },
+ { "pmulhw", { MX, EM } },
+ { PREFIX_TABLE (PREFIX_0FE6) },
+ { PREFIX_TABLE (PREFIX_0FE7) },
/* e8 */
- { "psubsb", MX, EM, XX },
- { "psubsw", MX, EM, XX },
- { "pminsw", MX, EM, XX },
- { "por", MX, EM, XX },
- { "paddsb", MX, EM, XX },
- { "paddsw", MX, EM, XX },
- { "pmaxsw", MX, EM, XX },
- { "pxor", MX, EM, XX },
+ { "psubsb", { MX, EM } },
+ { "psubsw", { MX, EM } },
+ { "pminsw", { MX, EM } },
+ { "por", { MX, EM } },
+ { "paddsb", { MX, EM } },
+ { "paddsw", { MX, EM } },
+ { "pmaxsw", { MX, EM } },
+ { "pxor", { MX, EM } },
/* f0 */
- { "(bad)", XX, XX, XX },
- { "psllw", MX, EM, XX },
- { "pslld", MX, EM, XX },
- { "psllq", MX, EM, XX },
- { "pmuludq", MX, EM, XX },
- { "pmaddwd", MX, EM, XX },
- { "psadbw", MX, EM, XX },
- { PREGRP18 },
+ { PREFIX_TABLE (PREFIX_0FF0) },
+ { "psllw", { MX, EM } },
+ { "pslld", { MX, EM } },
+ { "psllq", { MX, EM } },
+ { "pmuludq", { MX, EM } },
+ { "pmaddwd", { MX, EM } },
+ { "psadbw", { MX, EM } },
+ { PREFIX_TABLE (PREFIX_0FF7) },
/* f8 */
- { "psubb", MX, EM, XX },
- { "psubw", MX, EM, XX },
- { "psubd", MX, EM, XX },
- { "(bad)", XX, XX, XX },
- { "paddb", MX, EM, XX },
- { "paddw", MX, EM, XX },
- { "paddd", MX, EM, XX },
- { "(bad)", XX, XX, XX }
+ { "psubb", { MX, EM } },
+ { "psubw", { MX, EM } },
+ { "psubd", { MX, EM } },
+ { "psubq", { MX, EM } },
+ { "paddb", { MX, EM } },
+ { "paddw", { MX, EM } },
+ { "paddd", { MX, EM } },
+ { "(bad)", { XX } },
};
static const unsigned char onebyte_has_modrm[256] = {
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
/* ------------------------------- */
/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
- /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
- /* 20 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 2f */
- /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
+ /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
+ /* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
+ /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
/* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
- /* 50 */ 1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1, /* 5f */
- /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
- /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
+ /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
+ /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
+ /* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
/* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
/* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
/* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
- /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
+ /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
/* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
- /* d0 */ 0,1,1,1,0,1,0,1,1,1,1,1,1,1,1,1, /* df */
- /* e0 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* ef */
- /* f0 */ 0,1,1,1,0,1,1,1,1,1,1,0,1,1,1,0 /* ff */
- /* ------------------------------- */
- /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
-};
-
-static const unsigned char twobyte_uses_SSE_prefix[256] = {
- /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
- /* ------------------------------- */
- /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
- /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
- /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
- /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
- /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
- /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
- /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
- /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
- /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
- /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
- /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
- /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
- /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
- /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
- /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
- /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
+ /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
+ /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
+ /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
/* ------------------------------- */
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
};
static unsigned char *start_codep;
static unsigned char *insn_codep;
static unsigned char *codep;
+static const char *lock_prefix;
+static const char *data_prefix;
+static const char *addr_prefix;
+static const char *repz_prefix;
+static const char *repnz_prefix;
static disassemble_info *the_info;
-static int mod;
-static int rm;
-static int reg;
-static void oappend PARAMS ((const char *s));
+static struct
+ {
+ int mod;
+ int reg;
+ int rm;
+ }
+modrm;
+static unsigned char need_modrm;
+
+/* If we are accessing mod/rm/reg without need_modrm set, then the
+ values are stale. Hitting this abort likely indicates that you
+ need to update onebyte_has_modrm or twobyte_has_modrm. */
+#define MODRM_CHECK if (!need_modrm) abort ()
+
+static const char **names64;
+static const char **names32;
+static const char **names16;
+static const char **names8;
+static const char **names8rex;
+static const char **names_seg;
+static const char *index64;
+static const char *index32;
+static const char **index16;
+
+static const char *intel_names64[] = {
+ "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
+};
+static const char *intel_names32[] = {
+ "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
+ "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
+};
+static const char *intel_names16[] = {
+ "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
+ "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
+};
+static const char *intel_names8[] = {
+ "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
+};
+static const char *intel_names8rex[] = {
+ "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
+ "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
+};
+static const char *intel_names_seg[] = {
+ "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
+};
+static const char *intel_index64 = "riz";
+static const char *intel_index32 = "eiz";
+static const char *intel_index16[] = {
+ "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
+};
-static const char *names64[] = {
- "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi",
+static const char *att_names64[] = {
+ "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
};
-static const char *names32[] = {
- "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
+static const char *att_names32[] = {
+ "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
"%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
};
-static const char *names16[] = {
- "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
+static const char *att_names16[] = {
+ "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
"%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
};
-static const char *names8[] = {
- "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
+static const char *att_names8[] = {
+ "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
};
-static const char *names8rex[] = {
- "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil",
+static const char *att_names8rex[] = {
+ "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
};
-static const char *names_seg[] = {
- "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
+static const char *att_names_seg[] = {
+ "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
};
-static const char *index16[] = {
- "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
-};
-
-static const struct dis386 grps[][8] = {
- /* GRP1b */
- {
- { "addA", Eb, Ib, XX },
- { "orA", Eb, Ib, XX },
- { "adcA", Eb, Ib, XX },
- { "sbbA", Eb, Ib, XX },
- { "andA", Eb, Ib, XX },
- { "subA", Eb, Ib, XX },
- { "xorA", Eb, Ib, XX },
- { "cmpA", Eb, Ib, XX }
- },
- /* GRP1S */
- {
- { "addQ", Ev, Iv, XX },
- { "orQ", Ev, Iv, XX },
- { "adcQ", Ev, Iv, XX },
- { "sbbQ", Ev, Iv, XX },
- { "andQ", Ev, Iv, XX },
- { "subQ", Ev, Iv, XX },
- { "xorQ", Ev, Iv, XX },
- { "cmpQ", Ev, Iv, XX }
- },
- /* GRP1Ss */
- {
- { "addQ", Ev, sIb, XX },
- { "orQ", Ev, sIb, XX },
- { "adcQ", Ev, sIb, XX },
- { "sbbQ", Ev, sIb, XX },
- { "andQ", Ev, sIb, XX },
- { "subQ", Ev, sIb, XX },
- { "xorQ", Ev, sIb, XX },
- { "cmpQ", Ev, sIb, XX }
- },
- /* GRP2b */
- {
- { "rolA", Eb, Ib, XX },
- { "rorA", Eb, Ib, XX },
- { "rclA", Eb, Ib, XX },
- { "rcrA", Eb, Ib, XX },
- { "shlA", Eb, Ib, XX },
- { "shrA", Eb, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "sarA", Eb, Ib, XX },
- },
- /* GRP2S */
- {
- { "rolQ", Ev, Ib, XX },
- { "rorQ", Ev, Ib, XX },
- { "rclQ", Ev, Ib, XX },
- { "rcrQ", Ev, Ib, XX },
- { "shlQ", Ev, Ib, XX },
- { "shrQ", Ev, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "sarQ", Ev, Ib, XX },
- },
- /* GRP2b_one */
- {
- { "rolA", Eb, XX, XX },
- { "rorA", Eb, XX, XX },
- { "rclA", Eb, XX, XX },
- { "rcrA", Eb, XX, XX },
- { "shlA", Eb, XX, XX },
- { "shrA", Eb, XX, XX },
- { "(bad)", XX, XX, XX },
- { "sarA", Eb, XX, XX },
- },
- /* GRP2S_one */
- {
- { "rolQ", Ev, XX, XX },
- { "rorQ", Ev, XX, XX },
- { "rclQ", Ev, XX, XX },
- { "rcrQ", Ev, XX, XX },
- { "shlQ", Ev, XX, XX },
- { "shrQ", Ev, XX, XX },
- { "(bad)", XX, XX, XX},
- { "sarQ", Ev, XX, XX },
- },
- /* GRP2b_cl */
- {
- { "rolA", Eb, CL, XX },
- { "rorA", Eb, CL, XX },
- { "rclA", Eb, CL, XX },
- { "rcrA", Eb, CL, XX },
- { "shlA", Eb, CL, XX },
- { "shrA", Eb, CL, XX },
- { "(bad)", XX, XX, XX },
- { "sarA", Eb, CL, XX },
- },
- /* GRP2S_cl */
- {
- { "rolQ", Ev, CL, XX },
- { "rorQ", Ev, CL, XX },
- { "rclQ", Ev, CL, XX },
- { "rcrQ", Ev, CL, XX },
- { "shlQ", Ev, CL, XX },
- { "shrQ", Ev, CL, XX },
- { "(bad)", XX, XX, XX },
- { "sarQ", Ev, CL, XX }
- },
- /* GRP3b */
- {
- { "testA", Eb, Ib, XX },
- { "(bad)", Eb, XX, XX },
- { "notA", Eb, XX, XX },
- { "negA", Eb, XX, XX },
- { "mulB", AL, Eb, XX },
- { "imulB", AL, Eb, XX },
- { "divB", AL, Eb, XX },
- { "idivB", AL, Eb, XX }
- },
- /* GRP3S */
- {
- { "testQ", Ev, Iv, XX },
- { "(bad)", XX, XX, XX },
- { "notQ", Ev, XX, XX },
- { "negQ", Ev, XX, XX },
- { "mulS", eAX, Ev, XX },
- { "imulS", eAX, Ev, XX },
- { "divS", eAX, Ev, XX },
- { "idivS", eAX, Ev, XX },
- },
- /* GRP4 */
- {
- { "incA", Eb, XX, XX },
- { "decA", Eb, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRP5 */
- {
- { "incQ", Ev, XX, XX },
- { "decQ", Ev, XX, XX },
- { "callI", indirEv, XX, XX },
- { "lcallI", indirEv, XX, XX },
- { "jmpI", indirEv, XX, XX },
- { "ljmpI", indirEv, XX, XX },
- { "pushT", Ev, XX, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRP6 */
- {
- { "sldt", Ew, XX, XX },
- { "str", Ew, XX, XX },
- { "lldt", Ew, XX, XX },
- { "ltr", Ew, XX, XX },
- { "verr", Ew, XX, XX },
- { "verw", Ew, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX }
- },
- /* GRP7 */
- {
- { "sgdt", Ew, XX, XX },
- { "sidt", Ew, XX, XX },
- { "lgdt", Ew, XX, XX },
- { "lidt", Ew, XX, XX },
- { "smsw", Ew, XX, XX },
- { "(bad)", XX, XX, XX },
- { "lmsw", Ew, XX, XX },
- { "invlpg", Ew, XX, XX },
- },
- /* GRP8 */
- {
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "btQ", Ev, Ib, XX },
- { "btsQ", Ev, Ib, XX },
- { "btrQ", Ev, Ib, XX },
- { "btcQ", Ev, Ib, XX },
- },
- /* GRP9 */
- {
- { "(bad)", XX, XX, XX },
- { "cmpxchg8b", Ev, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRP10 */
- {
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "psrlw", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "psraw", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "psllw", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRP11 */
- {
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "psrld", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "psrad", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "pslld", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRP12 */
- {
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "psrlq", MS, Ib, XX },
- { "psrldq", MS, Ib, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "psllq", MS, Ib, XX },
- { "pslldq", MS, Ib, XX },
- },
- /* GRP13 */
- {
- { "fxsave", Ev, XX, XX },
- { "fxrstor", Ev, XX, XX },
- { "ldmxcsr", Ev, XX, XX },
- { "stmxcsr", Ev, XX, XX },
- { "(bad)", XX, XX, XX },
- { "lfence", None, XX, XX },
- { "mfence", None, XX, XX },
- { "sfence", None, XX, XX },
- /* FIXME: the sfence with memory operand is clflush! */
- },
- /* GRP14 */
- {
- { "prefetchnta", Ev, XX, XX },
- { "prefetcht0", Ev, XX, XX },
- { "prefetcht1", Ev, XX, XX },
- { "prefetcht2", Ev, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- },
- /* GRPAMD */
- {
- { "prefetch", Eb, XX, XX },
- { "prefetchw", Eb, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- }
-
+static const char *att_index64 = "%riz";
+static const char *att_index32 = "%eiz";
+static const char *att_index16[] = {
+ "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
};
-static const struct dis386 prefix_user_table[][4] = {
- /* PREGRP0 */
+static const struct dis386 reg_table[][8] = {
+ /* REG_80 */
+ {
+ { "addA", { Eb, Ib } },
+ { "orA", { Eb, Ib } },
+ { "adcA", { Eb, Ib } },
+ { "sbbA", { Eb, Ib } },
+ { "andA", { Eb, Ib } },
+ { "subA", { Eb, Ib } },
+ { "xorA", { Eb, Ib } },
+ { "cmpA", { Eb, Ib } },
+ },
+ /* REG_81 */
{
- { "addps", XM, EX, XX },
- { "addss", XM, EX, XX },
- { "addpd", XM, EX, XX },
- { "addsd", XM, EX, XX },
+ { "addQ", { Ev, Iv } },
+ { "orQ", { Ev, Iv } },
+ { "adcQ", { Ev, Iv } },
+ { "sbbQ", { Ev, Iv } },
+ { "andQ", { Ev, Iv } },
+ { "subQ", { Ev, Iv } },
+ { "xorQ", { Ev, Iv } },
+ { "cmpQ", { Ev, Iv } },
},
- /* PREGRP1 */
+ /* REG_82 */
{
- { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
- { "", XM, EX, OPSIMD },
- { "", XM, EX, OPSIMD },
- { "", XM, EX, OPSIMD },
+ { "addQ", { Ev, sIb } },
+ { "orQ", { Ev, sIb } },
+ { "adcQ", { Ev, sIb } },
+ { "sbbQ", { Ev, sIb } },
+ { "andQ", { Ev, sIb } },
+ { "subQ", { Ev, sIb } },
+ { "xorQ", { Ev, sIb } },
+ { "cmpQ", { Ev, sIb } },
},
- /* PREGRP2 */
+ /* REG_8F */
{
- { "cvtpi2ps", XM, EM, XX },
- { "cvtsi2ssY", XM, Ev, XX },
- { "cvtpi2pd", XM, EM, XX },
- { "cvtsi2sdY", XM, Ev, XX },
+ { "popU", { stackEv } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP3 */
+ /* REG_C0 */
{
- { "cvtps2pi", MX, EX, XX },
- { "cvtss2siY", Gv, EX, XX },
- { "cvtpd2pi", MX, EX, XX },
- { "cvtsd2siY", Gv, EX, XX },
+ { "rolA", { Eb, Ib } },
+ { "rorA", { Eb, Ib } },
+ { "rclA", { Eb, Ib } },
+ { "rcrA", { Eb, Ib } },
+ { "shlA", { Eb, Ib } },
+ { "shrA", { Eb, Ib } },
+ { "(bad)", { XX } },
+ { "sarA", { Eb, Ib } },
},
- /* PREGRP4 */
+ /* REG_C1 */
{
- { "cvttps2pi", MX, EX, XX },
- { "cvttss2siY", Gv, EX, XX },
- { "cvttpd2pi", MX, EX, XX },
- { "cvttsd2siY", Gv, EX, XX },
+ { "rolQ", { Ev, Ib } },
+ { "rorQ", { Ev, Ib } },
+ { "rclQ", { Ev, Ib } },
+ { "rcrQ", { Ev, Ib } },
+ { "shlQ", { Ev, Ib } },
+ { "shrQ", { Ev, Ib } },
+ { "(bad)", { XX } },
+ { "sarQ", { Ev, Ib } },
},
- /* PREGRP5 */
+ /* REG_C6 */
{
- { "divps", XM, EX, XX },
- { "divss", XM, EX, XX },
- { "divpd", XM, EX, XX },
- { "divsd", XM, EX, XX },
+ { "movA", { Eb, Ib } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP6 */
+ /* REG_C7 */
{
- { "maxps", XM, EX, XX },
- { "maxss", XM, EX, XX },
- { "maxpd", XM, EX, XX },
- { "maxsd", XM, EX, XX },
+ { "movQ", { Ev, Iv } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP7 */
+ /* REG_D0 */
{
- { "minps", XM, EX, XX },
- { "minss", XM, EX, XX },
- { "minpd", XM, EX, XX },
- { "minsd", XM, EX, XX },
+ { "rolA", { Eb, I1 } },
+ { "rorA", { Eb, I1 } },
+ { "rclA", { Eb, I1 } },
+ { "rcrA", { Eb, I1 } },
+ { "shlA", { Eb, I1 } },
+ { "shrA", { Eb, I1 } },
+ { "(bad)", { XX } },
+ { "sarA", { Eb, I1 } },
},
- /* PREGRP8 */
+ /* REG_D1 */
{
- { "movups", XM, EX, XX },
- { "movss", XM, EX, XX },
- { "movupd", XM, EX, XX },
- { "movsd", XM, EX, XX },
+ { "rolQ", { Ev, I1 } },
+ { "rorQ", { Ev, I1 } },
+ { "rclQ", { Ev, I1 } },
+ { "rcrQ", { Ev, I1 } },
+ { "shlQ", { Ev, I1 } },
+ { "shrQ", { Ev, I1 } },
+ { "(bad)", { XX } },
+ { "sarQ", { Ev, I1 } },
},
- /* PREGRP9 */
+ /* REG_D2 */
{
- { "movups", EX, XM, XX },
- { "movss", EX, XM, XX },
- { "movupd", EX, XM, XX },
- { "movsd", EX, XM, XX },
+ { "rolA", { Eb, CL } },
+ { "rorA", { Eb, CL } },
+ { "rclA", { Eb, CL } },
+ { "rcrA", { Eb, CL } },
+ { "shlA", { Eb, CL } },
+ { "shrA", { Eb, CL } },
+ { "(bad)", { XX } },
+ { "sarA", { Eb, CL } },
},
- /* PREGRP10 */
+ /* REG_D3 */
{
- { "mulps", XM, EX, XX },
- { "mulss", XM, EX, XX },
- { "mulpd", XM, EX, XX },
- { "mulsd", XM, EX, XX },
+ { "rolQ", { Ev, CL } },
+ { "rorQ", { Ev, CL } },
+ { "rclQ", { Ev, CL } },
+ { "rcrQ", { Ev, CL } },
+ { "shlQ", { Ev, CL } },
+ { "shrQ", { Ev, CL } },
+ { "(bad)", { XX } },
+ { "sarQ", { Ev, CL } },
},
- /* PREGRP11 */
+ /* REG_F6 */
{
- { "rcpps", XM, EX, XX },
- { "rcpss", XM, EX, XX },
- { "(bad)", XM, EX, XX },
- { "(bad)", XM, EX, XX },
+ { "testA", { Eb, Ib } },
+ { "(bad)", { XX } },
+ { "notA", { Eb } },
+ { "negA", { Eb } },
+ { "mulA", { Eb } }, /* Don't print the implicit %al register, */
+ { "imulA", { Eb } }, /* to distinguish these opcodes from other */
+ { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
+ { "idivA", { Eb } }, /* and idiv for consistency. */
},
- /* PREGRP12 */
+ /* REG_F7 */
{
- { "rsqrtps", XM, EX, XX },
- { "rsqrtss", XM, EX, XX },
- { "(bad)", XM, EX, XX },
- { "(bad)", XM, EX, XX },
+ { "testQ", { Ev, Iv } },
+ { "(bad)", { XX } },
+ { "notQ", { Ev } },
+ { "negQ", { Ev } },
+ { "mulQ", { Ev } }, /* Don't print the implicit register. */
+ { "imulQ", { Ev } },
+ { "divQ", { Ev } },
+ { "idivQ", { Ev } },
},
- /* PREGRP13 */
+ /* REG_FE */
{
- { "sqrtps", XM, EX, XX },
- { "sqrtss", XM, EX, XX },
- { "sqrtpd", XM, EX, XX },
- { "sqrtsd", XM, EX, XX },
+ { "incA", { Eb } },
+ { "decA", { Eb } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP14 */
+ /* REG_FF */
{
- { "subps", XM, EX, XX },
- { "subss", XM, EX, XX },
- { "subpd", XM, EX, XX },
- { "subsd", XM, EX, XX },
+ { "incQ", { Ev } },
+ { "decQ", { Ev } },
+ { "callT", { indirEv } },
+ { "JcallT", { indirEp } },
+ { "jmpT", { indirEv } },
+ { "JjmpT", { indirEp } },
+ { "pushU", { stackEv } },
+ { "(bad)", { XX } },
},
- /* PREGRP15 */
+ /* REG_0F00 */
{
- { "(bad)", XM, EX, XX },
- { "cvtdq2pd", XM, EX, XX },
- { "cvttpd2dq", XM, EX, XX },
- { "cvtpd2dq", XM, EX, XX },
+ { "sldtD", { Sv } },
+ { "strD", { Sv } },
+ { "lldt", { Ew } },
+ { "ltr", { Ew } },
+ { "verr", { Ew } },
+ { "verw", { Ew } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP16 */
+ /* REG_0F01 */
{
- { "cvtdq2ps", XM, EX, XX },
- { "cvttps2dq",XM, EX, XX },
- { "cvtps2dq",XM, EX, XX },
- { "(bad)", XM, EX, XX },
+ { MOD_TABLE (MOD_0F01_REG_0) },
+ { MOD_TABLE (MOD_0F01_REG_1) },
+ { MOD_TABLE (MOD_0F01_REG_2) },
+ { MOD_TABLE (MOD_0F01_REG_3) },
+ { "smswD", { Sv } },
+ { "(bad)", { XX } },
+ { "lmsw", { Ew } },
+ { MOD_TABLE (MOD_0F01_REG_7) },
},
- /* PREGRP17 */
+ /* REG_0F0E */
{
- { "cvtps2pd", XM, EX, XX },
- { "cvtss2sd", XM, EX, XX },
- { "cvtpd2ps", XM, EX, XX },
- { "cvtsd2ss", XM, EX, XX },
+ { "prefetch", { Eb } },
+ { "prefetchw", { Eb } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP18 */
+ /* REG_0F18 */
{
- { "maskmovq", MX, EM, XX },
- { "(bad)", XM, EX, XX },
- { "maskmovdqu", MX, EX, XX },
- { "(bad)", XM, EX, XX },
+ { MOD_TABLE (MOD_0F18_REG_0) },
+ { MOD_TABLE (MOD_0F18_REG_1) },
+ { MOD_TABLE (MOD_0F18_REG_2) },
+ { MOD_TABLE (MOD_0F18_REG_3) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
- /* PREGRP19 */
+ /* REG_0F71 */
{
- { "movq", MX, EM, XX },
- { "movdqu", XM, EX, XX },
- { "movdqa", XM, EX, XX },
- { "(bad)", XM, EX, XX },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F71_REG_2) },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F71_REG_4) },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F71_REG_6) },
+ { "(bad)", { XX } },
},
- /* PREGRP20 */
+ /* REG_0F72 */
{
- { "movq", EM, MX, XX },
- { "movdqu", EX, XM, XX },
- { "movdqa", EX, XM, XX },
- { "(bad)", EX, XM, XX },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F72_REG_2) },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F72_REG_4) },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F72_REG_6) },
+ { "(bad)", { XX } },
},
- /* PREGRP21 */
+ /* REG_0F73 */
{
- { "(bad)", EX, XM, XX },
- { "movq2dq", EX, EM, XX },
- { "movq", EX, XM, XX },
- { "movdq2q", EM, MX, XX },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F73_REG_2) },
+ { MOD_TABLE (MOD_0F73_REG_3) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0F73_REG_6) },
+ { MOD_TABLE (MOD_0F73_REG_7) },
},
- /* PREGRP22 */
+ /* REG_0FA6 */
{
- { "pshufw", MX, EM, Ib },
- { "pshufhw", XM, EX, Ib },
- { "pshufd", XM, EX, Ib },
- { "pshuflw", XM, EX, Ib },
+ { "montmul", { { OP_0f07, 0 } } },
+ { "xsha1", { { OP_0f07, 0 } } },
+ { "xsha256", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
},
- /* PREGRP23 */
+ /* REG_0FA7 */
{
- { "movd", Ed, MX, XX },
- { "movq", Ed, XM, XX },
- { "movd", Ed, XM, XX },
- { "(bad)", EX, XM, XX },
+ { "xstore-rng", { { OP_0f07, 0 } } },
+ { "xcrypt-ecb", { { OP_0f07, 0 } } },
+ { "xcrypt-cbc", { { OP_0f07, 0 } } },
+ { "xcrypt-ctr", { { OP_0f07, 0 } } },
+ { "xcrypt-cfb", { { OP_0f07, 0 } } },
+ { "xcrypt-ofb", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
+ { "(bad)", { { OP_0f07, 0 } } },
},
- /* PREGRP24 */
+ /* REG_0FAE */
{
- { "(bad)", EX, XM, XX },
- { "(bad)", EX, XM, XX },
- { "punpckhqdq", XM, EX, XX },
- { "(bad)", EX, XM, XX },
+ { MOD_TABLE (MOD_0FAE_REG_0) },
+ { MOD_TABLE (MOD_0FAE_REG_1) },
+ { MOD_TABLE (MOD_0FAE_REG_2) },
+ { MOD_TABLE (MOD_0FAE_REG_3) },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0FAE_REG_5) },
+ { MOD_TABLE (MOD_0FAE_REG_6) },
+ { MOD_TABLE (MOD_0FAE_REG_7) },
+ },
+ /* REG_0FBA */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "btQ", { Ev, Ib } },
+ { "btsQ", { Ev, Ib } },
+ { "btrQ", { Ev, Ib } },
+ { "btcQ", { Ev, Ib } },
+ },
+ /* REG_0FC7 */
+ {
+ { "(bad)", { XX } },
+ { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0FC7_REG_6) },
+ { MOD_TABLE (MOD_0FC7_REG_7) },
},
};
-#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
+static const struct dis386 prefix_table[][4] = {
+ /* PREFIX_90 */
+ {
+ { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
+ { "pause", { XX } },
+ { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
+ { "(bad)", { XX } },
+ },
-static void
-ckprefix ()
-{
- int newrex;
- rex = 0;
- prefixes = 0;
- used_prefixes = 0;
- rex_used = 0;
- while (1)
- {
- FETCH_DATA (the_info, codep + 1);
- newrex = 0;
- switch (*codep)
- {
- /* REX prefixes family. */
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
- case 0x48:
- case 0x49:
- case 0x4a:
- case 0x4b:
- case 0x4c:
- case 0x4d:
- case 0x4e:
- case 0x4f:
- if (mode_64bit)
- newrex = *codep;
- else
- return;
- break;
- case 0xf3:
- prefixes |= PREFIX_REPZ;
- break;
- case 0xf2:
- prefixes |= PREFIX_REPNZ;
- break;
- case 0xf0:
- prefixes |= PREFIX_LOCK;
- break;
- case 0x2e:
- prefixes |= PREFIX_CS;
- break;
- case 0x36:
- prefixes |= PREFIX_SS;
- break;
+ /* PREFIX_0F10 */
+ {
+ { "movups", { XM, EXx } },
+ { "movss", { XM, EXd } },
+ { "movupd", { XM, EXx } },
+ { "movsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F11 */
+ {
+ { "movups", { EXx, XM } },
+ { "movss", { EXd, XM } },
+ { "movupd", { EXx, XM } },
+ { "movsd", { EXq, XM } },
+ },
+
+ /* PREFIX_0F12 */
+ {
+ { MOD_TABLE (MOD_0F12_PREFIX_0) },
+ { "movsldup", { XM, EXx } },
+ { "movlpd", { XM, EXq } },
+ { "movddup", { XM, EXq } },
+ },
+
+ /* PREFIX_0F16 */
+ {
+ { MOD_TABLE (MOD_0F16_PREFIX_0) },
+ { "movshdup", { XM, EXx } },
+ { "movhpd", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F2A */
+ {
+ { "cvtpi2ps", { XM, EMCq } },
+ { "cvtsi2ssY", { XM, Ev } },
+ { "cvtpi2pd", { XM, EMCq } },
+ { "cvtsi2sdY", { XM, Ev } },
+ },
+
+ /* PREFIX_0F2B */
+ {
+ {"movntps", { Ev, XM } },
+ {"movntss", { Ed, XM } },
+ {"movntpd", { Ev, XM } },
+ {"movntsd", { Eq, XM } },
+ },
+
+ /* PREFIX_0F2C */
+ {
+ { "cvttps2pi", { MXC, EXq } },
+ { "cvttss2siY", { Gv, EXd } },
+ { "cvttpd2pi", { MXC, EXx } },
+ { "cvttsd2siY", { Gv, EXq } },
+ },
+
+ /* PREFIX_0F2D */
+ {
+ { "cvtps2pi", { MXC, EXq } },
+ { "cvtss2siY", { Gv, EXd } },
+ { "cvtpd2pi", { MXC, EXx } },
+ { "cvtsd2siY", { Gv, EXq } },
+ },
+
+ /* PREFIX_0F2E */
+ {
+ { "ucomiss",{ XM, EXd } },
+ { "(bad)", { XX } },
+ { "ucomisd",{ XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F2F */
+ {
+ { "comiss", { XM, EXd } },
+ { "(bad)", { XX } },
+ { "comisd", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F51 */
+ {
+ { "sqrtps", { XM, EXx } },
+ { "sqrtss", { XM, EXd } },
+ { "sqrtpd", { XM, EXx } },
+ { "sqrtsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F52 */
+ {
+ { "rsqrtps",{ XM, EXx } },
+ { "rsqrtss",{ XM, EXd } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F53 */
+ {
+ { "rcpps", { XM, EXx } },
+ { "rcpss", { XM, EXd } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F58 */
+ {
+ { "addps", { XM, EXx } },
+ { "addss", { XM, EXd } },
+ { "addpd", { XM, EXx } },
+ { "addsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F59 */
+ {
+ { "mulps", { XM, EXx } },
+ { "mulss", { XM, EXd } },
+ { "mulpd", { XM, EXx } },
+ { "mulsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F5A */
+ {
+ { "cvtps2pd", { XM, EXq } },
+ { "cvtss2sd", { XM, EXd } },
+ { "cvtpd2ps", { XM, EXx } },
+ { "cvtsd2ss", { XM, EXq } },
+ },
+
+ /* PREFIX_0F5B */
+ {
+ { "cvtdq2ps", { XM, EXx } },
+ { "cvttps2dq", { XM, EXx } },
+ { "cvtps2dq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F5C */
+ {
+ { "subps", { XM, EXx } },
+ { "subss", { XM, EXd } },
+ { "subpd", { XM, EXx } },
+ { "subsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F5D */
+ {
+ { "minps", { XM, EXx } },
+ { "minss", { XM, EXd } },
+ { "minpd", { XM, EXx } },
+ { "minsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F5E */
+ {
+ { "divps", { XM, EXx } },
+ { "divss", { XM, EXd } },
+ { "divpd", { XM, EXx } },
+ { "divsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F5F */
+ {
+ { "maxps", { XM, EXx } },
+ { "maxss", { XM, EXd } },
+ { "maxpd", { XM, EXx } },
+ { "maxsd", { XM, EXq } },
+ },
+
+ /* PREFIX_0F60 */
+ {
+ { "punpcklbw",{ MX, EMd } },
+ { "(bad)", { XX } },
+ { "punpcklbw",{ MX, EMx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F61 */
+ {
+ { "punpcklwd",{ MX, EMd } },
+ { "(bad)", { XX } },
+ { "punpcklwd",{ MX, EMx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F62 */
+ {
+ { "punpckldq",{ MX, EMd } },
+ { "(bad)", { XX } },
+ { "punpckldq",{ MX, EMx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F6C */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "punpcklqdq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F6D */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "punpckhqdq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F6F */
+ {
+ { "movq", { MX, EM } },
+ { "movdqu", { XM, EXx } },
+ { "movdqa", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F70 */
+ {
+ { "pshufw", { MX, EM, Ib } },
+ { "pshufhw",{ XM, EXx, Ib } },
+ { "pshufd", { XM, EXx, Ib } },
+ { "pshuflw",{ XM, EXx, Ib } },
+ },
+
+ /* PREFIX_0F78 */
+ {
+ {"vmread", { Em, Gm } },
+ {"(bad)", { XX } },
+ {"extrq", { XS, Ib, Ib } },
+ {"insertq", { XM, XS, Ib, Ib } },
+ },
+
+ /* PREFIX_0F79 */
+ {
+ {"vmwrite", { Gm, Em } },
+ {"(bad)", { XX } },
+ {"extrq", { XM, XS } },
+ {"insertq", { XM, XS } },
+ },
+
+ /* PREFIX_0F7C */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "haddpd", { XM, EXx } },
+ { "haddps", { XM, EXx } },
+ },
+
+ /* PREFIX_0F7D */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "hsubpd", { XM, EXx } },
+ { "hsubps", { XM, EXx } },
+ },
+
+ /* PREFIX_0F7E */
+ {
+ { "movK", { Edq, MX } },
+ { "movq", { XM, EXq } },
+ { "movK", { Edq, XM } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F7F */
+ {
+ { "movq", { EM, MX } },
+ { "movdqu", { EXx, XM } },
+ { "movdqa", { EXx, XM } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0FB8 */
+ {
+ { "(bad)", { XX } },
+ { "popcntS", { Gv, Ev } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0FBD */
+ {
+ { "bsrS", { Gv, Ev } },
+ { "lzcntS", { Gv, Ev } },
+ { "bsrS", { Gv, Ev } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0FC2 */
+ {
+ { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
+ { "", { XM, EXd, OPSIMD } },
+ { "", { XM, EXx, OPSIMD } },
+ { "", { XM, EXq, OPSIMD } },
+ },
+
+ /* PREFIX_0FD0 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "addsubpd", { XM, EXx } },
+ { "addsubps", { XM, EXx } },
+ },
+
+ /* PREFIX_0FD6 */
+ {
+ { "(bad)", { XX } },
+ { "movq2dq",{ XM, MS } },
+ { "movq", { EXq, XM } },
+ { "movdq2q",{ MX, XS } },
+ },
+
+ /* PREFIX_0FE6 */
+ {
+ { "(bad)", { XX } },
+ { "cvtdq2pd", { XM, EXq } },
+ { "cvttpd2dq", { XM, EXx } },
+ { "cvtpd2dq", { XM, EXx } },
+ },
+
+ /* PREFIX_0FE7 */
+ {
+ { "movntq", { EM, MX } },
+ { "(bad)", { XX } },
+ { "movntdq",{ EM, XM } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0FF0 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { MOD_TABLE (MOD_0FF0_PREFIX_3) },
+ },
+
+ /* PREFIX_0FF7 */
+ {
+ { "maskmovq", { MX, MS } },
+ { "(bad)", { XX } },
+ { "maskmovdqu", { XM, XS } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3810 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pblendvb", {XM, EXx, XMM0 } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3814 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "blendvps", {XM, EXx, XMM0 } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3815 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "blendvpd", { XM, EXx, XMM0 } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3817 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "ptest", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3820 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxbw", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3821 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxbd", { XM, EXd } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3822 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxbq", { XM, EXw } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3823 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxwd", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3824 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxwq", { XM, EXd } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3825 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovsxdq", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3828 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmuldq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3829 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpeqq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F382A */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "movntdqa", { XM, EM } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F382B */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "packusdw", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3830 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxbw", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3831 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxbd", { XM, EXd } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3832 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxbq", { XM, EXw } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3833 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxwd", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3834 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxwq", { XM, EXd } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3835 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmovzxdq", { XM, EXq } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3837 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpgtq", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3838 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pminsb", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3839 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pminsd", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383A */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pminuw", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383B */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pminud", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383C */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmaxsb", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383D */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmaxsd", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383E */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmaxuw", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F383F */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmaxud", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3840 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmulld", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3841 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "phminposuw", { XM, EXx } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F38F0 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
+ },
+
+ /* PREFIX_0F38F1 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
+ },
+
+ /* PREFIX_0F3A08 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "roundps", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A09 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "roundpd", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A0A */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "roundss", { XM, EXd, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A0B */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "roundsd", { XM, EXq, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A0C */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "blendps", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A0D */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "blendpd", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A0E */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pblendw", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A14 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pextrb", { Edqb, XM, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A15 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pextrw", { Edqw, XM, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A16 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pextrK", { Edq, XM, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A17 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "extractps", { Edqd, XM, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A20 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pinsrb", { XM, Edqb, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A21 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "insertps", { XM, EXd, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A22 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pinsrK", { XM, Edq, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A40 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "dpps", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A41 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "dppd", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A42 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "mpsadbw", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A60 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpestrm", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A61 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpestri", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A62 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpistrm", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F3A63 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcmpistri", { XM, EXx, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F73_REG_3 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "psrldq", { MS, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0F73_REG_7 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pslldq", { MS, Ib } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREFIX_0FC7_REG_6 */
+ {
+ { "vmptrld",{ Mq } },
+ { "vmxon", { Mq } },
+ { "vmclear",{ Mq } },
+ { "(bad)", { XX } },
+ },
+};
+
+static const struct dis386 x86_64_table[][2] = {
+ /* X86_64_06 */
+ {
+ { "push{T|}", { es } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_07 */
+ {
+ { "pop{T|}", { es } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_0D */
+ {
+ { "push{T|}", { cs } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_16 */
+ {
+ { "push{T|}", { ss } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_17 */
+ {
+ { "pop{T|}", { ss } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_1E */
+ {
+ { "push{T|}", { ds } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_1F */
+ {
+ { "pop{T|}", { ds } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_27 */
+ {
+ { "daa", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_2F */
+ {
+ { "das", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_37 */
+ {
+ { "aaa", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_3F */
+ {
+ { "aas", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_60 */
+ {
+ { "pusha{P|}", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_61 */
+ {
+ { "popa{P|}", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_62 */
+ {
+ { MOD_TABLE (MOD_62_32BIT) },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_63 */
+ {
+ { "arpl", { Ew, Gw } },
+ { "movs{lq|xd}", { Gv, Ed } },
+ },
+
+ /* X86_64_6D */
+ {
+ { "ins{R|}", { Yzr, indirDX } },
+ { "ins{G|}", { Yzr, indirDX } },
+ },
+
+ /* X86_64_6F */
+ {
+ { "outs{R|}", { indirDXr, Xz } },
+ { "outs{G|}", { indirDXr, Xz } },
+ },
+
+ /* X86_64_9A */
+ {
+ { "Jcall{T|}", { Ap } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_C4 */
+ {
+ { MOD_TABLE (MOD_C4_32BIT) },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_C5 */
+ {
+ { MOD_TABLE (MOD_C5_32BIT) },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_CE */
+ {
+ { "into", { XX } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_D4 */
+ {
+ { "aam", { sIb } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_D5 */
+ {
+ { "aad", { sIb } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_EA */
+ {
+ { "Jjmp{T|}", { Ap } },
+ { "(bad)", { XX } },
+ },
+
+ /* X86_64_0F01_REG_0 */
+ {
+ { "sgdt{Q|IQ}", { M } },
+ { "sgdt", { M } },
+ },
+
+ /* X86_64_0F01_REG_1 */
+ {
+ { "sidt{Q|IQ}", { M } },
+ { "sidt", { M } },
+ },
+
+ /* X86_64_0F01_REG_2 */
+ {
+ { "lgdt{Q|Q}", { M } },
+ { "lgdt", { M } },
+ },
+
+ /* X86_64_0F01_REG_3 */
+ {
+ { "lidt{Q|Q}", { M } },
+ { "lidt", { M } },
+ },
+};
+
+static const struct dis386 three_byte_table[][256] = {
+ /* THREE_BYTE_0F24 */
+ {
+ /* 00 */
+ { "fmaddps", { { OP_DREX4, q_mode } } },
+ { "fmaddpd", { { OP_DREX4, q_mode } } },
+ { "fmaddss", { { OP_DREX4, w_mode } } },
+ { "fmaddsd", { { OP_DREX4, d_mode } } },
+ { "fmaddps", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fmaddpd", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fmaddss", { { OP_DREX4, DREX_OC1 + w_mode } } },
+ { "fmaddsd", { { OP_DREX4, DREX_OC1 + d_mode } } },
+ /* 08 */
+ { "fmsubps", { { OP_DREX4, q_mode } } },
+ { "fmsubpd", { { OP_DREX4, q_mode } } },
+ { "fmsubss", { { OP_DREX4, w_mode } } },
+ { "fmsubsd", { { OP_DREX4, d_mode } } },
+ { "fmsubps", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fmsubpd", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fmsubss", { { OP_DREX4, DREX_OC1 + w_mode } } },
+ { "fmsubsd", { { OP_DREX4, DREX_OC1 + d_mode } } },
+ /* 10 */
+ { "fnmaddps", { { OP_DREX4, q_mode } } },
+ { "fnmaddpd", { { OP_DREX4, q_mode } } },
+ { "fnmaddss", { { OP_DREX4, w_mode } } },
+ { "fnmaddsd", { { OP_DREX4, d_mode } } },
+ { "fnmaddps", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fnmaddpd", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fnmaddss", { { OP_DREX4, DREX_OC1 + w_mode } } },
+ { "fnmaddsd", { { OP_DREX4, DREX_OC1 + d_mode } } },
+ /* 18 */
+ { "fnmsubps", { { OP_DREX4, q_mode } } },
+ { "fnmsubpd", { { OP_DREX4, q_mode } } },
+ { "fnmsubss", { { OP_DREX4, w_mode } } },
+ { "fnmsubsd", { { OP_DREX4, d_mode } } },
+ { "fnmsubps", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fnmsubpd", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "fnmsubss", { { OP_DREX4, DREX_OC1 + w_mode } } },
+ { "fnmsubsd", { { OP_DREX4, DREX_OC1 + d_mode } } },
+ /* 20 */
+ { "permps", { { OP_DREX4, q_mode } } },
+ { "permpd", { { OP_DREX4, q_mode } } },
+ { "pcmov", { { OP_DREX4, q_mode } } },
+ { "pperm", { { OP_DREX4, q_mode } } },
+ { "permps", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "permpd", { { OP_DREX4, DREX_OC1 + q_mode } } },
+ { "pcmov", { { OP_DREX4, DREX_OC1 + w_mode } } },
+ { "pperm", { { OP_DREX4, DREX_OC1 + d_mode } } },
+ /* 28 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 30 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 38 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 40 */
+ { "protb", { { OP_DREX3, q_mode } } },
+ { "protw", { { OP_DREX3, q_mode } } },
+ { "protd", { { OP_DREX3, q_mode } } },
+ { "protq", { { OP_DREX3, q_mode } } },
+ { "pshlb", { { OP_DREX3, q_mode } } },
+ { "pshlw", { { OP_DREX3, q_mode } } },
+ { "pshld", { { OP_DREX3, q_mode } } },
+ { "pshlq", { { OP_DREX3, q_mode } } },
+ /* 48 */
+ { "pshab", { { OP_DREX3, q_mode } } },
+ { "pshaw", { { OP_DREX3, q_mode } } },
+ { "pshad", { { OP_DREX3, q_mode } } },
+ { "pshaq", { { OP_DREX3, q_mode } } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmacssww", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacsswd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacssdql", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmacssdd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacssdqh", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmacsww", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacswd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacsdql", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmacsdd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "pmacsdqh", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmadcsswd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pmadcswd", { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ /* THREE_BYTE_0F25 */
+ {
+ /* 00 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 08 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 10 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 18 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 20 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 28 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "comps", { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
+ { "compd", { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
+ { "comss", { { OP_DREX3, w_mode }, { OP_DREX_FCMP, b_mode } } },
+ { "comsd", { { OP_DREX3, d_mode }, { OP_DREX_FCMP, b_mode } } },
+ /* 30 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 38 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 40 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 48 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcomb", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomw", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomd", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomq", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pcomub", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomuw", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomud", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ { "pcomuq", { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ /* THREE_BYTE_0F38 */
+ {
+ /* 00 */
+ { "pshufb", { MX, EM } },
+ { "phaddw", { MX, EM } },
+ { "phaddd", { MX, EM } },
+ { "phaddsw", { MX, EM } },
+ { "pmaddubsw", { MX, EM } },
+ { "phsubw", { MX, EM } },
+ { "phsubd", { MX, EM } },
+ { "phsubsw", { MX, EM } },
+ /* 08 */
+ { "psignb", { MX, EM } },
+ { "psignw", { MX, EM } },
+ { "psignd", { MX, EM } },
+ { "pmulhrsw", { MX, EM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 10 */
+ { PREFIX_TABLE (PREFIX_0F3810) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F3814) },
+ { PREFIX_TABLE (PREFIX_0F3815) },
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F3817) },
+ /* 18 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "pabsb", { MX, EM } },
+ { "pabsw", { MX, EM } },
+ { "pabsd", { MX, EM } },
+ { "(bad)", { XX } },
+ /* 20 */
+ { PREFIX_TABLE (PREFIX_0F3820) },
+ { PREFIX_TABLE (PREFIX_0F3821) },
+ { PREFIX_TABLE (PREFIX_0F3822) },
+ { PREFIX_TABLE (PREFIX_0F3823) },
+ { PREFIX_TABLE (PREFIX_0F3824) },
+ { PREFIX_TABLE (PREFIX_0F3825) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 28 */
+ { PREFIX_TABLE (PREFIX_0F3828) },
+ { PREFIX_TABLE (PREFIX_0F3829) },
+ { PREFIX_TABLE (PREFIX_0F382A) },
+ { PREFIX_TABLE (PREFIX_0F382B) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 30 */
+ { PREFIX_TABLE (PREFIX_0F3830) },
+ { PREFIX_TABLE (PREFIX_0F3831) },
+ { PREFIX_TABLE (PREFIX_0F3832) },
+ { PREFIX_TABLE (PREFIX_0F3833) },
+ { PREFIX_TABLE (PREFIX_0F3834) },
+ { PREFIX_TABLE (PREFIX_0F3835) },
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F3837) },
+ /* 38 */
+ { PREFIX_TABLE (PREFIX_0F3838) },
+ { PREFIX_TABLE (PREFIX_0F3839) },
+ { PREFIX_TABLE (PREFIX_0F383A) },
+ { PREFIX_TABLE (PREFIX_0F383B) },
+ { PREFIX_TABLE (PREFIX_0F383C) },
+ { PREFIX_TABLE (PREFIX_0F383D) },
+ { PREFIX_TABLE (PREFIX_0F383E) },
+ { PREFIX_TABLE (PREFIX_0F383F) },
+ /* 40 */
+ { PREFIX_TABLE (PREFIX_0F3840) },
+ { PREFIX_TABLE (PREFIX_0F3841) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 48 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { PREFIX_TABLE (PREFIX_0F38F0) },
+ { PREFIX_TABLE (PREFIX_0F38F1) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ /* THREE_BYTE_0F3A */
+ {
+ /* 00 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 08 */
+ { PREFIX_TABLE (PREFIX_0F3A08) },
+ { PREFIX_TABLE (PREFIX_0F3A09) },
+ { PREFIX_TABLE (PREFIX_0F3A0A) },
+ { PREFIX_TABLE (PREFIX_0F3A0B) },
+ { PREFIX_TABLE (PREFIX_0F3A0C) },
+ { PREFIX_TABLE (PREFIX_0F3A0D) },
+ { PREFIX_TABLE (PREFIX_0F3A0E) },
+ { "palignr", { MX, EM, Ib } },
+ /* 10 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F3A14) },
+ { PREFIX_TABLE (PREFIX_0F3A15) },
+ { PREFIX_TABLE (PREFIX_0F3A16) },
+ { PREFIX_TABLE (PREFIX_0F3A17) },
+ /* 18 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 20 */
+ { PREFIX_TABLE (PREFIX_0F3A20) },
+ { PREFIX_TABLE (PREFIX_0F3A21) },
+ { PREFIX_TABLE (PREFIX_0F3A22) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 28 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 30 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 38 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 40 */
+ { PREFIX_TABLE (PREFIX_0F3A40) },
+ { PREFIX_TABLE (PREFIX_0F3A41) },
+ { PREFIX_TABLE (PREFIX_0F3A42) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 48 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { PREFIX_TABLE (PREFIX_0F3A60) },
+ { PREFIX_TABLE (PREFIX_0F3A61) },
+ { PREFIX_TABLE (PREFIX_0F3A62) },
+ { PREFIX_TABLE (PREFIX_0F3A63) },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ /* THREE_BYTE_0F7A */
+ {
+ /* 00 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 08 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 10 */
+ { "frczps", { XM, EXq } },
+ { "frczpd", { XM, EXq } },
+ { "frczss", { XM, EXq } },
+ { "frczsd", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 18 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 20 */
+ { "ptest", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 28 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 30 */
+ { "cvtph2ps", { XM, EXd } },
+ { "cvtps2ph", { EXd, XM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 38 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 40 */
+ { "(bad)", { XX } },
+ { "phaddbw", { XM, EXq } },
+ { "phaddbd", { XM, EXq } },
+ { "phaddbq", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "phaddwd", { XM, EXq } },
+ { "phaddwq", { XM, EXq } },
+ /* 48 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "phadddq", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "phaddubw", { XM, EXq } },
+ { "phaddubd", { XM, EXq } },
+ { "phaddubq", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "phadduwd", { XM, EXq } },
+ { "phadduwq", { XM, EXq } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "phaddudq", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { "(bad)", { XX } },
+ { "phsubbw", { XM, EXq } },
+ { "phsubbd", { XM, EXq } },
+ { "phsubbq", { XM, EXq } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ /* THREE_BYTE_0F7B */
+ {
+ /* 00 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 08 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 10 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 18 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 20 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 28 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 30 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 38 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 40 */
+ { "protb", { XM, EXq, Ib } },
+ { "protw", { XM, EXq, Ib } },
+ { "protd", { XM, EXq, Ib } },
+ { "protq", { XM, EXq, Ib } },
+ { "pshlb", { XM, EXq, Ib } },
+ { "pshlw", { XM, EXq, Ib } },
+ { "pshld", { XM, EXq, Ib } },
+ { "pshlq", { XM, EXq, Ib } },
+ /* 48 */
+ { "pshab", { XM, EXq, Ib } },
+ { "pshaw", { XM, EXq, Ib } },
+ { "pshad", { XM, EXq, Ib } },
+ { "pshaq", { XM, EXq, Ib } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 50 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 58 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 60 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 68 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 70 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 78 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 80 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 88 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 90 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* 98 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* a8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* b8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* c8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* d8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* e8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f0 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ /* f8 */
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ }
+};
+
+static const struct dis386 mod_table[][2] = {
+ {
+ /* MOD_8D */
+ { "leaS", { Gv, M } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F13 */
+ { "movlpX", { EXq, XM } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F17 */
+ { "movhpX", { EXq, XM } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F20 */
+ { "(bad)", { XX } },
+ { "movZ", { Rm, Cm } },
+ },
+ {
+ /* MOD_0F21 */
+ { "(bad)", { XX } },
+ { "movZ", { Rm, Dm } },
+ },
+ {
+ /* MOD_0F22 */
+ { "(bad)", { XX } },
+ { "movZ", { Cm, Rm } },
+ },
+ {
+ /* MOD_0F23 */
+ { "(bad)", { XX } },
+ { "movZ", { Dm, Rm } },
+ },
+ {
+ /* MOD_0F24 */
+ { THREE_BYTE_TABLE (THREE_BYTE_0F24) },
+ { "movL", { Rd, Td } },
+ },
+ {
+ /* MOD_0F26 */
+ { "(bad)", { XX } },
+ { "movL", { Td, Rd } },
+ },
+ {
+ /* MOD_0FB2 */
+ { "lssS", { Gv, Mp } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FB4 */
+ { "lfsS", { Gv, Mp } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FB5 */
+ { "lgsS", { Gv, Mp } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F01_REG_0 */
+ { X86_64_TABLE (X86_64_0F01_REG_0) },
+ { RM_TABLE (RM_0F01_REG_0) },
+ },
+ {
+ /* MOD_0F01_REG_1 */
+ { X86_64_TABLE (X86_64_0F01_REG_1) },
+ { RM_TABLE (RM_0F01_REG_1) },
+ },
+ {
+ /* MOD_0F01_REG_2 */
+ { X86_64_TABLE (X86_64_0F01_REG_2) },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F01_REG_3 */
+ { X86_64_TABLE (X86_64_0F01_REG_3) },
+ { RM_TABLE (RM_0F01_REG_3) },
+ },
+ {
+ /* MOD_0F01_REG_7 */
+ { "invlpg", { Mb } },
+ { RM_TABLE (RM_0F01_REG_7) },
+ },
+ {
+ /* MOD_0F18_REG_0 */
+ { "prefetchnta", { Mb } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F18_REG_1 */
+ { "prefetcht0", { Mb } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F18_REG_2 */
+ { "prefetcht1", { Mb } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F18_REG_3 */
+ { "prefetcht2", { Mb } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F71_REG_2 */
+ { "(bad)", { XX } },
+ { "psrlw", { MS, Ib } },
+ },
+ {
+ /* MOD_0F71_REG_4 */
+ { "(bad)", { XX } },
+ { "psraw", { MS, Ib } },
+ },
+ {
+ /* MOD_0F71_REG_6 */
+ { "(bad)", { XX } },
+ { "psllw", { MS, Ib } },
+ },
+ {
+ /* MOD_0F72_REG_2 */
+ { "(bad)", { XX } },
+ { "psrld", { MS, Ib } },
+ },
+ {
+ /* MOD_0F72_REG_4 */
+ { "(bad)", { XX } },
+ { "psrad", { MS, Ib } },
+ },
+ {
+ /* MOD_0F72_REG_6 */
+ { "(bad)", { XX } },
+ { "pslld", { MS, Ib } },
+ },
+ {
+ /* MOD_0F73_REG_2 */
+ { "(bad)", { XX } },
+ { "psrlq", { MS, Ib } },
+ },
+ {
+ /* MOD_0F73_REG_3 */
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F73_REG_3) },
+ },
+ {
+ /* MOD_0F73_REG_6 */
+ { "(bad)", { XX } },
+ { "psllq", { MS, Ib } },
+ },
+ {
+ /* MOD_0F73_REG_7 */
+ { "(bad)", { XX } },
+ { PREFIX_TABLE (PREFIX_0F73_REG_7) },
+ },
+ {
+ /* MOD_0FAE_REG_0 */
+ { "fxsave", { M } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FAE_REG_1 */
+ { "fxrstor", { M } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FAE_REG_2 */
+ { "ldmxcsr", { Md } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FAE_REG_3 */
+ { "stmxcsr", { Md } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FAE_REG_5 */
+ { "(bad)", { XX } },
+ { RM_TABLE (RM_0FAE_REG_5) },
+ },
+ {
+ /* MOD_0FAE_REG_6 */
+ { "(bad)", { XX } },
+ { RM_TABLE (RM_0FAE_REG_6) },
+ },
+ {
+ /* MOD_0FAE_REG_7 */
+ { "clflush", { Mb } },
+ { RM_TABLE (RM_0FAE_REG_7) },
+ },
+ {
+ /* MOD_0FC7_REG_6 */
+ { PREFIX_TABLE (PREFIX_0FC7_REG_6) },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0FC7_REG_7 */
+ { "vmptrst", { Mq } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_0F12_PREFIX_0 */
+ { "movlps", { XM, EXq } },
+ { "movhlps", { XM, EXq } },
+ },
+ {
+ /* MOD_0F16_PREFIX_0 */
+ { "movhps", { XM, EXq } },
+ { "movlhps", { XM, EXq } },
+ },
+ {
+ /* MOD_0FF0_PREFIX_3 */
+ { "lddqu", { XM, M } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_62_32BIT */
+ { "bound{S|}", { Gv, Ma } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_C4_32BIT */
+ { "lesS", { Gv, Mp } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* MOD_C5_32BIT */
+ { "ldsS", { Gv, Mp } },
+ { "(bad)", { XX } },
+ },
+};
+
+static const struct dis386 rm_table[][8] = {
+ {
+ /* RM_0F01_REG_0 */
+ { "(bad)", { XX } },
+ { "vmcall", { Skip_MODRM } },
+ { "vmlaunch", { Skip_MODRM } },
+ { "vmresume", { Skip_MODRM } },
+ { "vmxoff", { Skip_MODRM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* RM_0F01_REG_1 */
+ { "monitor", { { OP_Monitor, 0 } } },
+ { "mwait", { { OP_Mwait, 0 } } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* RM_0F01_REG_3 */
+ { "vmrun", { Skip_MODRM } },
+ { "vmmcall", { Skip_MODRM } },
+ { "vmload", { Skip_MODRM } },
+ { "vmsave", { Skip_MODRM } },
+ { "stgi", { Skip_MODRM } },
+ { "clgi", { Skip_MODRM } },
+ { "skinit", { Skip_MODRM } },
+ { "invlpga", { Skip_MODRM } },
+ },
+ {
+ /* RM_0F01_REG_7 */
+ { "swapgs", { Skip_MODRM } },
+ { "rdtscp", { Skip_MODRM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* RM_0FAE_REG_5 */
+ { "lfence", { Skip_MODRM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* RM_0FAE_REG_6 */
+ { "mfence", { Skip_MODRM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+ {
+ /* RM_0FAE_REG_7 */
+ { "sfence", { Skip_MODRM } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ },
+};
+
+#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
+
+static void
+ckprefix (void)
+{
+ int newrex;
+ rex = 0;
+ prefixes = 0;
+ used_prefixes = 0;
+ rex_used = 0;
+ while (1)
+ {
+ FETCH_DATA (the_info, codep + 1);
+ newrex = 0;
+ switch (*codep)
+ {
+ /* REX prefixes family. */
+ case 0x40:
+ case 0x41:
+ case 0x42:
+ case 0x43:
+ case 0x44:
+ case 0x45:
+ case 0x46:
+ case 0x47:
+ case 0x48:
+ case 0x49:
+ case 0x4a:
+ case 0x4b:
+ case 0x4c:
+ case 0x4d:
+ case 0x4e:
+ case 0x4f:
+ if (address_mode == mode_64bit)
+ newrex = *codep;
+ else
+ return;
+ break;
+ case 0xf3:
+ prefixes |= PREFIX_REPZ;
+ break;
+ case 0xf2:
+ prefixes |= PREFIX_REPNZ;
+ break;
+ case 0xf0:
+ prefixes |= PREFIX_LOCK;
+ break;
+ case 0x2e:
+ prefixes |= PREFIX_CS;
+ break;
+ case 0x36:
+ prefixes |= PREFIX_SS;
+ break;
case 0x3e:
prefixes |= PREFIX_DS;
break;
/* fwait is really an instruction. If there are prefixes
before the fwait, they belong to the fwait, *not* to the
following instruction. */
- if (prefixes)
+ if (prefixes || rex)
{
prefixes |= PREFIX_FWAIT;
codep++;
/* Rex is ignored when followed by another prefix. */
if (rex)
{
- oappend (prefix_name (rex, 0));
- oappend (" ");
+ rex_used = rex;
+ return;
}
rex = newrex;
codep++;
prefix byte. */
static const char *
-prefix_name (pref, sizeflag)
- int pref;
- int sizeflag;
+prefix_name (int pref, int sizeflag)
{
+ static const char *rexes [16] =
+ {
+ "rex", /* 0x40 */
+ "rex.B", /* 0x41 */
+ "rex.X", /* 0x42 */
+ "rex.XB", /* 0x43 */
+ "rex.R", /* 0x44 */
+ "rex.RB", /* 0x45 */
+ "rex.RX", /* 0x46 */
+ "rex.RXB", /* 0x47 */
+ "rex.W", /* 0x48 */
+ "rex.WB", /* 0x49 */
+ "rex.WX", /* 0x4a */
+ "rex.WXB", /* 0x4b */
+ "rex.WR", /* 0x4c */
+ "rex.WRB", /* 0x4d */
+ "rex.WRX", /* 0x4e */
+ "rex.WRXB", /* 0x4f */
+ };
+
switch (pref)
{
/* REX prefixes family. */
case 0x40:
- return "rex";
case 0x41:
- return "rexZ";
case 0x42:
- return "rexY";
case 0x43:
- return "rexYZ";
case 0x44:
- return "rexX";
case 0x45:
- return "rexXZ";
case 0x46:
- return "rexXY";
case 0x47:
- return "rexXYZ";
case 0x48:
- return "rex64";
case 0x49:
- return "rex64Z";
case 0x4a:
- return "rex64Y";
case 0x4b:
- return "rex64YZ";
case 0x4c:
- return "rex64X";
case 0x4d:
- return "rex64XZ";
case 0x4e:
- return "rex64XY";
case 0x4f:
- return "rex64XYZ";
+ return rexes [pref - 0x40];
case 0xf3:
return "repz";
case 0xf2:
case 0x66:
return (sizeflag & DFLAG) ? "data16" : "data32";
case 0x67:
- return (sizeflag & AFLAG) ? "addr16" : "addr32";
+ if (address_mode == mode_64bit)
+ return (sizeflag & AFLAG) ? "addr32" : "addr64";
+ else
+ return (sizeflag & AFLAG) ? "addr16" : "addr32";
case FWAIT_OPCODE:
return "fwait";
default:
}
}
-static char op1out[100], op2out[100], op3out[100];
-static int op_ad, op_index[3];
-static unsigned int op_address[3];
-static unsigned int op_riprel[3];
+static char op_out[MAX_OPERANDS][100];
+static int op_ad, op_index[MAX_OPERANDS];
+static int two_source_ops;
+static bfd_vma op_address[MAX_OPERANDS];
+static bfd_vma op_riprel[MAX_OPERANDS];
static bfd_vma start_pc;
-\f
/*
* On the 386's of 1988, the maximum length of an instruction is 15 bytes.
* (see topic "Redundant prefixes" in the "Differences from 8086"
* The function returns the length of this instruction in bytes.
*/
-static int print_insn_i386
- PARAMS ((bfd_vma pc, disassemble_info *info));
-
static char intel_syntax;
static char open_char;
static char close_char;
static char separator_char;
static char scale_char;
-int
-print_insn_i386_att (pc, info)
- bfd_vma pc;
- disassemble_info *info;
-{
- intel_syntax = 0;
- open_char = '(';
- close_char = ')';
- separator_char = ',';
- scale_char = ',';
+/* Here for backwards compatibility. When gdb stops using
+ print_insn_i386_att and print_insn_i386_intel these functions can
+ disappear, and print_insn_i386 be merged into print_insn. */
+int
+print_insn_i386_att (bfd_vma pc, disassemble_info *info)
+{
+ intel_syntax = 0;
+
+ return print_insn (pc, info);
+}
+
+int
+print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
+{
+ intel_syntax = 1;
+
+ return print_insn (pc, info);
+}
+
+int
+print_insn_i386 (bfd_vma pc, disassemble_info *info)
+{
+ intel_syntax = -1;
+
+ return print_insn (pc, info);
+}
+
+void
+print_i386_disassembler_options (FILE *stream)
+{
+ fprintf (stream, _("\n\
+The following i386/x86-64 specific disassembler options are supported for use\n\
+with the -M switch (multiple options should be separated by commas):\n"));
+
+ fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
+ fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
+ fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
+ fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
+ fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
+ fprintf (stream, _(" addr64 Assume 64bit address size\n"));
+ fprintf (stream, _(" addr32 Assume 32bit address size\n"));
+ fprintf (stream, _(" addr16 Assume 16bit address size\n"));
+ fprintf (stream, _(" data32 Assume 32bit data size\n"));
+ fprintf (stream, _(" data16 Assume 16bit data size\n"));
+ fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
+}
+
+/* Get a pointer to struct dis386 with a valid name. */
+
+static const struct dis386 *
+get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
+{
+ int index;
+
+ if (dp->name != NULL)
+ return dp;
+
+ switch (dp->op[0].bytemode)
+ {
+ case USE_REG_TABLE:
+ dp = ®_table[dp->op[1].bytemode][modrm.reg];
+ break;
+
+ case USE_MOD_TABLE:
+ index = modrm.mod == 0x3 ? 1 : 0;
+ dp = &mod_table[dp->op[1].bytemode][index];
+ break;
+
+ case USE_RM_TABLE:
+ dp = &rm_table[dp->op[1].bytemode][modrm.rm];
+ break;
+
+ case USE_PREFIX_TABLE:
+ index = 0;
+ used_prefixes |= (prefixes & PREFIX_REPZ);
+ if (prefixes & PREFIX_REPZ)
+ {
+ index = 1;
+ repz_prefix = NULL;
+ }
+ else
+ {
+ /* We should check PREFIX_REPNZ and PREFIX_REPZ before
+ PREFIX_DATA. */
+ used_prefixes |= (prefixes & PREFIX_REPNZ);
+ if (prefixes & PREFIX_REPNZ)
+ {
+ index = 3;
+ repnz_prefix = NULL;
+ }
+ else
+ {
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ if (prefixes & PREFIX_DATA)
+ {
+ index = 2;
+ data_prefix = NULL;
+ }
+ }
+ }
+ dp = &prefix_table[dp->op[1].bytemode][index];
+ break;
+
+ case USE_X86_64_TABLE:
+ index = address_mode == mode_64bit ? 1 : 0;
+ dp = &x86_64_table[dp->op[1].bytemode][index];
+ break;
- return print_insn_i386 (pc, info);
-}
+ case USE_3BYTE_TABLE:
+ FETCH_DATA (info, codep + 2);
+ index = *codep++;
+ dp = &three_byte_table[dp->op[1].bytemode][index];
+ modrm.mod = (*codep >> 6) & 3;
+ modrm.reg = (*codep >> 3) & 7;
+ modrm.rm = *codep & 7;
+ break;
-int
-print_insn_i386_intel (pc, info)
- bfd_vma pc;
- disassemble_info *info;
-{
- intel_syntax = 1;
- open_char = '[';
- close_char = ']';
- separator_char = '+';
- scale_char = '*';
+ default:
+ oappend (INTERNAL_DISASSEMBLER_ERROR);
+ return NULL;
+ }
- return print_insn_i386 (pc, info);
+ if (dp->name != NULL)
+ return dp;
+ else
+ return get_valid_dis386 (dp, info);
}
static int
-print_insn_i386 (pc, info)
- bfd_vma pc;
- disassemble_info *info;
+print_insn (bfd_vma pc, disassemble_info *info)
{
const struct dis386 *dp;
int i;
- int two_source_ops;
- char *first, *second, *third;
+ char *op_txt[MAX_OPERANDS];
int needcomma;
- unsigned char need_modrm;
- unsigned char uses_SSE_prefix;
- VOLATILE int sizeflag;
- VOLATILE int orig_sizeflag;
-
+ int sizeflag;
+ const char *p;
struct dis_private priv;
- bfd_byte *inbuf = priv.the_buffer;
+ unsigned char op;
+ char prefix_obuf[32];
+ char *prefix_obufp;
- mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
- || info->mach == bfd_mach_x86_64);
+ if (info->mach == bfd_mach_x86_64_intel_syntax
+ || info->mach == bfd_mach_x86_64)
+ address_mode = mode_64bit;
+ else
+ address_mode = mode_32bit;
+
+ if (intel_syntax == (char) -1)
+ intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
+ || info->mach == bfd_mach_x86_64_intel_syntax);
if (info->mach == bfd_mach_i386_i386
|| info->mach == bfd_mach_x86_64
|| info->mach == bfd_mach_i386_i386_intel_syntax
|| info->mach == bfd_mach_x86_64_intel_syntax)
- sizeflag = AFLAG|DFLAG;
+ priv.orig_sizeflag = AFLAG | DFLAG;
else if (info->mach == bfd_mach_i386_i8086)
- sizeflag = 0;
+ priv.orig_sizeflag = 0;
else
abort ();
- orig_sizeflag = sizeflag;
+
+ for (p = info->disassembler_options; p != NULL; )
+ {
+ if (CONST_STRNEQ (p, "x86-64"))
+ {
+ address_mode = mode_64bit;
+ priv.orig_sizeflag = AFLAG | DFLAG;
+ }
+ else if (CONST_STRNEQ (p, "i386"))
+ {
+ address_mode = mode_32bit;
+ priv.orig_sizeflag = AFLAG | DFLAG;
+ }
+ else if (CONST_STRNEQ (p, "i8086"))
+ {
+ address_mode = mode_16bit;
+ priv.orig_sizeflag = 0;
+ }
+ else if (CONST_STRNEQ (p, "intel"))
+ {
+ intel_syntax = 1;
+ }
+ else if (CONST_STRNEQ (p, "att"))
+ {
+ intel_syntax = 0;
+ }
+ else if (CONST_STRNEQ (p, "addr"))
+ {
+ if (address_mode == mode_64bit)
+ {
+ if (p[4] == '3' && p[5] == '2')
+ priv.orig_sizeflag &= ~AFLAG;
+ else if (p[4] == '6' && p[5] == '4')
+ priv.orig_sizeflag |= AFLAG;
+ }
+ else
+ {
+ if (p[4] == '1' && p[5] == '6')
+ priv.orig_sizeflag &= ~AFLAG;
+ else if (p[4] == '3' && p[5] == '2')
+ priv.orig_sizeflag |= AFLAG;
+ }
+ }
+ else if (CONST_STRNEQ (p, "data"))
+ {
+ if (p[4] == '1' && p[5] == '6')
+ priv.orig_sizeflag &= ~DFLAG;
+ else if (p[4] == '3' && p[5] == '2')
+ priv.orig_sizeflag |= DFLAG;
+ }
+ else if (CONST_STRNEQ (p, "suffix"))
+ priv.orig_sizeflag |= SUFFIX_ALWAYS;
+
+ p = strchr (p, ',');
+ if (p != NULL)
+ p++;
+ }
+
+ if (intel_syntax)
+ {
+ names64 = intel_names64;
+ names32 = intel_names32;
+ names16 = intel_names16;
+ names8 = intel_names8;
+ names8rex = intel_names8rex;
+ names_seg = intel_names_seg;
+ index64 = intel_index64;
+ index32 = intel_index32;
+ index16 = intel_index16;
+ open_char = '[';
+ close_char = ']';
+ separator_char = '+';
+ scale_char = '*';
+ }
+ else
+ {
+ names64 = att_names64;
+ names32 = att_names32;
+ names16 = att_names16;
+ names8 = att_names8;
+ names8rex = att_names8rex;
+ names_seg = att_names_seg;
+ index64 = att_index64;
+ index32 = att_index32;
+ index16 = att_index16;
+ open_char = '(';
+ close_char = ')';
+ separator_char = ',';
+ scale_char = ',';
+ }
/* The output looks better if we put 7 bytes on a line, since that
puts most long word instructions on a single line. */
info->bytes_per_line = 7;
- info->private_data = (PTR) &priv;
+ info->private_data = &priv;
priv.max_fetched = priv.the_buffer;
priv.insn_start = pc;
obuf[0] = 0;
- op1out[0] = 0;
- op2out[0] = 0;
- op3out[0] = 0;
-
- op_index[0] = op_index[1] = op_index[2] = -1;
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ {
+ op_out[i][0] = 0;
+ op_index[i] = -1;
+ }
the_info = info;
start_pc = pc;
- start_codep = inbuf;
- codep = inbuf;
+ start_codep = priv.the_buffer;
+ codep = priv.the_buffer;
if (setjmp (priv.bailout) != 0)
{
const char *name;
/* Getting here means we tried for data but didn't get it. That
- means we have an incomplete instruction of some sort. Just
- print the first byte as a prefix or a .byte pseudo-op. */
- if (codep > inbuf)
+ means we have an incomplete instruction of some sort. Just
+ print the first byte as a prefix or a .byte pseudo-op. */
+ if (codep > priv.the_buffer)
{
- name = prefix_name (inbuf[0], orig_sizeflag);
+ name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
if (name != NULL)
(*info->fprintf_func) (info->stream, "%s", name);
else
{
/* Just print the first byte as a .byte instruction. */
(*info->fprintf_func) (info->stream, ".byte 0x%x",
- (unsigned int) inbuf[0]);
+ (unsigned int) priv.the_buffer[0]);
}
return 1;
ckprefix ();
insn_codep = codep;
+ sizeflag = priv.orig_sizeflag;
FETCH_DATA (info, codep + 1);
two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
- if ((prefixes & PREFIX_FWAIT)
- && ((*codep < 0xd8) || (*codep > 0xdf)))
+ if (((prefixes & PREFIX_FWAIT)
+ && ((*codep < 0xd8) || (*codep > 0xdf)))
+ || (rex && rex_used))
{
const char *name;
- /* fwait not followed by floating point instruction. Print the
- first prefix, which is probably fwait itself. */
- name = prefix_name (inbuf[0], orig_sizeflag);
+ /* fwait not followed by floating point instruction, or rex followed
+ by other prefixes. Print the first prefix. */
+ name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s", name);
return 1;
}
+ op = 0;
if (*codep == 0x0f)
{
+ unsigned char threebyte;
FETCH_DATA (info, codep + 2);
- if (intel_syntax)
- dp = &dis386_twobyte_intel[*++codep];
- else
- dp = &dis386_twobyte_att[*++codep];
+ threebyte = *++codep;
+ dp = &dis386_twobyte[threebyte];
need_modrm = twobyte_has_modrm[*codep];
- uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
+ codep++;
}
else
{
- if (intel_syntax)
- if (mode_64bit)
- dp = &dis386_64_intel[*codep];
- else
- dp = &dis386_intel[*codep];
- else
- if (mode_64bit)
- dp = &disx86_64_att[*codep];
- else
- dp = &dis386_att[*codep];
+ dp = &dis386[*codep];
need_modrm = onebyte_has_modrm[*codep];
- uses_SSE_prefix = 0;
+ codep++;
}
- codep++;
- if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
+ if ((prefixes & PREFIX_REPZ))
{
- oappend ("repz ");
+ repz_prefix = "repz ";
used_prefixes |= PREFIX_REPZ;
}
- if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
+ else
+ repz_prefix = NULL;
+
+ if ((prefixes & PREFIX_REPNZ))
{
- oappend ("repnz ");
+ repnz_prefix = "repnz ";
used_prefixes |= PREFIX_REPNZ;
}
- if (prefixes & PREFIX_LOCK)
+ else
+ repnz_prefix = NULL;
+
+ if ((prefixes & PREFIX_LOCK))
{
- oappend ("lock ");
+ lock_prefix = "lock ";
used_prefixes |= PREFIX_LOCK;
}
+ else
+ lock_prefix = NULL;
- if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
- sizeflag ^= DFLAG;
-
+ addr_prefix = NULL;
if (prefixes & PREFIX_ADDR)
{
sizeflag ^= AFLAG;
- if (sizeflag & AFLAG)
- oappend ("addr32 ");
- else
- oappend ("addr16 ");
- used_prefixes |= PREFIX_ADDR;
+ if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
+ {
+ if ((sizeflag & AFLAG) || address_mode == mode_64bit)
+ addr_prefix = "addr32 ";
+ else
+ addr_prefix = "addr16 ";
+ used_prefixes |= PREFIX_ADDR;
+ }
+ }
+
+ data_prefix = NULL;
+ if ((prefixes & PREFIX_DATA))
+ {
+ sizeflag ^= DFLAG;
+ if (dp->op[2].bytemode == cond_jump_mode
+ && dp->op[0].bytemode == v_mode
+ && !intel_syntax)
+ {
+ if (sizeflag & DFLAG)
+ data_prefix = "data32 ";
+ else
+ data_prefix = "data16 ";
+ used_prefixes |= PREFIX_DATA;
+ }
}
if (need_modrm)
{
FETCH_DATA (info, codep + 1);
- mod = (*codep >> 6) & 3;
- reg = (*codep >> 3) & 7;
- rm = *codep & 7;
+ modrm.mod = (*codep >> 6) & 3;
+ modrm.reg = (*codep >> 3) & 7;
+ modrm.rm = *codep & 7;
}
- if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
+ if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
{
dofloat (sizeflag);
}
else
{
- int index;
- if (dp->name == NULL)
- {
- switch(dp->bytemode2)
+ dp = get_valid_dis386 (dp, info);
+ if (dp != NULL && putop (dp->name, sizeflag) == 0)
+ {
+ for (i = 0; i < MAX_OPERANDS; ++i)
{
- case USE_GROUPS:
- dp = &grps[dp->bytemode1][reg];
- break;
- case USE_PREFIX_USER_TABLE:
- index = 0;
- used_prefixes |= (prefixes & PREFIX_REPZ);
- if (prefixes & PREFIX_REPZ)
- index = 1;
- else
- {
- used_prefixes |= (prefixes & PREFIX_DATA);
- if (prefixes & PREFIX_DATA)
- index = 2;
- else
- {
- used_prefixes |= (prefixes & PREFIX_REPNZ);
- if (prefixes & PREFIX_REPNZ)
- index = 3;
-
- }
- }
- dp = &prefix_user_table[dp->bytemode1][index];
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
+ obufp = op_out[i];
+ op_ad = MAX_OPERANDS - 1 - i;
+ if (dp->op[i].rtn)
+ (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
}
}
-
- putop (dp->name, sizeflag);
-
- obufp = op1out;
- op_ad = 2;
- if (dp->op1)
- (*dp->op1)(dp->bytemode1, sizeflag);
-
- obufp = op2out;
- op_ad = 1;
- if (dp->op2)
- (*dp->op2)(dp->bytemode2, sizeflag);
-
- obufp = op3out;
- op_ad = 0;
- if (dp->op3)
- (*dp->op3)(dp->bytemode3, sizeflag);
}
/* See if any prefixes were not used. If so, print the first one
{
const char *name;
- name = prefix_name (inbuf[0], orig_sizeflag);
+ name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s", name);
if (rex & ~rex_used)
{
const char *name;
- name = prefix_name (rex | 0x40, orig_sizeflag);
+ name = prefix_name (rex | 0x40, priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s ", name);
}
+ prefix_obuf[0] = 0;
+ prefix_obufp = prefix_obuf;
+ if (lock_prefix)
+ prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
+ if (repz_prefix)
+ prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
+ if (repnz_prefix)
+ prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
+ if (addr_prefix)
+ prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
+ if (data_prefix)
+ prefix_obufp = stpcpy (prefix_obufp, data_prefix);
+
+ if (prefix_obuf[0] != 0)
+ (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
+
obufp = obuf + strlen (obuf);
- for (i = strlen (obuf); i < 6; i++)
+ for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
oappend (" ");
oappend (" ");
(*info->fprintf_func) (info->stream, "%s", obuf);
order as the intel book; everything else is printed in reverse order. */
if (intel_syntax || two_source_ops)
{
- first = op1out;
- second = op2out;
- third = op3out;
- op_ad = op_index[0];
- op_index[0] = op_index[2];
- op_index[2] = op_ad;
+ bfd_vma riprel;
+
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ op_txt[i] = op_out[i];
+
+ for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
+ {
+ op_ad = op_index[i];
+ op_index[i] = op_index[MAX_OPERANDS - 1 - i];
+ op_index[MAX_OPERANDS - 1 - i] = op_ad;
+ riprel = op_riprel[i];
+ op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
+ op_riprel[MAX_OPERANDS - 1 - i] = riprel;
+ }
}
else
{
- first = op3out;
- second = op2out;
- third = op1out;
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
}
+
needcomma = 0;
- if (*first)
- {
- if (op_index[0] != -1 && !op_riprel[0])
- (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
- else
- (*info->fprintf_func) (info->stream, "%s", first);
- needcomma = 1;
- }
- if (*second)
- {
- if (needcomma)
- (*info->fprintf_func) (info->stream, ",");
- if (op_index[1] != -1 && !op_riprel[1])
- (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
- else
- (*info->fprintf_func) (info->stream, "%s", second);
- needcomma = 1;
- }
- if (*third)
- {
- if (needcomma)
- (*info->fprintf_func) (info->stream, ",");
- if (op_index[2] != -1 && !op_riprel[2])
- (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
- else
- (*info->fprintf_func) (info->stream, "%s", third);
- }
- for (i = 0; i < 3; i++)
+ for (i = 0; i < MAX_OPERANDS; ++i)
+ if (*op_txt[i])
+ {
+ if (needcomma)
+ (*info->fprintf_func) (info->stream, ",");
+ if (op_index[i] != -1 && !op_riprel[i])
+ (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
+ else
+ (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
+ needcomma = 1;
+ }
+
+ for (i = 0; i < MAX_OPERANDS; i++)
if (op_index[i] != -1 && op_riprel[i])
{
(*info->fprintf_func) (info->stream, " # ");
(*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
+ op_address[op_index[i]]), info);
+ break;
}
- return codep - inbuf;
+ return codep - priv.the_buffer;
}
-static const char *float_mem_att[] = {
+static const char *float_mem[] = {
/* d8 */
- "fadds",
- "fmuls",
- "fcoms",
- "fcomps",
- "fsubs",
- "fsubrs",
- "fdivs",
- "fdivrs",
- /* d9 */
- "flds",
+ "fadd{s|}",
+ "fmul{s|}",
+ "fcom{s|}",
+ "fcomp{s|}",
+ "fsub{s|}",
+ "fsubr{s|}",
+ "fdiv{s|}",
+ "fdivr{s|}",
+ /* d9 */
+ "fld{s|}",
"(bad)",
- "fsts",
- "fstps",
- "fldenv",
+ "fst{s|}",
+ "fstp{s|}",
+ "fldenvIC",
"fldcw",
- "fNstenv",
+ "fNstenvIC",
"fNstcw",
/* da */
- "fiaddl",
- "fimull",
- "ficoml",
- "ficompl",
- "fisubl",
- "fisubrl",
- "fidivl",
- "fidivrl",
+ "fiadd{l|}",
+ "fimul{l|}",
+ "ficom{l|}",
+ "ficomp{l|}",
+ "fisub{l|}",
+ "fisubr{l|}",
+ "fidiv{l|}",
+ "fidivr{l|}",
/* db */
- "fildl",
+ "fild{l|}",
+ "fisttp{l|}",
+ "fist{l|}",
+ "fistp{l|}",
"(bad)",
- "fistl",
- "fistpl",
+ "fld{t||t|}",
"(bad)",
- "fldt",
- "(bad)",
- "fstpt",
+ "fstp{t||t|}",
/* dc */
- "faddl",
- "fmull",
- "fcoml",
- "fcompl",
- "fsubl",
- "fsubrl",
- "fdivl",
- "fdivrl",
+ "fadd{l|}",
+ "fmul{l|}",
+ "fcom{l|}",
+ "fcomp{l|}",
+ "fsub{l|}",
+ "fsubr{l|}",
+ "fdiv{l|}",
+ "fdivr{l|}",
/* dd */
- "fldl",
- "(bad)",
- "fstl",
- "fstpl",
- "frstor",
+ "fld{l|}",
+ "fisttp{ll|}",
+ "fst{l||}",
+ "fstp{l|}",
+ "frstorIC",
"(bad)",
- "fNsave",
+ "fNsaveIC",
"fNstsw",
/* de */
"fiadd",
"fidivr",
/* df */
"fild",
- "(bad)",
+ "fisttp",
"fist",
"fistp",
"fbld",
- "fildll",
+ "fild{ll|}",
"fbstp",
- "fistpll",
+ "fistp{ll|}",
};
-static const char *float_mem_intel[] = {
+static const unsigned char float_mem_mode[] = {
/* d8 */
- "fadd",
- "fmul",
- "fcom",
- "fcomp",
- "fsub",
- "fsubr",
- "fdiv",
- "fdivr",
- /* d9 */
- "fld",
- "(bad)",
- "fst",
- "fstp",
- "fldenv",
- "fldcw",
- "fNstenv",
- "fNstcw",
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ /* d9 */
+ d_mode,
+ 0,
+ d_mode,
+ d_mode,
+ 0,
+ w_mode,
+ 0,
+ w_mode,
/* da */
- "fiadd",
- "fimul",
- "ficom",
- "ficomp",
- "fisub",
- "fisubr",
- "fidiv",
- "fidivr",
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
/* db */
- "fild",
- "(bad)",
- "fist",
- "fistp",
- "(bad)",
- "fld",
- "(bad)",
- "fstp",
+ d_mode,
+ d_mode,
+ d_mode,
+ d_mode,
+ 0,
+ t_mode,
+ 0,
+ t_mode,
/* dc */
- "fadd",
- "fmul",
- "fcom",
- "fcomp",
- "fsub",
- "fsubr",
- "fdiv",
- "fdivr",
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
/* dd */
- "fld",
- "(bad)",
- "fst",
- "fstp",
- "frstor",
- "(bad)",
- "fNsave",
- "fNstsw",
+ q_mode,
+ q_mode,
+ q_mode,
+ q_mode,
+ 0,
+ 0,
+ 0,
+ w_mode,
/* de */
- "fiadd",
- "fimul",
- "ficom",
- "ficomp",
- "fisub",
- "fisubr",
- "fidiv",
- "fidivr",
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
/* df */
- "fild",
- "(bad)",
- "fist",
- "fistp",
- "fbld",
- "fild",
- "fbstp",
- "fistpll",
+ w_mode,
+ w_mode,
+ w_mode,
+ w_mode,
+ t_mode,
+ q_mode,
+ t_mode,
+ q_mode
};
-#define ST OP_ST, 0
-#define STi OP_STi, 0
+#define ST { OP_ST, 0 }
+#define STi { OP_STi, 0 }
-#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
-#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
-#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
-#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
-#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
-#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
-#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
-#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
-#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
+#define FGRPd9_2 NULL, { { NULL, 0 } }
+#define FGRPd9_4 NULL, { { NULL, 1 } }
+#define FGRPd9_5 NULL, { { NULL, 2 } }
+#define FGRPd9_6 NULL, { { NULL, 3 } }
+#define FGRPd9_7 NULL, { { NULL, 4 } }
+#define FGRPda_5 NULL, { { NULL, 5 } }
+#define FGRPdb_4 NULL, { { NULL, 6 } }
+#define FGRPde_3 NULL, { { NULL, 7 } }
+#define FGRPdf_4 NULL, { { NULL, 8 } }
static const struct dis386 float_reg[][8] = {
/* d8 */
{
- { "fadd", ST, STi, XX },
- { "fmul", ST, STi, XX },
- { "fcom", STi, XX, XX },
- { "fcomp", STi, XX, XX },
- { "fsub", ST, STi, XX },
- { "fsubr", ST, STi, XX },
- { "fdiv", ST, STi, XX },
- { "fdivr", ST, STi, XX },
+ { "fadd", { ST, STi } },
+ { "fmul", { ST, STi } },
+ { "fcom", { STi } },
+ { "fcomp", { STi } },
+ { "fsub", { ST, STi } },
+ { "fsubr", { ST, STi } },
+ { "fdiv", { ST, STi } },
+ { "fdivr", { ST, STi } },
},
/* d9 */
{
- { "fld", STi, XX, XX },
- { "fxch", STi, XX, XX },
+ { "fld", { STi } },
+ { "fxch", { STi } },
{ FGRPd9_2 },
- { "(bad)", XX, XX, XX },
+ { "(bad)", { XX } },
{ FGRPd9_4 },
{ FGRPd9_5 },
{ FGRPd9_6 },
},
/* da */
{
- { "fcmovb", ST, STi, XX },
- { "fcmove", ST, STi, XX },
- { "fcmovbe",ST, STi, XX },
- { "fcmovu", ST, STi, XX },
- { "(bad)", XX, XX, XX },
+ { "fcmovb", { ST, STi } },
+ { "fcmove", { ST, STi } },
+ { "fcmovbe",{ ST, STi } },
+ { "fcmovu", { ST, STi } },
+ { "(bad)", { XX } },
{ FGRPda_5 },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
/* db */
{
- { "fcmovnb",ST, STi, XX },
- { "fcmovne",ST, STi, XX },
- { "fcmovnbe",ST, STi, XX },
- { "fcmovnu",ST, STi, XX },
+ { "fcmovnb",{ ST, STi } },
+ { "fcmovne",{ ST, STi } },
+ { "fcmovnbe",{ ST, STi } },
+ { "fcmovnu",{ ST, STi } },
{ FGRPdb_4 },
- { "fucomi", ST, STi, XX },
- { "fcomi", ST, STi, XX },
- { "(bad)", XX, XX, XX },
+ { "fucomi", { ST, STi } },
+ { "fcomi", { ST, STi } },
+ { "(bad)", { XX } },
},
/* dc */
{
- { "fadd", STi, ST, XX },
- { "fmul", STi, ST, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
-#if UNIXWARE_COMPAT
- { "fsub", STi, ST, XX },
- { "fsubr", STi, ST, XX },
- { "fdiv", STi, ST, XX },
- { "fdivr", STi, ST, XX },
+ { "fadd", { STi, ST } },
+ { "fmul", { STi, ST } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+#if SYSV386_COMPAT
+ { "fsub", { STi, ST } },
+ { "fsubr", { STi, ST } },
+ { "fdiv", { STi, ST } },
+ { "fdivr", { STi, ST } },
#else
- { "fsubr", STi, ST, XX },
- { "fsub", STi, ST, XX },
- { "fdivr", STi, ST, XX },
- { "fdiv", STi, ST, XX },
+ { "fsubr", { STi, ST } },
+ { "fsub", { STi, ST } },
+ { "fdivr", { STi, ST } },
+ { "fdiv", { STi, ST } },
#endif
},
/* dd */
{
- { "ffree", STi, XX, XX },
- { "(bad)", XX, XX, XX },
- { "fst", STi, XX, XX },
- { "fstp", STi, XX, XX },
- { "fucom", STi, XX, XX },
- { "fucomp", STi, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "ffree", { STi } },
+ { "(bad)", { XX } },
+ { "fst", { STi } },
+ { "fstp", { STi } },
+ { "fucom", { STi } },
+ { "fucomp", { STi } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
},
/* de */
{
- { "faddp", STi, ST, XX },
- { "fmulp", STi, ST, XX },
- { "(bad)", XX, XX, XX },
+ { "faddp", { STi, ST } },
+ { "fmulp", { STi, ST } },
+ { "(bad)", { XX } },
{ FGRPde_3 },
-#if UNIXWARE_COMPAT
- { "fsubp", STi, ST, XX },
- { "fsubrp", STi, ST, XX },
- { "fdivp", STi, ST, XX },
- { "fdivrp", STi, ST, XX },
+#if SYSV386_COMPAT
+ { "fsubp", { STi, ST } },
+ { "fsubrp", { STi, ST } },
+ { "fdivp", { STi, ST } },
+ { "fdivrp", { STi, ST } },
#else
- { "fsubrp", STi, ST, XX },
- { "fsubp", STi, ST, XX },
- { "fdivrp", STi, ST, XX },
- { "fdivp", STi, ST, XX },
+ { "fsubrp", { STi, ST } },
+ { "fsubp", { STi, ST } },
+ { "fdivrp", { STi, ST } },
+ { "fdivp", { STi, ST } },
#endif
},
/* df */
{
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
- { "(bad)", XX, XX, XX },
+ { "ffreep", { STi } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
{ FGRPdf_4 },
- { "fucomip",ST, STi, XX },
- { "fcomip", ST, STi, XX },
- { "(bad)", XX, XX, XX },
+ { "fucomip", { ST, STi } },
+ { "fcomip", { ST, STi } },
+ { "(bad)", { XX } },
},
};
-
static char *fgrps[][8] = {
/* d9_2 0 */
{
};
static void
-dofloat (sizeflag)
- int sizeflag;
+OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
+{
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
+}
+
+static void
+dofloat (int sizeflag)
{
const struct dis386 *dp;
unsigned char floatop;
floatop = codep[-1];
- if (mod != 3)
+ if (modrm.mod != 3)
{
- if (intel_syntax)
- putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
- else
- putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
- obufp = op1out;
- if (floatop == 0xdb)
- OP_E (x_mode, sizeflag);
- else if (floatop == 0xdd)
- OP_E (d_mode, sizeflag);
- else
- OP_E (v_mode, sizeflag);
+ int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
+
+ putop (float_mem[fp_indx], sizeflag);
+ obufp = op_out[0];
+ op_ad = 2;
+ OP_E (float_mem_mode[fp_indx], sizeflag);
return;
}
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
codep++;
- dp = &float_reg[floatop - 0xd8][reg];
+ dp = &float_reg[floatop - 0xd8][modrm.reg];
if (dp->name == NULL)
{
- putop (fgrps[dp->bytemode1][rm], sizeflag);
+ putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
- /* instruction fnstsw is only one with strange arg */
+ /* Instruction fnstsw is only one with strange arg. */
if (floatop == 0xdf && codep[-1] == 0xe0)
- strcpy (op1out, names16[0]);
+ strcpy (op_out[0], names16[0]);
}
else
{
putop (dp->name, sizeflag);
- obufp = op1out;
- if (dp->op1)
- (*dp->op1)(dp->bytemode1, sizeflag);
- obufp = op2out;
- if (dp->op2)
- (*dp->op2)(dp->bytemode2, sizeflag);
+ obufp = op_out[0];
+ op_ad = 2;
+ if (dp->op[0].rtn)
+ (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
+
+ obufp = op_out[1];
+ op_ad = 1;
+ if (dp->op[1].rtn)
+ (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
}
}
-/* ARGSUSED */
static void
-OP_ST (ignore, sizeflag)
- int ignore ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- oappend ("%st");
+ oappend ("%st" + intel_syntax);
}
-/* ARGSUSED */
static void
-OP_STi (ignore, sizeflag)
- int ignore ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- sprintf (scratchbuf, "%%st(%d)", rm);
- oappend (scratchbuf);
+ sprintf (scratchbuf, "%%st(%d)", modrm.rm);
+ oappend (scratchbuf + intel_syntax);
}
-
-/* capital letters in template are macros */
-static void
-putop (template, sizeflag)
- const char *template;
- int sizeflag;
+/* Capital letters in template are macros. */
+static int
+putop (const char *template, int sizeflag)
{
const char *p;
+ int alt = 0;
for (p = template; *p; p++)
{
default:
*obufp++ = *p;
break;
+ case '{':
+ alt = 0;
+ if (intel_syntax)
+ {
+ while (*++p != '|')
+ if (*p == '}' || *p == '\0')
+ abort ();
+ }
+ /* Fall through. */
+ case 'I':
+ alt = 1;
+ continue;
+ case '|':
+ while (*++p != '}')
+ {
+ if (*p == '\0')
+ abort ();
+ }
+ break;
+ case '}':
+ break;
case 'A':
- if (intel_syntax)
- break;
- if (mod != 3
-#ifdef SUFFIX_ALWAYS
- || (sizeflag & SUFFIX_ALWAYS)
-#endif
- )
+ if (intel_syntax)
+ break;
+ if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
*obufp++ = 'b';
break;
case 'B':
- if (intel_syntax)
- break;
-#ifdef SUFFIX_ALWAYS
+ if (intel_syntax)
+ break;
if (sizeflag & SUFFIX_ALWAYS)
*obufp++ = 'b';
-#endif
+ break;
+ case 'C':
+ if (intel_syntax && !alt)
+ break;
+ if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
+ {
+ if (sizeflag & DFLAG)
+ *obufp++ = intel_syntax ? 'd' : 'l';
+ else
+ *obufp++ = intel_syntax ? 'w' : 's';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ break;
+ case 'D':
+ if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
+ break;
+ USED_REX (REX_W);
+ if (modrm.mod == 3)
+ {
+ if (rex & REX_W)
+ *obufp++ = 'q';
+ else if (sizeflag & DFLAG)
+ *obufp++ = intel_syntax ? 'd' : 'l';
+ else
+ *obufp++ = 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ else
+ *obufp++ = 'w';
break;
case 'E': /* For jcxz/jecxz */
- if (sizeflag & AFLAG)
- *obufp++ = 'e';
+ if (address_mode == mode_64bit)
+ {
+ if (sizeflag & AFLAG)
+ *obufp++ = 'r';
+ else
+ *obufp++ = 'e';
+ }
+ else
+ if (sizeflag & AFLAG)
+ *obufp++ = 'e';
+ used_prefixes |= (prefixes & PREFIX_ADDR);
break;
- case 'I':
- if (intel_syntax)
- break;
- if (mode_64bit)
- *obufp++ = 'q';
+ case 'F':
+ if (intel_syntax)
+ break;
+ if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
+ {
+ if (sizeflag & AFLAG)
+ *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
+ else
+ *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
+ used_prefixes |= (prefixes & PREFIX_ADDR);
+ }
+ break;
+ case 'G':
+ if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
+ break;
+ if ((rex & REX_W) || (sizeflag & DFLAG))
+ *obufp++ = 'l';
else
+ *obufp++ = 'w';
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ case 'H':
+ if (intel_syntax)
+ break;
+ if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
+ || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
{
- if ((prefixes & PREFIX_DATA)
-#ifdef SUFFIX_ALWAYS
- || (sizeflag & SUFFIX_ALWAYS)
-#endif
- )
- {
- if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
+ used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
+ *obufp++ = ',';
+ *obufp++ = 'p';
+ if (prefixes & PREFIX_DS)
+ *obufp++ = 't';
+ else
+ *obufp++ = 'n';
}
break;
+ case 'J':
+ if (intel_syntax)
+ break;
+ *obufp++ = 'l';
+ break;
+ case 'K':
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *obufp++ = 'q';
+ else
+ *obufp++ = 'd';
+ break;
+ case 'Z':
+ if (intel_syntax)
+ break;
+ if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
+ {
+ *obufp++ = 'q';
+ break;
+ }
+ /* Fall through. */
case 'L':
- if (intel_syntax)
- break;
-#ifdef SUFFIX_ALWAYS
+ if (intel_syntax)
+ break;
if (sizeflag & SUFFIX_ALWAYS)
*obufp++ = 'l';
-#endif
break;
case 'N':
if ((prefixes & PREFIX_FWAIT) == 0)
used_prefixes |= PREFIX_FWAIT;
break;
case 'O':
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
- *obufp++ = 'o';
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *obufp++ = 'o';
+ else if (intel_syntax && (sizeflag & DFLAG))
+ *obufp++ = 'q';
else
*obufp++ = 'd';
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
break;
+ case 'T':
+ if (intel_syntax)
+ break;
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
+ {
+ *obufp++ = 'q';
+ break;
+ }
+ /* Fall through. */
case 'P':
- if (intel_syntax)
- break;
+ if (intel_syntax)
+ break;
if ((prefixes & PREFIX_DATA)
- || (rex & REX_MODE64)
-#ifdef SUFFIX_ALWAYS
- || (sizeflag & SUFFIX_ALWAYS)
-#endif
- )
+ || (rex & REX_W)
+ || (sizeflag & SUFFIX_ALWAYS))
{
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
*obufp++ = 'q';
- else
+ else
{
if (sizeflag & DFLAG)
*obufp++ = 'l';
else
*obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
}
+ used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
+ case 'U':
+ if (intel_syntax)
+ break;
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
+ {
+ if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
+ *obufp++ = 'q';
+ break;
+ }
+ /* Fall through. */
case 'Q':
- if (intel_syntax)
- break;
- USED_REX (REX_MODE64);
- if (mod != 3
-#ifdef SUFFIX_ALWAYS
- || (sizeflag & SUFFIX_ALWAYS)
-#endif
- )
+ if (intel_syntax && !alt)
+ break;
+ USED_REX (REX_W);
+ if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
{
- if (rex & REX_MODE64)
+ if (rex & REX_W)
*obufp++ = 'q';
else
{
if (sizeflag & DFLAG)
- *obufp++ = 'l';
+ *obufp++ = intel_syntax ? 'd' : 'l';
else
*obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
}
+ used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case 'R':
- USED_REX (REX_MODE64);
- if (intel_syntax)
- {
- if (rex & REX_MODE64)
- {
- *obufp++ = 'q';
- *obufp++ = 't';
- }
- else if (sizeflag & DFLAG)
- {
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *obufp++ = 'q';
+ else if (sizeflag & DFLAG)
+ {
+ if (intel_syntax)
*obufp++ = 'd';
- *obufp++ = 'q';
- }
else
- {
- *obufp++ = 'w';
- *obufp++ = 'd';
- }
+ *obufp++ = 'l';
}
else
+ *obufp++ = 'w';
+ if (intel_syntax && !p[1]
+ && ((rex & REX_W) || (sizeflag & DFLAG)))
+ *obufp++ = 'e';
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ case 'V':
+ if (intel_syntax)
+ break;
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
{
- if (rex & REX_MODE64)
+ if (sizeflag & SUFFIX_ALWAYS)
*obufp++ = 'q';
- else if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
+ break;
}
- if (!(rex & REX_MODE64))
- used_prefixes |= (prefixes & PREFIX_DATA);
- break;
+ /* Fall through. */
case 'S':
- if (intel_syntax)
- break;
-#ifdef SUFFIX_ALWAYS
+ if (intel_syntax)
+ break;
if (sizeflag & SUFFIX_ALWAYS)
{
- if (rex & REX_MODE64)
+ if (rex & REX_W)
*obufp++ = 'q';
else
{
used_prefixes |= (prefixes & PREFIX_DATA);
}
}
-#endif
- break;
- case 'T':
- if (intel_syntax)
- break;
- if (mode_64bit)
- *obufp++ = 'q';
- else if (mod != 3
-#ifdef SUFFIX_ALWAYS
- || (sizeflag & SUFFIX_ALWAYS)
-#endif
- )
- {
- if (sizeflag & DFLAG)
- *obufp++ = 'l';
- else
- *obufp++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
break;
case 'X':
if (prefixes & PREFIX_DATA)
*obufp++ = 'd';
else
*obufp++ = 's';
- used_prefixes |= (prefixes & PREFIX_DATA);
+ used_prefixes |= (prefixes & PREFIX_DATA);
break;
case 'Y':
- if (intel_syntax)
- break;
- if (rex & REX_MODE64)
+ if (intel_syntax)
+ break;
+ if (rex & REX_W)
{
- USED_REX (REX_MODE64);
+ USED_REX (REX_W);
*obufp++ = 'q';
}
break;
/* implicit operand size 'l' for i386 or 'q' for x86-64 */
case 'W':
/* operand size flag for cwtl, cbtw */
- USED_REX (0);
- if (rex)
- *obufp++ = 'l';
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ {
+ if (intel_syntax)
+ *obufp++ = 'd';
+ else
+ *obufp++ = 'l';
+ }
else if (sizeflag & DFLAG)
*obufp++ = 'w';
else
*obufp++ = 'b';
- if (intel_syntax)
- {
- if (rex)
- {
- *obufp++ = 'q';
- *obufp++ = 'e';
- }
- if (sizeflag & DFLAG)
- {
- *obufp++ = 'd';
- *obufp++ = 'e';
- }
- else
- {
- *obufp++ = 'w';
- }
- }
- if (!rex)
+ if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
break;
}
+ alt = 0;
}
*obufp = 0;
+ return 0;
}
static void
-oappend (s)
- const char *s;
+oappend (const char *s)
{
strcpy (obufp, s);
obufp += strlen (s);
}
static void
-append_seg ()
+append_seg (void)
{
if (prefixes & PREFIX_CS)
{
- oappend ("%cs:");
used_prefixes |= PREFIX_CS;
+ oappend ("%cs:" + intel_syntax);
}
if (prefixes & PREFIX_DS)
{
- oappend ("%ds:");
used_prefixes |= PREFIX_DS;
+ oappend ("%ds:" + intel_syntax);
}
if (prefixes & PREFIX_SS)
{
- oappend ("%ss:");
used_prefixes |= PREFIX_SS;
+ oappend ("%ss:" + intel_syntax);
}
if (prefixes & PREFIX_ES)
{
- oappend ("%es:");
used_prefixes |= PREFIX_ES;
+ oappend ("%es:" + intel_syntax);
}
if (prefixes & PREFIX_FS)
{
- oappend ("%fs:");
used_prefixes |= PREFIX_FS;
+ oappend ("%fs:" + intel_syntax);
}
if (prefixes & PREFIX_GS)
{
- oappend ("%gs:");
used_prefixes |= PREFIX_GS;
+ oappend ("%gs:" + intel_syntax);
}
}
static void
-OP_indirE (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_indirE (int bytemode, int sizeflag)
{
if (!intel_syntax)
oappend ("*");
}
static void
-print_operand_value (buf, hex, disp)
- char *buf;
- int hex;
- bfd_vma disp;
+print_operand_value (char *buf, int hex, bfd_vma disp)
{
- if (mode_64bit)
+ if (address_mode == mode_64bit)
{
if (hex)
{
buf[0] = '0';
buf[1] = 'x';
sprintf_vma (tmp, disp);
- for (i = 0; tmp[i] == '0' && tmp[i+1]; i++);
+ for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
strcpy (buf + 2, tmp + i);
}
else
{
*(buf++) = '-';
v = -disp;
- /* Check for possible overflow on 0x8000000000000000 */
+ /* Check for possible overflow on 0x8000000000000000. */
if (v < 0)
{
strcpy (buf, "9223372036854775808");
tmp[29] = 0;
while (v)
{
- tmp[28-i] = (v % 10) + '0';
+ tmp[28 - i] = (v % 10) + '0';
v /= 10;
i++;
}
}
}
+/* Put DISP in BUF as signed hex number. */
+
+static void
+print_displacement (char *buf, bfd_vma disp)
+{
+ bfd_signed_vma val = disp;
+ char tmp[30];
+ int i, j = 0;
+
+ if (val < 0)
+ {
+ buf[j++] = '-';
+ val = -disp;
+
+ /* Check for possible overflow. */
+ if (val < 0)
+ {
+ switch (address_mode)
+ {
+ case mode_64bit:
+ strcpy (buf + j, "0x8000000000000000");
+ break;
+ case mode_32bit:
+ strcpy (buf + j, "0x80000000");
+ break;
+ case mode_16bit:
+ strcpy (buf + j, "0x8000");
+ break;
+ }
+ return;
+ }
+ }
+
+ buf[j++] = '0';
+ buf[j++] = 'x';
+
+ sprintf_vma (tmp, val);
+ for (i = 0; tmp[i] == '0'; i++)
+ continue;
+ if (tmp[i] == '\0')
+ i--;
+ strcpy (buf + j, tmp + i);
+}
+
+static void
+intel_operand_size (int bytemode, int sizeflag)
+{
+ switch (bytemode)
+ {
+ case b_mode:
+ case dqb_mode:
+ oappend ("BYTE PTR ");
+ break;
+ case w_mode:
+ case dqw_mode:
+ oappend ("WORD PTR ");
+ break;
+ case stack_v_mode:
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
+ {
+ oappend ("QWORD PTR ");
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ }
+ /* FALLTHRU */
+ case v_mode:
+ case dq_mode:
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ oappend ("QWORD PTR ");
+ else if ((sizeflag & DFLAG) || bytemode == dq_mode)
+ oappend ("DWORD PTR ");
+ else
+ oappend ("WORD PTR ");
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ case z_mode:
+ if ((rex & REX_W) || (sizeflag & DFLAG))
+ *obufp++ = 'D';
+ oappend ("WORD PTR ");
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ case d_mode:
+ case dqd_mode:
+ oappend ("DWORD PTR ");
+ break;
+ case q_mode:
+ oappend ("QWORD PTR ");
+ break;
+ case m_mode:
+ if (address_mode == mode_64bit)
+ oappend ("QWORD PTR ");
+ else
+ oappend ("DWORD PTR ");
+ break;
+ case f_mode:
+ if (sizeflag & DFLAG)
+ oappend ("FWORD PTR ");
+ else
+ oappend ("DWORD PTR ");
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ case t_mode:
+ oappend ("TBYTE PTR ");
+ break;
+ case x_mode:
+ oappend ("XMMWORD PTR ");
+ break;
+ case o_mode:
+ oappend ("OWORD PTR ");
+ break;
+ default:
+ break;
+ }
+}
+
static void
-OP_E (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_E_extended (int bytemode, int sizeflag, int has_drex)
{
bfd_vma disp;
int add = 0;
int riprel = 0;
- USED_REX (REX_EXTZ);
- if (rex & REX_EXTZ)
+ USED_REX (REX_B);
+ if (rex & REX_B)
add += 8;
- /* skip mod/rm byte */
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
codep++;
- if (mod == 3)
+ if (modrm.mod == 3)
{
switch (bytemode)
{
case b_mode:
USED_REX (0);
if (rex)
- oappend (names8rex[rm + add]);
+ oappend (names8rex[modrm.rm + add]);
else
- oappend (names8[rm + add]);
+ oappend (names8[modrm.rm + add]);
break;
case w_mode:
- oappend (names16[rm + add]);
+ oappend (names16[modrm.rm + add]);
break;
case d_mode:
- oappend (names32[rm + add]);
+ oappend (names32[modrm.rm + add]);
break;
case q_mode:
- oappend (names64[rm + add]);
+ oappend (names64[modrm.rm + add]);
break;
case m_mode:
- if (mode_64bit)
- oappend (names64[rm + add]);
+ if (address_mode == mode_64bit)
+ oappend (names64[modrm.rm + add]);
else
- oappend (names32[rm + add]);
+ oappend (names32[modrm.rm + add]);
break;
+ case stack_v_mode:
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
+ {
+ oappend (names64[modrm.rm + add]);
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ }
+ bytemode = v_mode;
+ /* FALLTHRU */
case v_mode:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
- oappend (names64[rm + add]);
- else if (sizeflag & DFLAG)
- oappend (names32[rm + add]);
+ case dq_mode:
+ case dqb_mode:
+ case dqd_mode:
+ case dqw_mode:
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ oappend (names64[modrm.rm + add]);
+ else if ((sizeflag & DFLAG) || bytemode != v_mode)
+ oappend (names32[modrm.rm + add]);
else
- oappend (names16[rm + add]);
+ oappend (names16[modrm.rm + add]);
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case 0:
- if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
- && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
- && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
- BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
}
disp = 0;
+ if (intel_syntax)
+ intel_operand_size (bytemode, sizeflag);
append_seg ();
- if (sizeflag & AFLAG) /* 32 bit address mode */
+ if ((sizeflag & AFLAG) || address_mode == mode_64bit)
{
+ /* 32/64 bit address mode */
+ int havedisp;
int havesib;
int havebase;
+ int haveindex;
+ int needindex;
int base;
int index = 0;
int scale = 0;
havesib = 0;
havebase = 1;
- base = rm;
+ haveindex = 0;
+ base = modrm.rm;
if (base == 4)
{
havesib = 1;
FETCH_DATA (the_info, codep + 1);
- scale = (*codep >> 6) & 3;
index = (*codep >> 3) & 7;
+ scale = (*codep >> 6) & 3;
base = *codep & 7;
- USED_REX (REX_EXTY);
- USED_REX (REX_EXTZ);
- if (rex & REX_EXTY)
+ USED_REX (REX_X);
+ if (rex & REX_X)
index += 8;
- if (rex & REX_EXTZ)
- base += 8;
+ haveindex = index != 4;
+ codep++;
+ }
+ base += add;
+
+ /* If we have a DREX byte, skip it now
+ (it has already been handled) */
+ if (has_drex)
+ {
+ FETCH_DATA (the_info, codep + 1);
codep++;
}
- switch (mod)
+ switch (modrm.mod)
{
case 0:
if ((base & 7) == 5)
{
havebase = 0;
- if (mode_64bit && !havesib)
+ if (address_mode == mode_64bit && !havesib)
riprel = 1;
disp = get32s ();
}
break;
}
+ /* In 32bit mode, we need index register to tell [offset] from
+ [eiz*1 + offset]. */
+ needindex = (havesib
+ && !havebase
+ && !haveindex
+ && address_mode == mode_32bit);
+ havedisp = (havebase
+ || needindex
+ || (havesib && (haveindex || scale != 0)));
+
if (!intel_syntax)
- if (mod != 0 || (base & 7) == 5)
- {
- print_operand_value (scratchbuf, !riprel, disp);
- oappend (scratchbuf);
+ if (modrm.mod != 0 || (base & 7) == 5)
+ {
+ if (havedisp || riprel)
+ print_displacement (scratchbuf, disp);
+ else
+ print_operand_value (scratchbuf, 1, disp);
+ oappend (scratchbuf);
if (riprel)
{
set_op (disp, 1);
- oappend ("(%rip)");
+ oappend (sizeflag & AFLAG ? "(%rip)" : "(%eip)");
}
- }
+ }
+
+ if (havebase || haveindex || riprel)
+ used_prefixes |= PREFIX_ADDR;
- if (havebase || (havesib && (index != 4 || scale != 0)))
+ if (havedisp || (intel_syntax && riprel))
{
- if (intel_syntax)
- {
- switch (bytemode)
- {
- case b_mode:
- oappend ("BYTE PTR ");
- break;
- case w_mode:
- oappend ("WORD PTR ");
- break;
- case v_mode:
- oappend ("DWORD PTR ");
- break;
- case d_mode:
- oappend ("QWORD PTR ");
- break;
- case m_mode:
- if (mode_64bit)
- oappend ("DWORD PTR ");
- else
- oappend ("QWORD PTR ");
- break;
- case x_mode:
- oappend ("XWORD PTR ");
- break;
- default:
- break;
- }
- }
*obufp++ = open_char;
if (intel_syntax && riprel)
- oappend ("rip + ");
- *obufp = '\0';
- USED_REX (REX_EXTZ);
- if (!havesib && (rex & REX_EXTZ))
- base += 8;
+ {
+ set_op (disp, 1);
+ oappend (sizeflag & AFLAG ? "rip" : "eip");
+ }
+ *obufp = '\0';
if (havebase)
- oappend (mode_64bit ? names64[base] : names32[base]);
+ oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
+ ? names64[base] : names32[base]);
if (havesib)
{
- if (index != 4)
+ /* ESP/RSP won't allow index. If base isn't ESP/RSP,
+ print index to tell base + index from base. */
+ if (scale != 0
+ || needindex
+ || haveindex
+ || (havebase && base != ESP_REG_NUM))
{
- if (intel_syntax)
- {
- if (havebase)
- {
- *obufp++ = separator_char;
- *obufp = '\0';
- }
- sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]);
- }
- else
- sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]);
+ if (!intel_syntax || havebase)
+ {
+ *obufp++ = separator_char;
+ *obufp = '\0';
+ }
+ if (haveindex)
+ oappend (address_mode == mode_64bit
+ && (sizeflag & AFLAG)
+ ? names64[index] : names32[index]);
+ else
+ oappend (address_mode == mode_64bit
+ && (sizeflag & AFLAG)
+ ? index64 : index32);
+
+ *obufp++ = scale_char;
+ *obufp = '\0';
+ sprintf (scratchbuf, "%d", 1 << scale);
oappend (scratchbuf);
}
- if (!intel_syntax
- || (intel_syntax
- && bytemode != b_mode
- && bytemode != w_mode
- && bytemode != v_mode))
- {
- *obufp++ = scale_char;
- *obufp = '\0';
- sprintf (scratchbuf, "%d", 1 << scale);
- oappend (scratchbuf);
- }
}
- if (intel_syntax)
- if (mod != 0 || (base & 7) == 5)
- {
- /* Don't print zero displacements */
- if (disp != 0)
- {
- print_operand_value (scratchbuf, 0, disp);
- oappend (scratchbuf);
- }
- }
+ if (intel_syntax
+ && (disp || modrm.mod != 0 || (base & 7) == 5))
+ {
+ if (!havedisp || (bfd_signed_vma) disp >= 0)
+ {
+ *obufp++ = '+';
+ *obufp = '\0';
+ }
+ else if (modrm.mod != 1)
+ {
+ *obufp++ = '-';
+ *obufp = '\0';
+ disp = - (bfd_signed_vma) disp;
+ }
+
+ if (havedisp)
+ print_displacement (scratchbuf, disp);
+ else
+ print_operand_value (scratchbuf, 1, disp);
+ oappend (scratchbuf);
+ }
*obufp++ = close_char;
- *obufp = '\0';
+ *obufp = '\0';
}
else if (intel_syntax)
- {
- if (mod != 0 || (base & 7) == 5)
- {
+ {
+ if (modrm.mod != 0 || (base & 7) == 5)
+ {
if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
| PREFIX_ES | PREFIX_FS | PREFIX_GS))
;
else
{
- oappend (names_seg[3]);
+ oappend (names_seg[ds_reg - es_reg]);
oappend (":");
}
print_operand_value (scratchbuf, 1, disp);
- oappend (scratchbuf);
- }
- }
+ oappend (scratchbuf);
+ }
+ }
}
else
{ /* 16 bit address mode */
- switch (mod)
+ switch (modrm.mod)
{
case 0:
- if ((rm & 7) == 6)
+ if (modrm.rm == 6)
{
disp = get16 ();
if ((disp & 0x8000) != 0)
}
if (!intel_syntax)
- if (mod != 0 || (rm & 7) == 6)
- {
- print_operand_value (scratchbuf, 0, disp);
- oappend (scratchbuf);
- }
+ if (modrm.mod != 0 || modrm.rm == 6)
+ {
+ print_displacement (scratchbuf, disp);
+ oappend (scratchbuf);
+ }
- if (mod != 0 || (rm & 7) != 6)
+ if (modrm.mod != 0 || modrm.rm != 6)
{
*obufp++ = open_char;
- *obufp = '\0';
- oappend (index16[rm + add]);
- *obufp++ = close_char;
- *obufp = '\0';
+ *obufp = '\0';
+ oappend (index16[modrm.rm]);
+ if (intel_syntax
+ && (disp || modrm.mod != 0 || modrm.rm == 6))
+ {
+ if ((bfd_signed_vma) disp >= 0)
+ {
+ *obufp++ = '+';
+ *obufp = '\0';
+ }
+ else if (modrm.mod != 1)
+ {
+ *obufp++ = '-';
+ *obufp = '\0';
+ disp = - (bfd_signed_vma) disp;
+ }
+
+ print_displacement (scratchbuf, disp);
+ oappend (scratchbuf);
+ }
+
+ *obufp++ = close_char;
+ *obufp = '\0';
+ }
+ else if (intel_syntax)
+ {
+ if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
+ | PREFIX_ES | PREFIX_FS | PREFIX_GS))
+ ;
+ else
+ {
+ oappend (names_seg[ds_reg - es_reg]);
+ oappend (":");
+ }
+ print_operand_value (scratchbuf, 1, disp & 0xffff);
+ oappend (scratchbuf);
}
}
}
static void
-OP_G (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_E (int bytemode, int sizeflag)
+{
+ OP_E_extended (bytemode, sizeflag, 0);
+}
+
+
+static void
+OP_G (int bytemode, int sizeflag)
{
int add = 0;
- USED_REX (REX_EXTX);
- if (rex & REX_EXTX)
+ USED_REX (REX_R);
+ if (rex & REX_R)
add += 8;
switch (bytemode)
{
case b_mode:
USED_REX (0);
if (rex)
- oappend (names8rex[reg + add]);
+ oappend (names8rex[modrm.reg + add]);
else
- oappend (names8[reg + add]);
+ oappend (names8[modrm.reg + add]);
break;
case w_mode:
- oappend (names16[reg + add]);
+ oappend (names16[modrm.reg + add]);
break;
case d_mode:
- oappend (names32[reg + add]);
+ oappend (names32[modrm.reg + add]);
break;
case q_mode:
- oappend (names64[reg + add]);
+ oappend (names64[modrm.reg + add]);
break;
case v_mode:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
- oappend (names64[reg + add]);
- else if (sizeflag & DFLAG)
- oappend (names32[reg + add]);
+ case dq_mode:
+ case dqb_mode:
+ case dqd_mode:
+ case dqw_mode:
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ oappend (names64[modrm.reg + add]);
+ else if ((sizeflag & DFLAG) || bytemode != v_mode)
+ oappend (names32[modrm.reg + add]);
else
- oappend (names16[reg + add]);
+ oappend (names16[modrm.reg + add]);
used_prefixes |= (prefixes & PREFIX_DATA);
break;
+ case m_mode:
+ if (address_mode == mode_64bit)
+ oappend (names64[modrm.reg + add]);
+ else
+ oappend (names32[modrm.reg + add]);
+ break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
break;
}
static bfd_vma
-get64 ()
+get64 (void)
{
- unsigned int a = 0;
- unsigned int b = 0;
- bfd_vma x = 0;
-
+ bfd_vma x;
#ifdef BFD64
+ unsigned int a;
+ unsigned int b;
+
FETCH_DATA (the_info, codep + 8);
a = *codep++ & 0xff;
a |= (*codep++ & 0xff) << 8;
a |= (*codep++ & 0xff) << 16;
a |= (*codep++ & 0xff) << 24;
- b |= (*codep++ & 0xff);
+ b = *codep++ & 0xff;
b |= (*codep++ & 0xff) << 8;
b |= (*codep++ & 0xff) << 16;
b |= (*codep++ & 0xff) << 24;
x = a + ((bfd_vma) b << 32);
#else
- abort();
+ abort ();
+ x = 0;
#endif
return x;
}
static bfd_signed_vma
-get32 ()
+get32 (void)
{
bfd_signed_vma x = 0;
}
static bfd_signed_vma
-get32s ()
+get32s (void)
{
bfd_signed_vma x = 0;
}
static int
-get16 ()
+get16 (void)
{
int x = 0;
}
static void
-set_op (op, riprel)
- unsigned int op;
- int riprel;
+set_op (bfd_vma op, int riprel)
{
op_index[op_ad] = op_ad;
- op_address[op_ad] = op;
- op_riprel[op_ad] = riprel;
+ if (address_mode == mode_64bit)
+ {
+ op_address[op_ad] = op;
+ op_riprel[op_ad] = riprel;
+ }
+ else
+ {
+ /* Mask to get a 32-bit address. */
+ op_address[op_ad] = op & 0xffffffff;
+ op_riprel[op_ad] = riprel & 0xffffffff;
+ }
}
static void
-OP_REG (code, sizeflag)
- int code;
- int sizeflag;
+OP_REG (int code, int sizeflag)
{
const char *s;
- int add = 0;
- USED_REX (REX_EXTZ);
- if (rex & REX_EXTZ)
+ int add;
+ USED_REX (REX_B);
+ if (rex & REX_B)
add = 8;
+ else
+ add = 0;
switch (code)
{
- case indir_dx_reg:
- s = "(%dx)";
- break;
case ax_reg: case cx_reg: case dx_reg: case bx_reg:
case sp_reg: case bp_reg: case si_reg: case di_reg:
s = names16[code - ax_reg + add];
else
s = names8[code - al_reg];
break;
+ case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
+ case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
+ if (address_mode == mode_64bit && (sizeflag & DFLAG))
+ {
+ s = names64[code - rAX_reg + add];
+ break;
+ }
+ code += eAX_reg - rAX_reg;
+ /* Fall through. */
case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
s = names64[code - eAX_reg + add];
else if (sizeflag & DFLAG)
s = names32[code - eAX_reg + add];
s = names16[code - eAX_reg + add];
used_prefixes |= (prefixes & PREFIX_DATA);
break;
- case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
- case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
- s = names64[code - rAX_reg + add];
- break;
default:
s = INTERNAL_DISASSEMBLER_ERROR;
break;
}
static void
-OP_IMREG (code, sizeflag)
- int code;
- int sizeflag;
+OP_IMREG (int code, int sizeflag)
{
const char *s;
switch (code)
{
case indir_dx_reg:
- s = "(%dx)";
+ if (intel_syntax)
+ s = "dx";
+ else
+ s = "(%dx)";
break;
case ax_reg: case cx_reg: case dx_reg: case bx_reg:
case sp_reg: case bp_reg: case si_reg: case di_reg:
break;
case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
s = names64[code - eAX_reg];
else if (sizeflag & DFLAG)
s = names32[code - eAX_reg];
s = names16[code - eAX_reg];
used_prefixes |= (prefixes & PREFIX_DATA);
break;
+ case z_mode_ax_reg:
+ if ((rex & REX_W) || (sizeflag & DFLAG))
+ s = *names32;
+ else
+ s = *names16;
+ if (!(rex & REX_W))
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
default:
s = INTERNAL_DISASSEMBLER_ERROR;
break;
}
static void
-OP_I (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_I (int bytemode, int sizeflag)
{
bfd_signed_vma op;
bfd_signed_vma mask = -1;
mask = 0xff;
break;
case q_mode:
- op = get32s ();
- break;
+ if (address_mode == mode_64bit)
+ {
+ op = get32s ();
+ break;
+ }
+ /* Fall through. */
case v_mode:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
op = get32s ();
else if (sizeflag & DFLAG)
{
mask = 0xfffff;
op = get16 ();
break;
+ case const_1_mode:
+ if (intel_syntax)
+ oappend ("1");
+ return;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
return;
op &= mask;
scratchbuf[0] = '$';
- print_operand_value (scratchbuf + !intel_syntax, 1, op);
- oappend (scratchbuf);
+ print_operand_value (scratchbuf + 1, 1, op);
+ oappend (scratchbuf + intel_syntax);
scratchbuf[0] = '\0';
}
static void
-OP_I64 (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_I64 (int bytemode, int sizeflag)
{
bfd_signed_vma op;
bfd_signed_vma mask = -1;
+ if (address_mode != mode_64bit)
+ {
+ OP_I (bytemode, sizeflag);
+ return;
+ }
+
switch (bytemode)
{
case b_mode:
mask = 0xff;
break;
case v_mode:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
op = get64 ();
else if (sizeflag & DFLAG)
{
op &= mask;
scratchbuf[0] = '$';
- print_operand_value (scratchbuf + !intel_syntax, 1, op);
- oappend (scratchbuf);
+ print_operand_value (scratchbuf + 1, 1, op);
+ oappend (scratchbuf + intel_syntax);
scratchbuf[0] = '\0';
}
static void
-OP_sI (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_sI (int bytemode, int sizeflag)
{
bfd_signed_vma op;
bfd_signed_vma mask = -1;
mask = 0xffffffff;
break;
case v_mode:
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
+ USED_REX (REX_W);
+ if (rex & REX_W)
op = get32s ();
else if (sizeflag & DFLAG)
{
else
{
mask = 0xffffffff;
- op = get16();
+ op = get16 ();
if ((op & 0x8000) != 0)
op -= 0x10000;
}
scratchbuf[0] = '$';
print_operand_value (scratchbuf + 1, 1, op);
- oappend (scratchbuf);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_J (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_J (int bytemode, int sizeflag)
{
bfd_vma disp;
- int mask = -1;
+ bfd_vma mask = -1;
+ bfd_vma segment = 0;
switch (bytemode)
{
disp -= 0x100;
break;
case v_mode:
- if (sizeflag & DFLAG)
+ if ((sizeflag & DFLAG) || (rex & REX_W))
disp = get32s ();
else
{
disp = get16 ();
- /* for some reason, a data16 prefix on a jump instruction
- means that the pc is masked to 16 bits after the
- displacement is added! */
+ if ((disp & 0x8000) != 0)
+ disp -= 0x10000;
+ /* In 16bit mode, address is wrapped around at 64k within
+ the same segment. Otherwise, a data16 prefix on a jump
+ instruction means that the pc is masked to 16 bits after
+ the displacement is added! */
mask = 0xffff;
+ if ((prefixes & PREFIX_DATA) == 0)
+ segment = ((start_pc + codep - start_codep)
+ & ~((bfd_vma) 0xffff));
}
used_prefixes |= (prefixes & PREFIX_DATA);
break;
oappend (INTERNAL_DISASSEMBLER_ERROR);
return;
}
- disp = (start_pc + codep - start_codep + disp) & mask;
+ disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
set_op (disp, 0);
print_operand_value (scratchbuf, 1, disp);
oappend (scratchbuf);
}
-/* ARGSUSED */
static void
-OP_SEG (dummy, sizeflag)
- int dummy ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_SEG (int bytemode, int sizeflag)
{
- static char *sreg[] = {
- "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
- };
-
- oappend (sreg[reg]);
+ if (bytemode == w_mode)
+ oappend (names_seg[modrm.reg]);
+ else
+ OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
}
-/* ARGSUSED */
static void
-OP_DIR (dummy, sizeflag)
- int dummy ATTRIBUTE_UNUSED;
- int sizeflag;
+OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
{
int seg, offset;
seg = get16 ();
}
used_prefixes |= (prefixes & PREFIX_DATA);
- sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
+ if (intel_syntax)
+ sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
+ else
+ sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
oappend (scratchbuf);
}
-/* ARGSUSED */
static void
-OP_OFF (ignored, sizeflag)
- int ignored ATTRIBUTE_UNUSED;
- int sizeflag;
+OP_OFF (int bytemode, int sizeflag)
{
bfd_vma off;
+ if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ intel_operand_size (bytemode, sizeflag);
append_seg ();
- if (sizeflag & AFLAG)
+ if ((sizeflag & AFLAG) || address_mode == mode_64bit)
off = get32 ();
else
off = get16 ();
if (intel_syntax)
{
if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
- | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
+ | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
{
- oappend (names_seg[3]);
+ oappend (names_seg[ds_reg - es_reg]);
oappend (":");
}
}
print_operand_value (scratchbuf, 1, off);
oappend (scratchbuf);
}
-/* ARGSUSED */
+
static void
-OP_OFF64 (ignored, sizeflag)
- int ignored ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_OFF64 (int bytemode, int sizeflag)
{
bfd_vma off;
+ if (address_mode != mode_64bit
+ || (prefixes & PREFIX_ADDR))
+ {
+ OP_OFF (bytemode, sizeflag);
+ return;
+ }
+
+ if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+ intel_operand_size (bytemode, sizeflag);
append_seg ();
- off = get64();
+ off = get64 ();
if (intel_syntax)
{
if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
- | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
+ | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
{
- oappend (names_seg[3]);
+ oappend (names_seg[ds_reg - es_reg]);
oappend (":");
}
}
}
static void
-ptr_reg (code, sizeflag)
- int code;
- int sizeflag;
+ptr_reg (int code, int sizeflag)
{
const char *s;
- oappend ("(");
- USED_REX (REX_MODE64);
- if (rex & REX_MODE64)
- s = names64[code - eAX_reg];
+
+ *obufp++ = open_char;
+ used_prefixes |= (prefixes & PREFIX_ADDR);
+ if (address_mode == mode_64bit)
+ {
+ if (!(sizeflag & AFLAG))
+ s = names32[code - eAX_reg];
+ else
+ s = names64[code - eAX_reg];
+ }
else if (sizeflag & AFLAG)
s = names32[code - eAX_reg];
else
s = names16[code - eAX_reg];
oappend (s);
- oappend (")");
+ *obufp++ = close_char;
+ *obufp = 0;
}
static void
-OP_ESreg (code, sizeflag)
- int code;
- int sizeflag;
+OP_ESreg (int code, int sizeflag)
{
- oappend ("%es:");
+ if (intel_syntax)
+ {
+ switch (codep[-1])
+ {
+ case 0x6d: /* insw/insl */
+ intel_operand_size (z_mode, sizeflag);
+ break;
+ case 0xa5: /* movsw/movsl/movsq */
+ case 0xa7: /* cmpsw/cmpsl/cmpsq */
+ case 0xab: /* stosw/stosl */
+ case 0xaf: /* scasw/scasl */
+ intel_operand_size (v_mode, sizeflag);
+ break;
+ default:
+ intel_operand_size (b_mode, sizeflag);
+ }
+ }
+ oappend ("%es:" + intel_syntax);
ptr_reg (code, sizeflag);
}
static void
-OP_DSreg (code, sizeflag)
- int code;
- int sizeflag;
+OP_DSreg (int code, int sizeflag)
{
+ if (intel_syntax)
+ {
+ switch (codep[-1])
+ {
+ case 0x6f: /* outsw/outsl */
+ intel_operand_size (z_mode, sizeflag);
+ break;
+ case 0xa5: /* movsw/movsl/movsq */
+ case 0xa7: /* cmpsw/cmpsl/cmpsq */
+ case 0xad: /* lodsw/lodsl/lodsq */
+ intel_operand_size (v_mode, sizeflag);
+ break;
+ default:
+ intel_operand_size (b_mode, sizeflag);
+ }
+ }
if ((prefixes
& (PREFIX_CS
| PREFIX_DS
| PREFIX_FS
| PREFIX_GS)) == 0)
prefixes |= PREFIX_DS;
- append_seg();
+ append_seg ();
ptr_reg (code, sizeflag);
}
-/* ARGSUSED */
static void
-OP_C (dummy, sizeflag)
- int dummy ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- int add = 0;
- USED_REX (REX_EXTX);
- if (rex & REX_EXTX)
- add = 8;
- sprintf (scratchbuf, "%%cr%d", reg+add);
- oappend (scratchbuf);
+ int add;
+ if (rex & REX_R)
+ {
+ USED_REX (REX_R);
+ add = 8;
+ }
+ else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
+ {
+ lock_prefix = NULL;
+ used_prefixes |= PREFIX_LOCK;
+ add = 8;
+ }
+ else
+ add = 0;
+ sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
+ oappend (scratchbuf + intel_syntax);
}
-/* ARGSUSED */
static void
-OP_D (dummy, sizeflag)
- int dummy ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- int add = 0;
- USED_REX (REX_EXTX);
- if (rex & REX_EXTX)
+ int add;
+ USED_REX (REX_R);
+ if (rex & REX_R)
add = 8;
- sprintf (scratchbuf, "%%db%d", reg+add);
+ else
+ add = 0;
+ if (intel_syntax)
+ sprintf (scratchbuf, "db%d", modrm.reg + add);
+ else
+ sprintf (scratchbuf, "%%db%d", modrm.reg + add);
oappend (scratchbuf);
}
-/* ARGSUSED */
static void
-OP_T (dummy, sizeflag)
- int dummy ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- sprintf (scratchbuf, "%%tr%d", reg);
- oappend (scratchbuf);
+ sprintf (scratchbuf, "%%tr%d", modrm.reg);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_Rd (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_R (int bytemode, int sizeflag)
{
- if (mod == 3)
+ if (modrm.mod == 3)
OP_E (bytemode, sizeflag);
else
- BadOp();
+ BadOp ();
+}
+
+static void
+OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
+{
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ if (prefixes & PREFIX_DATA)
+ {
+ int add;
+ USED_REX (REX_R);
+ if (rex & REX_R)
+ add = 8;
+ else
+ add = 0;
+ sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
+ }
+ else
+ sprintf (scratchbuf, "%%mm%d", modrm.reg);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_MMX (ignore, sizeflag)
- int ignore ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- int add = 0;
- USED_REX (REX_EXTX);
- if (rex & REX_EXTX)
+ int add;
+ USED_REX (REX_R);
+ if (rex & REX_R)
add = 8;
- used_prefixes |= (prefixes & PREFIX_DATA);
- if (prefixes & PREFIX_DATA)
- sprintf (scratchbuf, "%%xmm%d", reg + add);
else
- sprintf (scratchbuf, "%%mm%d", reg + add);
- oappend (scratchbuf);
+ add = 0;
+ sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_XMM (bytemode, sizeflag)
- int bytemode ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_EM (int bytemode, int sizeflag)
{
- int add = 0;
- USED_REX (REX_EXTX);
- if (rex & REX_EXTX)
- add = 8;
- sprintf (scratchbuf, "%%xmm%d", reg + add);
- oappend (scratchbuf);
+ if (modrm.mod != 3)
+ {
+ if (intel_syntax && bytemode == v_mode)
+ {
+ bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
+ OP_E (bytemode, sizeflag);
+ return;
+ }
+
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ if (prefixes & PREFIX_DATA)
+ {
+ int add;
+
+ USED_REX (REX_B);
+ if (rex & REX_B)
+ add = 8;
+ else
+ add = 0;
+ sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
+ }
+ else
+ sprintf (scratchbuf, "%%mm%d", modrm.rm);
+ oappend (scratchbuf + intel_syntax);
}
+/* cvt* are the only instructions in sse2 which have
+ both SSE and MMX operands and also have 0x66 prefix
+ in their opcode. 0x66 was originally used to differentiate
+ between SSE and MMX instruction(operands). So we have to handle the
+ cvt* separately using OP_EMC and OP_MXC */
static void
-OP_EM (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_EMC (int bytemode, int sizeflag)
{
- int add = 0;
- if (mod != 3)
+ if (modrm.mod != 3)
{
+ if (intel_syntax && bytemode == v_mode)
+ {
+ bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ }
OP_E (bytemode, sizeflag);
return;
}
- USED_REX (REX_EXTZ);
- if (rex & REX_EXTZ)
- add = 8;
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
codep++;
used_prefixes |= (prefixes & PREFIX_DATA);
- if (prefixes & PREFIX_DATA)
- sprintf (scratchbuf, "%%xmm%d", rm + add);
- else
- sprintf (scratchbuf, "%%mm%d", rm + add);
- oappend (scratchbuf);
+ sprintf (scratchbuf, "%%mm%d", modrm.rm);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_EX (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
- int add = 0;
- if (mod != 3)
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ sprintf (scratchbuf, "%%mm%d", modrm.reg);
+ oappend (scratchbuf + intel_syntax);
+}
+
+static void
+OP_EX (int bytemode, int sizeflag)
+{
+ int add;
+ if (modrm.mod != 3)
{
OP_E (bytemode, sizeflag);
return;
}
- USED_REX (REX_EXTZ);
- if (rex & REX_EXTZ)
+ USED_REX (REX_B);
+ if (rex & REX_B)
add = 8;
+ else
+ add = 0;
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
codep++;
- sprintf (scratchbuf, "%%xmm%d", rm + add);
- oappend (scratchbuf);
+ sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
+ oappend (scratchbuf + intel_syntax);
}
static void
-OP_MS (bytemode, sizeflag)
- int bytemode;
- int sizeflag;
+OP_MS (int bytemode, int sizeflag)
{
- if (mod == 3)
+ if (modrm.mod == 3)
OP_EM (bytemode, sizeflag);
else
- BadOp();
+ BadOp ();
+}
+
+static void
+OP_XS (int bytemode, int sizeflag)
+{
+ if (modrm.mod == 3)
+ OP_EX (bytemode, sizeflag);
+ else
+ BadOp ();
+}
+
+static void
+OP_M (int bytemode, int sizeflag)
+{
+ if (modrm.mod == 3)
+ /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
+ BadOp ();
+ else
+ OP_E (bytemode, sizeflag);
+}
+
+static void
+OP_0f07 (int bytemode, int sizeflag)
+{
+ if (modrm.mod != 3 || modrm.rm != 0)
+ BadOp ();
+ else
+ OP_E (bytemode, sizeflag);
+}
+
+/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
+ 32bit mode and "xchg %rax,%rax" in 64bit mode. */
+
+static void
+NOP_Fixup1 (int bytemode, int sizeflag)
+{
+ if ((prefixes & PREFIX_DATA) != 0
+ || (rex != 0
+ && rex != 0x48
+ && address_mode == mode_64bit))
+ OP_REG (bytemode, sizeflag);
+ else
+ strcpy (obuf, "nop");
+}
+
+static void
+NOP_Fixup2 (int bytemode, int sizeflag)
+{
+ if ((prefixes & PREFIX_DATA) != 0
+ || (rex != 0
+ && rex != 0x48
+ && address_mode == mode_64bit))
+ OP_IMREG (bytemode, sizeflag);
}
-static const char *Suffix3DNow[] = {
+static const char *const Suffix3DNow[] = {
/* 00 */ NULL, NULL, NULL, NULL,
/* 04 */ NULL, NULL, NULL, NULL,
/* 08 */ NULL, NULL, NULL, NULL,
/* A8 */ NULL, NULL, "pfsubr", NULL,
/* AC */ NULL, NULL, "pfacc", NULL,
/* B0 */ "pfcmpeq", NULL, NULL, NULL,
-/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
+/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
/* B8 */ NULL, NULL, NULL, "pswapd",
/* BC */ NULL, NULL, NULL, "pavgusb",
/* C0 */ NULL, NULL, NULL, NULL,
};
static void
-OP_3DNowSuffix (bytemode, sizeflag)
- int bytemode ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
const char *mnemonic;
/* AMD 3DNow! instructions are specified by an opcode suffix in the
place where an 8-bit immediate would normally go. ie. the last
byte of the instruction. */
- obufp = obuf + strlen(obuf);
+ obufp = obuf + strlen (obuf);
mnemonic = Suffix3DNow[*codep++ & 0xff];
if (mnemonic)
oappend (mnemonic);
of the opcode (0x0f0f) and the opcode suffix, we need to do
all the modrm processing first, and don't know until now that
we have a bad opcode. This necessitates some cleaning up. */
- op1out[0] = '\0';
- op2out[0] = '\0';
- BadOp();
+ op_out[0][0] = '\0';
+ op_out[1][0] = '\0';
+ BadOp ();
}
}
-
-static const char *simd_cmp_op [] = {
+static const char *simd_cmp_op[] = {
"eq",
"lt",
"le",
};
static void
-OP_SIMD_Suffix (bytemode, sizeflag)
- int bytemode ATTRIBUTE_UNUSED;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
unsigned int cmp_type;
FETCH_DATA (the_info, codep + 1);
- obufp = obuf + strlen(obuf);
+ obufp = obuf + strlen (obuf);
cmp_type = *codep++ & 0xff;
if (cmp_type < 8)
{
else
{
/* We have a bad extension byte. Clean up. */
- op1out[0] = '\0';
- op2out[0] = '\0';
- BadOp();
+ op_out[0][0] = '\0';
+ op_out[1][0] = '\0';
+ BadOp ();
+ }
+}
+
+static void
+OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
+{
+ /* mwait %eax,%ecx */
+ if (!intel_syntax)
+ {
+ const char **names = (address_mode == mode_64bit
+ ? names64 : names32);
+ strcpy (op_out[0], names[0]);
+ strcpy (op_out[1], names[1]);
+ two_source_ops = 1;
}
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
}
static void
-SIMD_Fixup (extrachar, sizeflag)
- int extrachar;
- int sizeflag ATTRIBUTE_UNUSED;
+OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
{
- /* Change movlps/movhps to movhlps/movlhps for 2 register operand
- forms of these instructions. */
- if (mod == 3)
+ /* monitor %eax,%ecx,%edx" */
+ if (!intel_syntax)
{
- char *p = obuf + strlen(obuf);
- *(p+1) = '\0';
- *p = *(p-1);
- *(p-1) = *(p-2);
- *(p-2) = *(p-3);
- *(p-3) = extrachar;
+ const char **op1_names;
+ const char **names = (address_mode == mode_64bit
+ ? names64 : names32);
+
+ if (!(prefixes & PREFIX_ADDR))
+ op1_names = (address_mode == mode_16bit
+ ? names16 : names);
+ else
+ {
+ /* Remove "addr16/addr32". */
+ addr_prefix = NULL;
+ op1_names = (address_mode != mode_32bit
+ ? names32 : names16);
+ used_prefixes |= PREFIX_ADDR;
+ }
+ strcpy (op_out[0], op1_names[0]);
+ strcpy (op_out[1], names[1]);
+ strcpy (op_out[2], names[2]);
+ two_source_ops = 1;
}
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
}
-static void BadOp (void)
+static void
+BadOp (void)
{
- codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
+ /* Throw away prefixes and 1st. opcode byte. */
+ codep = insn_codep + 1;
oappend ("(bad)");
}
+
+static void
+REP_Fixup (int bytemode, int sizeflag)
+{
+ /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
+ lods and stos. */
+ if (prefixes & PREFIX_REPZ)
+ repz_prefix = "rep ";
+
+ switch (bytemode)
+ {
+ case al_reg:
+ case eAX_reg:
+ case indir_dx_reg:
+ OP_IMREG (bytemode, sizeflag);
+ break;
+ case eDI_reg:
+ OP_ESreg (bytemode, sizeflag);
+ break;
+ case eSI_reg:
+ OP_DSreg (bytemode, sizeflag);
+ break;
+ default:
+ abort ();
+ break;
+ }
+}
+
+static void
+CMPXCHG8B_Fixup (int bytemode, int sizeflag)
+{
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ {
+ /* Change cmpxchg8b to cmpxchg16b. */
+ char *p = obuf + strlen (obuf) - 2;
+ strcpy (p, "16b");
+ bytemode = o_mode;
+ }
+ OP_M (bytemode, sizeflag);
+}
+
+static void
+XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
+{
+ sprintf (scratchbuf, "%%xmm%d", reg);
+ oappend (scratchbuf + intel_syntax);
+}
+
+static void
+CRC32_Fixup (int bytemode, int sizeflag)
+{
+ /* Add proper suffix to "crc32". */
+ char *p = obuf + strlen (obuf);
+
+ switch (bytemode)
+ {
+ case b_mode:
+ if (intel_syntax)
+ break;
+
+ *p++ = 'b';
+ break;
+ case v_mode:
+ if (intel_syntax)
+ break;
+
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ *p++ = 'q';
+ else if (sizeflag & DFLAG)
+ *p++ = 'l';
+ else
+ *p++ = 'w';
+ used_prefixes |= (prefixes & PREFIX_DATA);
+ break;
+ default:
+ oappend (INTERNAL_DISASSEMBLER_ERROR);
+ break;
+ }
+ *p = '\0';
+
+ if (modrm.mod == 3)
+ {
+ int add;
+
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
+
+ USED_REX (REX_B);
+ add = (rex & REX_B) ? 8 : 0;
+ if (bytemode == b_mode)
+ {
+ USED_REX (0);
+ if (rex)
+ oappend (names8rex[modrm.rm + add]);
+ else
+ oappend (names8[modrm.rm + add]);
+ }
+ else
+ {
+ USED_REX (REX_W);
+ if (rex & REX_W)
+ oappend (names64[modrm.rm + add]);
+ else if ((prefixes & PREFIX_DATA))
+ oappend (names16[modrm.rm + add]);
+ else
+ oappend (names32[modrm.rm + add]);
+ }
+ }
+ else
+ OP_E (bytemode, sizeflag);
+}
+
+/* Print a DREX argument as either a register or memory operation. */
+static void
+print_drex_arg (unsigned int reg, int bytemode, int sizeflag)
+{
+ if (reg == DREX_REG_UNKNOWN)
+ BadOp ();
+
+ else if (reg != DREX_REG_MEMORY)
+ {
+ sprintf (scratchbuf, "%%xmm%d", reg);
+ oappend (scratchbuf + intel_syntax);
+ }
+
+ else
+ OP_E_extended (bytemode, sizeflag, 1);
+}
+
+/* SSE5 instructions that have 4 arguments are encoded as:
+ 0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>.
+
+ The <sub-opcode> byte has 1 bit (0x4) that is combined with 1 bit in
+ the DREX field (0x8) to determine how the arguments are laid out.
+ The destination register must be the same register as one of the
+ inputs, and it is encoded in the DREX byte. No REX prefix is used
+ for these instructions, since the DREX field contains the 3 extension
+ bits provided by the REX prefix.
+
+ The bytemode argument adds 2 extra bits for passing extra information:
+ DREX_OC1 -- Set the OC1 bit to indicate dest == 1st arg
+ DREX_NO_OC0 -- OC0 in DREX is invalid
+ (but pretend it is set). */
+
+static void
+OP_DREX4 (int flag_bytemode, int sizeflag)
+{
+ unsigned int drex_byte;
+ unsigned int regs[4];
+ unsigned int modrm_regmem;
+ unsigned int modrm_reg;
+ unsigned int drex_reg;
+ int bytemode;
+ int rex_save = rex;
+ int rex_used_save = rex_used;
+ int has_sib = 0;
+ int oc1 = (flag_bytemode & DREX_OC1) ? 2 : 0;
+ int oc0;
+ int i;
+
+ bytemode = flag_bytemode & ~ DREX_MASK;
+
+ for (i = 0; i < 4; i++)
+ regs[i] = DREX_REG_UNKNOWN;
+
+ /* Determine if we have a SIB byte in addition to MODRM before the
+ DREX byte. */
+ if (((sizeflag & AFLAG) || address_mode == mode_64bit)
+ && (modrm.mod != 3)
+ && (modrm.rm == 4))
+ has_sib = 1;
+
+ /* Get the DREX byte. */
+ FETCH_DATA (the_info, codep + 2 + has_sib);
+ drex_byte = codep[has_sib+1];
+ drex_reg = DREX_XMM (drex_byte);
+ modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
+
+ /* Is OC0 legal? If not, hardwire oc0 == 1. */
+ if (flag_bytemode & DREX_NO_OC0)
+ {
+ oc0 = 1;
+ if (DREX_OC0 (drex_byte))
+ BadOp ();
+ }
+ else
+ oc0 = DREX_OC0 (drex_byte);
+
+ if (modrm.mod == 3)
+ {
+ /* regmem == register */
+ modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
+ rex = rex_used = 0;
+ /* skip modrm/drex since we don't call OP_E_extended */
+ codep += 2;
+ }
+ else
+ {
+ /* regmem == memory, fill in appropriate REX bits */
+ modrm_regmem = DREX_REG_MEMORY;
+ rex = drex_byte & (REX_B | REX_X | REX_R);
+ if (rex)
+ rex |= REX_OPCODE;
+ rex_used = rex;
+ }
+
+ /* Based on the OC1/OC0 bits, lay out the arguments in the correct
+ order. */
+ switch (oc0 + oc1)
+ {
+ default:
+ BadOp ();
+ return;
+
+ case 0:
+ regs[0] = modrm_regmem;
+ regs[1] = modrm_reg;
+ regs[2] = drex_reg;
+ regs[3] = drex_reg;
+ break;
+
+ case 1:
+ regs[0] = modrm_reg;
+ regs[1] = modrm_regmem;
+ regs[2] = drex_reg;
+ regs[3] = drex_reg;
+ break;
+
+ case 2:
+ regs[0] = drex_reg;
+ regs[1] = modrm_regmem;
+ regs[2] = modrm_reg;
+ regs[3] = drex_reg;
+ break;
+
+ case 3:
+ regs[0] = drex_reg;
+ regs[1] = modrm_reg;
+ regs[2] = modrm_regmem;
+ regs[3] = drex_reg;
+ break;
+ }
+
+ /* Print out the arguments. */
+ for (i = 0; i < 4; i++)
+ {
+ int j = (intel_syntax) ? 3 - i : i;
+ if (i > 0)
+ {
+ *obufp++ = ',';
+ *obufp = '\0';
+ }
+
+ print_drex_arg (regs[j], bytemode, sizeflag);
+ }
+
+ rex = rex_save;
+ rex_used = rex_used_save;
+}
+
+/* SSE5 instructions that have 3 arguments, and are encoded as:
+ 0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset> (or)
+ 0f 25 <sub-opcode> <modrm> <optional-sib> <drex> <offset> <cmp-byte>
+
+ The DREX field has 1 bit (0x8) to determine how the arguments are
+ laid out. The destination register is encoded in the DREX byte.
+ No REX prefix is used for these instructions, since the DREX field
+ contains the 3 extension bits provided by the REX prefix. */
+
+static void
+OP_DREX3 (int flag_bytemode, int sizeflag)
+{
+ unsigned int drex_byte;
+ unsigned int regs[3];
+ unsigned int modrm_regmem;
+ unsigned int modrm_reg;
+ unsigned int drex_reg;
+ int bytemode;
+ int rex_save = rex;
+ int rex_used_save = rex_used;
+ int has_sib = 0;
+ int oc0;
+ int i;
+
+ bytemode = flag_bytemode & ~ DREX_MASK;
+
+ for (i = 0; i < 3; i++)
+ regs[i] = DREX_REG_UNKNOWN;
+
+ /* Determine if we have a SIB byte in addition to MODRM before the
+ DREX byte. */
+ if (((sizeflag & AFLAG) || address_mode == mode_64bit)
+ && (modrm.mod != 3)
+ && (modrm.rm == 4))
+ has_sib = 1;
+
+ /* Get the DREX byte. */
+ FETCH_DATA (the_info, codep + 2 + has_sib);
+ drex_byte = codep[has_sib+1];
+ drex_reg = DREX_XMM (drex_byte);
+ modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
+
+ /* Is OC0 legal? If not, hardwire oc0 == 0 */
+ oc0 = DREX_OC0 (drex_byte);
+ if ((flag_bytemode & DREX_NO_OC0) && oc0)
+ BadOp ();
+
+ if (modrm.mod == 3)
+ {
+ /* regmem == register */
+ modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
+ rex = rex_used = 0;
+ /* skip modrm/drex since we don't call OP_E_extended. */
+ codep += 2;
+ }
+ else
+ {
+ /* regmem == memory, fill in appropriate REX bits. */
+ modrm_regmem = DREX_REG_MEMORY;
+ rex = drex_byte & (REX_B | REX_X | REX_R);
+ if (rex)
+ rex |= REX_OPCODE;
+ rex_used = rex;
+ }
+
+ /* Based on the OC1/OC0 bits, lay out the arguments in the correct
+ order. */
+ switch (oc0)
+ {
+ default:
+ BadOp ();
+ return;
+
+ case 0:
+ regs[0] = modrm_regmem;
+ regs[1] = modrm_reg;
+ regs[2] = drex_reg;
+ break;
+
+ case 1:
+ regs[0] = modrm_reg;
+ regs[1] = modrm_regmem;
+ regs[2] = drex_reg;
+ break;
+ }
+
+ /* Print out the arguments. */
+ for (i = 0; i < 3; i++)
+ {
+ int j = (intel_syntax) ? 2 - i : i;
+ if (i > 0)
+ {
+ *obufp++ = ',';
+ *obufp = '\0';
+ }
+
+ print_drex_arg (regs[j], bytemode, sizeflag);
+ }
+
+ rex = rex_save;
+ rex_used = rex_used_save;
+}
+
+/* Emit a floating point comparison for comp<xx> instructions. */
+
+static void
+OP_DREX_FCMP (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
+{
+ unsigned char byte;
+
+ static const char *const cmp_test[] = {
+ "eq",
+ "lt",
+ "le",
+ "unord",
+ "ne",
+ "nlt",
+ "nle",
+ "ord",
+ "ueq",
+ "ult",
+ "ule",
+ "false",
+ "une",
+ "unlt",
+ "unle",
+ "true"
+ };
+
+ FETCH_DATA (the_info, codep + 1);
+ byte = *codep & 0xff;
+
+ if (byte >= ARRAY_SIZE (cmp_test)
+ || obuf[0] != 'c'
+ || obuf[1] != 'o'
+ || obuf[2] != 'm')
+ {
+ /* The instruction isn't one we know about, so just append the
+ extension byte as a numeric value. */
+ OP_I (b_mode, 0);
+ }
+
+ else
+ {
+ sprintf (scratchbuf, "com%s%s", cmp_test[byte], obuf+3);
+ strcpy (obuf, scratchbuf);
+ codep++;
+ }
+}
+
+/* Emit an integer point comparison for pcom<xx> instructions,
+ rewriting the instruction to have the test inside of it. */
+
+static void
+OP_DREX_ICMP (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
+{
+ unsigned char byte;
+
+ static const char *const cmp_test[] = {
+ "lt",
+ "le",
+ "gt",
+ "ge",
+ "eq",
+ "ne",
+ "false",
+ "true"
+ };
+
+ FETCH_DATA (the_info, codep + 1);
+ byte = *codep & 0xff;
+
+ if (byte >= ARRAY_SIZE (cmp_test)
+ || obuf[0] != 'p'
+ || obuf[1] != 'c'
+ || obuf[2] != 'o'
+ || obuf[3] != 'm')
+ {
+ /* The instruction isn't one we know about, so just print the
+ comparison test byte as a numeric value. */
+ OP_I (b_mode, 0);
+ }
+
+ else
+ {
+ sprintf (scratchbuf, "pcom%s%s", cmp_test[byte], obuf+4);
+ strcpy (obuf, scratchbuf);
+ codep++;
+ }
+}
projects / deliverable / binutils-gdb.git / blobdiff