static void OP_XS (int, int);
static void OP_M (int, int);
static void OP_VEX (int, int);
+static void OP_VexR (int, int);
static void OP_VexW (int, int);
-static void OP_EX_Vex (int, int);
-static void OP_XMM_Vex (int, int);
static void OP_Rounding (int, int);
static void OP_REG_VexI4 (int, int);
static void OP_VexI4 (int, int);
static void PCLMUL_Fixup (int, int);
-static void VCMP_Fixup (int, int);
static void VPCMP_Fixup (int, int);
static void VPCOM_Fixup (int, int);
static void OP_0f07 (int, int);
static void HLE_Fixup3 (int, int);
static void CMPXCHG8B_Fixup (int, int);
static void XMM_Fixup (int, int);
-static void CRC32_Fixup (int, int);
static void FXSAVE_Fixup (int, int);
-static void PCMPESTR_Fixup (int, int);
-static void MOVBE_Fixup (int, int);
static void MOVSXD_Fixup (int, int);
static void OP_Mask (int, int);
#define Mo { OP_M, o_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
#define Mq { OP_M, q_mode }
+#define Mv { OP_M, v_mode }
#define Mv_bnd { OP_M, v_bndmk_mode }
#define Mx { OP_M, x_mode }
#define Mxmm { OP_M, xmm_mode }
#define EMS { OP_EM, v_swap_mode }
#define EMd { OP_EM, d_mode }
#define EMx { OP_EM, x_mode }
-#define EXbScalar { OP_EX, b_scalar_mode }
+#define EXbwUnit { OP_EX, bw_unit_mode }
#define EXw { OP_EX, w_mode }
-#define EXwScalar { OP_EX, w_scalar_mode }
#define EXd { OP_EX, d_mode }
#define EXdS { OP_EX, d_swap_mode }
#define EXq { OP_EX, q_mode }
#define Vex { OP_VEX, vex_mode }
#define VexW { OP_VexW, vex_mode }
#define VexScalar { OP_VEX, vex_scalar_mode }
+#define VexScalarR { OP_VexR, vex_scalar_mode }
#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
-#define Vex128 { OP_VEX, vex128_mode }
-#define Vex256 { OP_VEX, vex256_mode }
#define VexGdq { OP_VEX, dq_mode }
#define VexTmm { OP_VEX, tmm_mode }
-#define EXdVexScalarS { OP_EX_Vex, d_scalar_swap_mode }
-#define EXqVexScalarS { OP_EX_Vex, q_scalar_swap_mode }
-#define XMVexScalar { OP_XMM_Vex, scalar_mode }
#define XMVexI4 { OP_REG_VexI4, x_mode }
#define XMVexScalarI4 { OP_REG_VexI4, scalar_mode }
#define VexI4 { OP_VexI4, 0 }
#define PCLMUL { PCLMUL_Fixup, 0 }
-#define VCMP { VCMP_Fixup, 0 }
#define VPCMP { VPCMP_Fixup, 0 }
#define VPCOM { VPCOM_Fixup, 0 }
x_mode,
/* Similar to x_mode, but with different EVEX mem shifts. */
evex_x_gscat_mode,
+ /* Similar to x_mode, but with yet different EVEX mem shifts. */
+ bw_unit_mode,
/* Similar to x_mode, but with disabled broadcast. */
evex_x_nobcst_mode,
/* Similar to x_mode, but with operands swapped and disabled broadcast
dqd_mode,
/* normal vex mode */
vex_mode,
- /* 128bit vex mode */
- vex128_mode,
- /* 256bit vex mode */
- vex256_mode,
/* Operand size depends on the VEX.W bit, with VSIB dword indices. */
vex_vsib_d_w_dq_mode,
/* scalar, ignore vector length. */
scalar_mode,
- /* like b_mode, ignore vector length. */
- b_scalar_mode,
- /* like w_mode, ignore vector length. */
- w_scalar_mode,
- /* like d_swap_mode, ignore vector length. */
- d_scalar_swap_mode,
- /* like q_swap_mode, ignore vector length. */
- q_scalar_swap_mode,
/* like vex_mode, ignore vector length. */
vex_scalar_mode,
/* Operand size depends on the VEX.W bit, ignore vector length. */
VEX_W_0F3816_P_2,
VEX_W_0F3818_P_2,
VEX_W_0F3819_P_2,
- VEX_W_0F381A_P_2_M_0,
+ VEX_W_0F381A_P_2_M_0_L_0,
VEX_W_0F382C_P_2_M_0,
VEX_W_0F382D_P_2_M_0,
VEX_W_0F382E_P_2_M_0,
VEX_W_0F384B_X86_64_P_3,
VEX_W_0F3858_P_2,
VEX_W_0F3859_P_2,
- VEX_W_0F385A_P_2_M_0,
+ VEX_W_0F385A_P_2_M_0_L_0,
VEX_W_0F385C_X86_64_P_1,
VEX_W_0F385E_X86_64_P_0,
VEX_W_0F385E_X86_64_P_1,
VEX_W_0F3A02_P_2,
VEX_W_0F3A04_P_2,
VEX_W_0F3A05_P_2,
- VEX_W_0F3A06_P_2,
- VEX_W_0F3A18_P_2,
- VEX_W_0F3A19_P_2,
+ VEX_W_0F3A06_P_2_L_0,
+ VEX_W_0F3A18_P_2_L_0,
+ VEX_W_0F3A19_P_2_L_0,
VEX_W_0F3A1D_P_2,
VEX_W_0F3A30_P_2_LEN_0,
VEX_W_0F3A31_P_2_LEN_0,
VEX_W_0F3A32_P_2_LEN_0,
VEX_W_0F3A33_P_2_LEN_0,
- VEX_W_0F3A38_P_2,
- VEX_W_0F3A39_P_2,
- VEX_W_0F3A46_P_2,
+ VEX_W_0F3A38_P_2_L_0,
+ VEX_W_0F3A39_P_2_L_0,
+ VEX_W_0F3A46_P_2_L_0,
VEX_W_0F3A4A_P_2,
VEX_W_0F3A4B_P_2,
VEX_W_0F3A4C_P_2,
EVEX_W_0F3859_P_2,
EVEX_W_0F385A_P_2,
EVEX_W_0F385B_P_2,
- EVEX_W_0F3862_P_2,
- EVEX_W_0F3863_P_2,
EVEX_W_0F3870_P_2,
EVEX_W_0F3872_P_1,
EVEX_W_0F3872_P_2,
"XZ" => print 'x', 'y', or 'z' if suffix_always is true or no
register operands and no broadcast.
"XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
- "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory
- operand or no operand at all in 64bit mode, or if suffix_always
+ "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand, cond
+ being false, or no operand at all in 64bit mode, or if suffix_always
is true.
"LB" => print "abs" in 64bit mode and behave as 'B' otherwise
"LS" => print "abs" in 64bit mode and behave as 'S' otherwise
"LV" => print "abs" for 64bit operand and behave as 'S' otherwise
- "LW" => print 'd', 'q' depending on the VEX.W bit
+ "DQ" => print 'd' or 'q' depending on the VEX.W bit
"BW" => print 'b' or 'w' depending on the EVEX.W bit
"LP" => print 'w' or 'l' ('d' in Intel mode) if instruction has
an operand size prefix, or suffix_always is true. print
}
vex;
static unsigned char need_vex;
-static unsigned char need_vex_reg;
struct op
{
/* PREFIX_0F2A */
{
{ "cvtpi2ps", { XM, EMCq }, PREFIX_OPCODE },
- { "cvtsi2ss%LQ", { XM, Edq }, PREFIX_OPCODE },
+ { "cvtsi2ss{%LQ|}", { XM, Edq }, PREFIX_OPCODE },
{ "cvtpi2pd", { XM, EMCq }, PREFIX_OPCODE },
- { "cvtsi2sd%LQ", { XM, Edq }, 0 },
+ { "cvtsi2sd{%LQ|}", { XM, Edq }, 0 },
},
/* PREFIX_0F2B */
/* PREFIX_0FAE_REG_4_MOD_0 */
{
{ "xsave", { FXSAVE }, 0 },
- { "ptwrite%LQ", { Edq }, 0 },
+ { "ptwrite{%LQ|}", { Edq }, 0 },
},
/* PREFIX_0FAE_REG_4_MOD_3 */
{
{ Bad_Opcode },
- { "ptwrite%LQ", { Edq }, 0 },
+ { "ptwrite{%LQ|}", { Edq }, 0 },
},
/* PREFIX_0FAE_REG_5_MOD_0 */
/* PREFIX_0F38F0 */
{
- { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
+ { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "movbeS", { Gv, { MOVBE_Fixup, v_mode } }, PREFIX_OPCODE },
- { "crc32", { Gdq, { CRC32_Fixup, b_mode } }, PREFIX_OPCODE },
+ { "movbeS", { Gv, Mv }, PREFIX_OPCODE },
+ { "crc32A", { Gdq, Eb }, PREFIX_OPCODE },
},
/* PREFIX_0F38F1 */
{
- { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
+ { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
{ Bad_Opcode },
- { "movbeS", { { MOVBE_Fixup, v_mode }, Gv }, PREFIX_OPCODE },
- { "crc32", { Gdq, { CRC32_Fixup, v_mode } }, PREFIX_OPCODE },
+ { "movbeS", { Mv, Gv }, PREFIX_OPCODE },
+ { "crc32Q", { Gdq, Ev }, PREFIX_OPCODE },
},
/* PREFIX_0F38F5 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+ { "pcmpestrm!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
},
/* PREFIX_0F3A61 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "pcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, PREFIX_OPCODE },
+ { "pcmpestri!%LQ", { XM, EXx, Ib }, PREFIX_OPCODE },
},
/* PREFIX_0F3A62 */
/* PREFIX_VEX_0F10 */
{
{ "vmovups", { XM, EXx }, 0 },
- { "vmovss", { XMVexScalar, VexScalar, EXxmm_md }, 0 },
+ { "vmovss", { XMScalar, VexScalarR, EXxmm_md }, 0 },
{ "vmovupd", { XM, EXx }, 0 },
- { "vmovsd", { XMVexScalar, VexScalar, EXxmm_mq }, 0 },
+ { "vmovsd", { XMScalar, VexScalarR, EXxmm_mq }, 0 },
},
/* PREFIX_VEX_0F11 */
{
{ "vmovups", { EXxS, XM }, 0 },
- { "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 },
+ { "vmovss", { EXdS, VexScalarR, XMScalar }, 0 },
{ "vmovupd", { EXxS, XM }, 0 },
- { "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 },
+ { "vmovsd", { EXqS, VexScalarR, XMScalar }, 0 },
},
/* PREFIX_VEX_0F12 */
/* PREFIX_VEX_0F2A */
{
{ Bad_Opcode },
- { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 },
+ { "vcvtsi2ss{%LQ|}", { XMScalar, VexScalar, Edq }, 0 },
{ Bad_Opcode },
- { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 },
+ { "vcvtsi2sd{%LQ|}", { XMScalar, VexScalar, Edq }, 0 },
},
/* PREFIX_VEX_0F2C */
/* PREFIX_VEX_0FC2 */
{
- { "vcmpps", { XM, Vex, EXx, VCMP }, 0 },
- { "vcmpss", { XMScalar, VexScalar, EXxmm_md, VCMP }, 0 },
- { "vcmppd", { XM, Vex, EXx, VCMP }, 0 },
- { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, VCMP }, 0 },
+ { "vcmpps", { XM, Vex, EXx, CMP }, 0 },
+ { "vcmpss", { XMScalar, VexScalar, EXxmm_md, CMP }, 0 },
+ { "vcmppd", { XM, Vex, EXx, CMP }, 0 },
+ { "vcmpsd", { XMScalar, VexScalar, EXxmm_mq, CMP }, 0 },
},
/* PREFIX_VEX_0FC4 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpsrlv%LW", { XM, Vex, EXx }, 0 },
+ { "vpsrlv%DQ", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F3846 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpsllv%LW", { XM, Vex, EXx }, 0 },
+ { "vpsllv%DQ", { XM, Vex, EXx }, 0 },
},
/* PREFIX_VEX_0F3849_X86_64 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpgatherd%LW", { XM, MVexVSIBDWpX, Vex }, 0 },
+ { "vpgatherd%DQ", { XM, MVexVSIBDWpX, Vex }, 0 },
},
/* PREFIX_VEX_0F3891 */
{
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpgatherq%LW", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
+ { "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX, VexGatherQ }, 0 },
},
/* PREFIX_VEX_0F3892 */
static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F12_P_0_M_0 / VEX_LEN_0F12_P_2_M_0 */
{
- { "vmovlpX", { XM, Vex128, EXq }, 0 },
+ { "vmovlpX", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F12_P_0_M_1 */
{
- { "vmovhlps", { XM, Vex128, EXq }, 0 },
+ { "vmovhlps", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F13_M_0 */
/* VEX_LEN_0F16_P_0_M_0 / VEX_LEN_0F16_P_2_M_0 */
{
- { "vmovhpX", { XM, Vex128, EXq }, 0 },
+ { "vmovhpX", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F16_P_0_M_1 */
{
- { "vmovlhps", { XM, Vex128, EXq }, 0 },
+ { "vmovlhps", { XM, Vex, EXq }, 0 },
},
/* VEX_LEN_0F17_M_0 */
/* VEX_LEN_0FC4_P_2 */
{
- { "vpinsrw", { XM, Vex128, Edqw, Ib }, 0 },
+ { "vpinsrw", { XM, Vex, Edqw, Ib }, 0 },
},
/* VEX_LEN_0FC5_P_2 */
/* VEX_LEN_0FD6_P_2 */
{
- { "vmovq", { EXqVexScalarS, XMScalar }, 0 },
+ { "vmovq", { EXqS, XMScalar }, 0 },
},
/* VEX_LEN_0FF7_P_2 */
/* VEX_LEN_0F381A_P_2_M_0 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0) },
+ { VEX_W_TABLE (VEX_W_0F381A_P_2_M_0_L_0) },
},
/* VEX_LEN_0F3836_P_2 */
/* VEX_LEN_0F385A_P_2_M_0 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0) },
+ { VEX_W_TABLE (VEX_W_0F385A_P_2_M_0_L_0) },
},
/* VEX_LEN_0F385C_X86_64_P_1_W_0_M_0 */
/* VEX_LEN_0F3A06_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A06_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A06_P_2_L_0) },
},
/* VEX_LEN_0F3A14_P_2 */
/* VEX_LEN_0F3A18_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A18_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A18_P_2_L_0) },
},
/* VEX_LEN_0F3A19_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A19_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A19_P_2_L_0) },
},
/* VEX_LEN_0F3A20_P_2 */
{
- { "vpinsrb", { XM, Vex128, Edqb, Ib }, 0 },
+ { "vpinsrb", { XM, Vex, Edqb, Ib }, 0 },
},
/* VEX_LEN_0F3A21_P_2 */
{
- { "vinsertps", { XM, Vex128, EXd, Ib }, 0 },
+ { "vinsertps", { XM, Vex, EXd, Ib }, 0 },
},
/* VEX_LEN_0F3A22_P_2 */
{
- { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 },
+ { "vpinsrK", { XM, Vex, Edq, Ib }, 0 },
},
/* VEX_LEN_0F3A30_P_2 */
/* VEX_LEN_0F3A38_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A38_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A38_P_2_L_0) },
},
/* VEX_LEN_0F3A39_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A39_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A39_P_2_L_0) },
},
/* VEX_LEN_0F3A41_P_2 */
{
- { "vdppd", { XM, Vex128, EXx, Ib }, 0 },
+ { "vdppd", { XM, Vex, EXx, Ib }, 0 },
},
/* VEX_LEN_0F3A46_P_2 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3A46_P_2) },
+ { VEX_W_TABLE (VEX_W_0F3A46_P_2_L_0) },
},
/* VEX_LEN_0F3A60_P_2 */
{
- { "vpcmpestrm", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+ { "vpcmpestrm!%LQ", { XM, EXx, Ib }, 0 },
},
/* VEX_LEN_0F3A61_P_2 */
{
- { "vpcmpestri", { XM, { PCMPESTR_Fixup, x_mode }, Ib }, 0 },
+ { "vpcmpestri!%LQ", { XM, EXx, Ib }, 0 },
},
/* VEX_LEN_0F3A62_P_2 */
{ "vbroadcastsd", { XM, EXxmm_mq }, 0 },
},
{
- /* VEX_W_0F381A_P_2_M_0 */
+ /* VEX_W_0F381A_P_2_M_0_L_0 */
{ "vbroadcastf128", { XM, Mxmm }, 0 },
},
{
{ "vpbroadcastq", { XM, EXxmm_mq }, 0 },
},
{
- /* VEX_W_0F385A_P_2_M_0 */
+ /* VEX_W_0F385A_P_2_M_0_L_0 */
{ "vbroadcasti128", { XM, Mxmm }, 0 },
},
{
{ "vpermilpd", { XM, EXx, Ib }, 0 },
},
{
- /* VEX_W_0F3A06_P_2 */
- { "vperm2f128", { XM, Vex256, EXx, Ib }, 0 },
+ /* VEX_W_0F3A06_P_2_L_0 */
+ { "vperm2f128", { XM, Vex, EXx, Ib }, 0 },
},
{
- /* VEX_W_0F3A18_P_2 */
- { "vinsertf128", { XM, Vex256, EXxmm, Ib }, 0 },
+ /* VEX_W_0F3A18_P_2_L_0 */
+ { "vinsertf128", { XM, Vex, EXxmm, Ib }, 0 },
},
{
- /* VEX_W_0F3A19_P_2 */
+ /* VEX_W_0F3A19_P_2_L_0 */
{ "vextractf128", { EXxmm, XM, Ib }, 0 },
},
{
{ MOD_TABLE (MOD_VEX_W_1_0F3A33_P_2_LEN_0) },
},
{
- /* VEX_W_0F3A38_P_2 */
- { "vinserti128", { XM, Vex256, EXxmm, Ib }, 0 },
+ /* VEX_W_0F3A38_P_2_L_0 */
+ { "vinserti128", { XM, Vex, EXxmm, Ib }, 0 },
},
{
- /* VEX_W_0F3A39_P_2 */
+ /* VEX_W_0F3A39_P_2_L_0 */
{ "vextracti128", { EXxmm, XM, Ib }, 0 },
},
{
- /* VEX_W_0F3A46_P_2 */
- { "vperm2i128", { XM, Vex256, EXx, Ib }, 0 },
+ /* VEX_W_0F3A46_P_2_L_0 */
+ { "vperm2i128", { XM, Vex, EXx, Ib }, 0 },
},
{
/* VEX_W_0F3A4A_P_2 */
},
/* VEX_W_0FXOP_08_CC_L_0 */
{
- { "vpcomb", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomb", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_CD_L_0 */
{
- { "vpcomw", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomw", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_CE_L_0 */
{
- { "vpcomd", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomd", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_CF_L_0 */
{
- { "vpcomq", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomq", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_EC_L_0 */
{
- { "vpcomub", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomub", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_ED_L_0 */
{
- { "vpcomuw", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomuw", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_EE_L_0 */
{
- { "vpcomud", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomud", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_08_EF_L_0 */
{
- { "vpcomuq", { XM, Vex128, EXx, VPCOM }, 0 },
+ { "vpcomuq", { XM, Vex, EXx, VPCOM }, 0 },
},
/* VEX_W_0FXOP_09_80 */
{
},
{
/* MOD_VEX_0F388C_PREFIX_2 */
- { "vpmaskmov%LW", { XM, Vex, Mx }, 0 },
+ { "vpmaskmov%DQ", { XM, Vex, Mx }, 0 },
},
{
/* MOD_VEX_0F388E_PREFIX_2 */
- { "vpmaskmov%LW", { Mx, Vex, XM }, 0 },
+ { "vpmaskmov%DQ", { Mx, Vex, XM }, 0 },
},
{
/* MOD_VEX_W_0_0F3A30_P_2_LEN_0 */
break;
}
need_vex = 1;
- need_vex_reg = 1;
codep++;
vindex = *codep++;
dp = &xop_table[vex_table_index][vindex];
break;
}
need_vex = 1;
- need_vex_reg = 1;
codep++;
vindex = *codep++;
dp = &vex_table[vex_table_index][vindex];
break;
}
need_vex = 1;
- need_vex_reg = 1;
codep++;
vindex = *codep++;
dp = &vex_table[dp->op[1].bytemode][vindex];
}
need_vex = 1;
- need_vex_reg = 1;
codep++;
vindex = *codep++;
dp = &evex_table[vex_table_index][vindex];
}
need_vex = 0;
- need_vex_reg = 0;
memset (&vex, 0, sizeof (vex));
if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
}
}
}
+ else if (l == 1 && last[0] == 'D')
+ *obufp++ = vex.w ? 'q' : 'd';
else if (l == 1 && last[0] == 'L')
{
- if ((intel_syntax && need_modrm)
- || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
+ if (cond ? modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
+ : address_mode != mode_64bit)
break;
if ((rex & REX_W))
{
USED_REX (REX_W);
*obufp++ = 'q';
}
- else if((address_mode == mode_64bit && need_modrm)
+ else if((address_mode == mode_64bit && need_modrm && cond)
|| (sizeflag & SUFFIX_ALWAYS))
*obufp++ = intel_syntax? 'd' : 'l';
}
abort ();
if (last[0] == 'X')
*obufp++ = vex.w ? 'd': 's';
- else if (last[0] == 'L')
- *obufp++ = vex.w ? 'q': 'd';
else if (last[0] == 'B')
*obufp++ = vex.w ? 'w': 'b';
else
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case d_mode:
- case d_scalar_swap_mode:
case d_swap_mode:
case dqd_mode:
oappend ("DWORD PTR ");
break;
case q_mode:
- case q_scalar_swap_mode:
case q_swap_mode:
oappend ("QWORD PTR ");
break;
case x_swap_mode:
case evex_x_gscat_mode:
case evex_x_nobcst_mode:
- case b_scalar_mode:
- case w_scalar_mode:
+ case bw_unit_mode:
if (need_vex)
{
switch (vex.length)
{
case b_mode:
case b_swap_mode:
- USED_REX (0);
+ if (reg & 4)
+ USED_REX (0);
if (rex)
names = names8rex;
else
{
case dqw_mode:
case dw_mode:
+ case xmm_mw_mode:
shift = 1;
break;
case dqb_mode:
case db_mode:
+ case xmm_mb_mode:
shift = 0;
break;
case dq_mode:
if (address_mode != mode_64bit)
{
+ case dqd_mode:
+ case xmm_md_mode:
+ case d_mode:
+ case d_swap_mode:
shift = 2;
break;
}
default:
abort ();
}
+ /* Make necessary corrections to shift for modes that need it. */
+ if (bytemode == xmmq_mode
+ || bytemode == evex_half_bcst_xmmq_mode
+ || (bytemode == ymmq_mode && vex.length == 128))
+ shift -= 1;
+ else if (bytemode == xmmqd_mode)
+ shift -= 2;
+ else if (bytemode == xmmdw_mode)
+ shift -= 3;
break;
case ymm_mode:
shift = 5;
case xmm_mq_mode:
case q_mode:
case q_swap_mode:
- case q_scalar_swap_mode:
shift = 3;
break;
- case dqd_mode:
- case xmm_md_mode:
- case d_mode:
- case d_swap_mode:
- case d_scalar_swap_mode:
- shift = 2;
- break;
- case w_scalar_mode:
- case xmm_mw_mode:
- shift = 1;
- break;
- case b_scalar_mode:
- case xmm_mb_mode:
- shift = 0;
+ case bw_unit_mode:
+ shift = vex.w ? 1 : 0;
break;
default:
abort ();
}
- /* Make necessary corrections to shift for modes that need it.
- For these modes we currently have shift 4, 5 or 6 depending on
- vex.length (it corresponds to xmmword, ymmword or zmmword
- operand). We might want to make it 3, 4 or 5 (e.g. for
- xmmq_mode). In case of broadcast enabled the corrections
- aren't needed, as element size is always 32 or 64 bits. */
- if (!vex.b
- && (bytemode == xmmq_mode
- || bytemode == evex_half_bcst_xmmq_mode))
- shift -= 1;
- else if (bytemode == xmmqd_mode)
- shift -= 2;
- else if (bytemode == xmmdw_mode)
- shift -= 3;
- else if (bytemode == ymmq_mode && vex.length == 128)
- shift -= 1;
}
else
shift = 0;
switch (bytemode)
{
case b_mode:
- USED_REX (0);
+ if (modrm.reg & 4)
+ USED_REX (0);
if (rex)
oappend (names8rex[modrm.reg + add]);
else
case sp_reg: case bp_reg: case si_reg: case di_reg:
s = names16[code - ax_reg + add];
break;
- case al_reg: case ah_reg: case cl_reg: case ch_reg:
- case dl_reg: case dh_reg: case bl_reg: case bh_reg:
+ case ah_reg: case ch_reg: case dh_reg: case bh_reg:
USED_REX (0);
+ /* Fall through. */
+ case al_reg: case cl_reg: case dl_reg: case bl_reg:
if (rex)
s = names8rex[code - al_reg + add];
else
if ((sizeflag & SUFFIX_ALWAYS)
&& (bytemode == x_swap_mode
|| bytemode == d_swap_mode
- || bytemode == d_scalar_swap_mode
- || bytemode == q_swap_mode
- || bytemode == q_scalar_swap_mode))
+ || bytemode == q_swap_mode))
swap_operand ();
if (need_vex
&& bytemode != evex_half_bcst_xmmq_mode
&& bytemode != ymm_mode
&& bytemode != tmm_mode
- && bytemode != d_scalar_swap_mode
- && bytemode != q_scalar_swap_mode
&& bytemode != vex_scalar_w_dq_mode)
{
switch (vex.length)
mnemonicendp = obufp;
}
-static struct op simd_cmp_op[] =
+static const struct op simd_cmp_op[] =
{
{ STRING_COMMA_LEN ("eq") },
{ STRING_COMMA_LEN ("lt") },
{ STRING_COMMA_LEN ("ord") }
};
+static const struct op vex_cmp_op[] =
+{
+ { STRING_COMMA_LEN ("eq_uq") },
+ { STRING_COMMA_LEN ("nge") },
+ { STRING_COMMA_LEN ("ngt") },
+ { STRING_COMMA_LEN ("false") },
+ { STRING_COMMA_LEN ("neq_oq") },
+ { STRING_COMMA_LEN ("ge") },
+ { STRING_COMMA_LEN ("gt") },
+ { STRING_COMMA_LEN ("true") },
+ { STRING_COMMA_LEN ("eq_os") },
+ { STRING_COMMA_LEN ("lt_oq") },
+ { STRING_COMMA_LEN ("le_oq") },
+ { STRING_COMMA_LEN ("unord_s") },
+ { STRING_COMMA_LEN ("neq_us") },
+ { STRING_COMMA_LEN ("nlt_uq") },
+ { STRING_COMMA_LEN ("nle_uq") },
+ { STRING_COMMA_LEN ("ord_s") },
+ { STRING_COMMA_LEN ("eq_us") },
+ { STRING_COMMA_LEN ("nge_uq") },
+ { STRING_COMMA_LEN ("ngt_uq") },
+ { STRING_COMMA_LEN ("false_os") },
+ { STRING_COMMA_LEN ("neq_os") },
+ { STRING_COMMA_LEN ("ge_oq") },
+ { STRING_COMMA_LEN ("gt_oq") },
+ { STRING_COMMA_LEN ("true_us") },
+};
+
static void
CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
{
sprintf (p, "%s%s", simd_cmp_op[cmp_type].name, suffix);
mnemonicendp += simd_cmp_op[cmp_type].len;
}
+ else if (need_vex
+ && cmp_type < ARRAY_SIZE (simd_cmp_op) + ARRAY_SIZE (vex_cmp_op))
+ {
+ char suffix [3];
+ char *p = mnemonicendp - 2;
+ suffix[0] = p[0];
+ suffix[1] = p[1];
+ suffix[2] = '\0';
+ cmp_type -= ARRAY_SIZE (simd_cmp_op);
+ sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
+ mnemonicendp += vex_cmp_op[cmp_type].len;
+ }
else
{
/* We have a reserved extension byte. Output it directly. */
oappend (names[reg]);
}
-static void
-CRC32_Fixup (int bytemode, int sizeflag)
-{
- /* Add proper suffix to "crc32". */
- char *p = mnemonicendp;
-
- switch (bytemode)
- {
- case b_mode:
- if (intel_syntax)
- goto skip;
-
- *p++ = 'b';
- break;
- case v_mode:
- if (intel_syntax)
- goto skip;
-
- USED_REX (REX_W);
- if (rex & REX_W)
- *p++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *p++ = 'l';
- else
- *p++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
- }
- mnemonicendp = p;
- *p = '\0';
-
- skip:
- if (modrm.mod == 3)
- {
- int add;
-
- /* Skip mod/rm byte. */
- MODRM_CHECK;
- codep++;
-
- USED_REX (REX_B);
- add = (rex & REX_B) ? 8 : 0;
- if (bytemode == b_mode)
- {
- USED_REX (0);
- if (rex)
- oappend (names8rex[modrm.rm + add]);
- else
- oappend (names8[modrm.rm + add]);
- }
- else
- {
- USED_REX (REX_W);
- if (rex & REX_W)
- oappend (names64[modrm.rm + add]);
- else if ((prefixes & PREFIX_DATA))
- oappend (names16[modrm.rm + add]);
- else
- oappend (names32[modrm.rm + add]);
- }
- }
- else
- OP_E (bytemode, sizeflag);
-}
-
static void
FXSAVE_Fixup (int bytemode, int sizeflag)
{
OP_M (bytemode, sizeflag);
}
-static void
-PCMPESTR_Fixup (int bytemode, int sizeflag)
-{
- /* Add proper suffix to "{,v}pcmpestr{i,m}". */
- if (!intel_syntax)
- {
- char *p = mnemonicendp;
-
- USED_REX (REX_W);
- if (rex & REX_W)
- *p++ = 'q';
- else if (sizeflag & SUFFIX_ALWAYS)
- *p++ = 'l';
-
- *p = '\0';
- mnemonicendp = p;
- }
-
- OP_EX (bytemode, sizeflag);
-}
-
/* Display the destination register operand for instructions with
VEX. */
if (!need_vex)
abort ();
- if (!need_vex_reg)
- return;
-
reg = vex.register_specifier;
vex.register_specifier = 0;
if (address_mode != mode_64bit)
switch (bytemode)
{
case vex_mode:
- case vex128_mode:
case vex_vsib_q_w_dq_mode:
case vex_vsib_q_w_d_mode:
names = names_xmm;
switch (bytemode)
{
case vex_mode:
- case vex256_mode:
names = names_ymm;
break;
case vex_vsib_q_w_dq_mode:
oappend (names[reg]);
}
+static void
+OP_VexR (int bytemode, int sizeflag)
+{
+ if (modrm.mod == 3)
+ OP_VEX (bytemode, sizeflag);
+}
+
static void
OP_VexW (int bytemode, int sizeflag)
{
oappend_maybe_intel (scratchbuf);
}
-static void
-OP_EX_Vex (int bytemode, int sizeflag)
-{
- if (modrm.mod != 3)
- need_vex_reg = 0;
- OP_EX (bytemode, sizeflag);
-}
-
-static void
-OP_XMM_Vex (int bytemode, int sizeflag)
-{
- if (modrm.mod != 3)
- need_vex_reg = 0;
- OP_XMM (bytemode, sizeflag);
-}
-
-static struct op vex_cmp_op[] =
-{
- { STRING_COMMA_LEN ("eq") },
- { STRING_COMMA_LEN ("lt") },
- { STRING_COMMA_LEN ("le") },
- { STRING_COMMA_LEN ("unord") },
- { STRING_COMMA_LEN ("neq") },
- { STRING_COMMA_LEN ("nlt") },
- { STRING_COMMA_LEN ("nle") },
- { STRING_COMMA_LEN ("ord") },
- { STRING_COMMA_LEN ("eq_uq") },
- { STRING_COMMA_LEN ("nge") },
- { STRING_COMMA_LEN ("ngt") },
- { STRING_COMMA_LEN ("false") },
- { STRING_COMMA_LEN ("neq_oq") },
- { STRING_COMMA_LEN ("ge") },
- { STRING_COMMA_LEN ("gt") },
- { STRING_COMMA_LEN ("true") },
- { STRING_COMMA_LEN ("eq_os") },
- { STRING_COMMA_LEN ("lt_oq") },
- { STRING_COMMA_LEN ("le_oq") },
- { STRING_COMMA_LEN ("unord_s") },
- { STRING_COMMA_LEN ("neq_us") },
- { STRING_COMMA_LEN ("nlt_uq") },
- { STRING_COMMA_LEN ("nle_uq") },
- { STRING_COMMA_LEN ("ord_s") },
- { STRING_COMMA_LEN ("eq_us") },
- { STRING_COMMA_LEN ("nge_uq") },
- { STRING_COMMA_LEN ("ngt_uq") },
- { STRING_COMMA_LEN ("false_os") },
- { STRING_COMMA_LEN ("neq_os") },
- { STRING_COMMA_LEN ("ge_oq") },
- { STRING_COMMA_LEN ("gt_oq") },
- { STRING_COMMA_LEN ("true_us") },
-};
-
-static void
-VCMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
-{
- unsigned int cmp_type;
-
- FETCH_DATA (the_info, codep + 1);
- cmp_type = *codep++ & 0xff;
- if (cmp_type < ARRAY_SIZE (vex_cmp_op))
- {
- char suffix [3];
- char *p = mnemonicendp - 2;
- suffix[0] = p[0];
- suffix[1] = p[1];
- suffix[2] = '\0';
- sprintf (p, "%s%s", vex_cmp_op[cmp_type].name, suffix);
- mnemonicendp += vex_cmp_op[cmp_type].len;
- }
- else
- {
- /* We have a reserved extension byte. Output it directly. */
- scratchbuf[0] = '$';
- print_operand_value (scratchbuf + 1, 1, cmp_type);
- oappend_maybe_intel (scratchbuf);
- scratchbuf[0] = '\0';
- }
-}
-
static void
VPCMP_Fixup (int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
}
}
-static void
-MOVBE_Fixup (int bytemode, int sizeflag)
-{
- /* Add proper suffix to "movbe". */
- char *p = mnemonicendp;
-
- switch (bytemode)
- {
- case v_mode:
- if (intel_syntax)
- goto skip;
-
- USED_REX (REX_W);
- if (sizeflag & SUFFIX_ALWAYS)
- {
- if (rex & REX_W)
- *p++ = 'q';
- else
- {
- if (sizeflag & DFLAG)
- *p++ = 'l';
- else
- *p++ = 'w';
- used_prefixes |= (prefixes & PREFIX_DATA);
- }
- }
- break;
- default:
- oappend (INTERNAL_DISASSEMBLER_ERROR);
- break;
- }
- mnemonicendp = p;
- *p = '\0';
-
- skip:
- OP_M (bytemode, sizeflag);
-}
-
static void
MOVSXD_Fixup (int bytemode, int sizeflag)
{
projects / deliverable / binutils-gdb.git / blobdiff