Enable 'set print inferior-events' and improve detach/fork/kill/exit messages

[deliverable/binutils-gdb.git] / opcodes / i386-dis.c

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index be2fd8abc9ef11d3b15eae97712c25da381fa74b..98950e20f070dbf5e6eb95024f4363e1beae874b 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -248,7 +248,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Eb { OP_E, b_mode }
 #define Ebnd { OP_E, bnd_mode }
 #define EbS { OP_E, b_swap_mode }
+#define EbndS { OP_E, bnd_swap_mode }
 #define Ev { OP_E, v_mode }
+#define Eva { OP_E, va_mode }
 #define Ev_bnd { OP_E, v_bnd_mode }
 #define EvS { OP_E, v_swap_mode }
 #define Ed { OP_E, d_mode }
@@ -498,6 +500,8 @@ enum
   v_mode,
   /* operand size depends on prefixes with operand swapped */
   v_swap_mode,
+  /* operand size depends on address prefix */
+  va_mode,
   /* word operand */
   w_mode,
   /* double word operand  */
@@ -560,7 +564,10 @@ enum
   dq_mode,
   /* registers like dq_mode, memory like w_mode.  */
   dqw_mode,
+  /* bounds operand */
   bnd_mode,
+  /* bounds operand with operand swapped */
+  bnd_swap_mode,
   /* 4- or 6-byte pointer operand */
   f_mode,
   const_1_mode,
@@ -731,6 +738,7 @@ enum
   REG_0F01,
   REG_0F0D,
   REG_0F18,
+  REG_0F1C_MOD_0,
   REG_0F1E_MOD_3,
   REG_0F71,
   REG_0F72,
@@ -785,6 +793,7 @@ enum
   MOD_0F1A_PREFIX_0,
   MOD_0F1B_PREFIX_0,
   MOD_0F1B_PREFIX_1,
+  MOD_0F1C_PREFIX_0,
   MOD_0F1E_PREFIX_1,
   MOD_0F24,
   MOD_0F26,
@@ -963,6 +972,7 @@ enum
   PREFIX_0F16,
   PREFIX_0F1A,
   PREFIX_0F1B,
+  PREFIX_0F1C,
   PREFIX_0F1E,
   PREFIX_0F2A,
   PREFIX_0F2B,
@@ -1004,7 +1014,8 @@ enum
   PREFIX_MOD_3_0FAE_REG_4,
   PREFIX_MOD_0_0FAE_REG_5,
   PREFIX_MOD_3_0FAE_REG_5,
-  PREFIX_0FAE_REG_6,
+  PREFIX_MOD_0_0FAE_REG_6,
+  PREFIX_MOD_1_0FAE_REG_6,
   PREFIX_0FAE_REG_7,
   PREFIX_0FB8,
   PREFIX_0FBC,
@@ -2532,8 +2543,7 @@ struct dis386 {
          prefix and behave as 'S' otherwise
    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
    'X' => print 's', 'd' depending on data16 prefix (for XMM)
-   'Y' => 'q' if instruction has an REX 64bit overwrite prefix and
-         suffix_always is true.
+   'Y' unused.
    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
    '!' => change condition from true to false or from false to true.
    '%' => add 1 upper case letter to the macro.
@@ -2891,7 +2901,7 @@ static const struct dis386 dis386_twobyte[] = {
   { "nopQ",            { Ev }, 0 },
   { PREFIX_TABLE (PREFIX_0F1A) },
   { PREFIX_TABLE (PREFIX_0F1B) },
-  { "nopQ",            { Ev }, 0 },
+  { PREFIX_TABLE (PREFIX_0F1C) },
   { "nopQ",            { Ev }, 0 },
   { PREFIX_TABLE (PREFIX_0F1E) },
   { "nopQ",            { Ev }, 0 },
@@ -3643,6 +3653,17 @@ static const struct dis386 reg_table[][8] = {
     { MOD_TABLE (MOD_0F18_REG_6) },
     { MOD_TABLE (MOD_0F18_REG_7) },
   },
+  /* REG_0F1C_MOD_0 */
+  {
+    { "cldemote",      { Mb }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+    { "nopQ",          { Ev }, 0 },
+  },
   /* REG_0F1E_MOD_3 */
   {
     { "nopQ",          { Ev }, 0 },
@@ -3890,10 +3911,18 @@ static const struct dis386 prefix_table[][4] = {
   {
     { MOD_TABLE (MOD_0F1B_PREFIX_0) },
     { MOD_TABLE (MOD_0F1B_PREFIX_1) },
-    { "bndmov", { Ebnd, Gbnd }, 0 },
+    { "bndmov", { EbndS, Gbnd }, 0 },
     { "bndcn",  { Gbnd, Ev_bnd }, 0 },
   },
 
+  /* PREFIX_0F1C */
+  {
+    { MOD_TABLE (MOD_0F1C_PREFIX_0) },
+    { "nopQ",  { Ev }, PREFIX_OPCODE },
+    { "nopQ",  { Ev }, PREFIX_OPCODE },
+    { "nopQ",  { Ev }, PREFIX_OPCODE },
+  },
+
   /* PREFIX_0F1E */
   {
     { "nopQ",  { Ev }, PREFIX_OPCODE },
@@ -3921,17 +3950,17 @@ static const struct dis386 prefix_table[][4] = {
   /* PREFIX_0F2C */
   {
     { "cvttps2pi", { MXC, EXq }, PREFIX_OPCODE },
-    { "cvttss2siY", { Gv, EXd }, PREFIX_OPCODE },
+    { "cvttss2si", { Gv, EXd }, PREFIX_OPCODE },
     { "cvttpd2pi", { MXC, EXx }, PREFIX_OPCODE },
-    { "cvttsd2siY", { Gv, EXq }, PREFIX_OPCODE },
+    { "cvttsd2si", { Gv, EXq }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F2D */
   {
     { "cvtps2pi", { MXC, EXq }, PREFIX_OPCODE },
-    { "cvtss2siY", { Gv, EXd }, PREFIX_OPCODE },
+    { "cvtss2si", { Gv, EXd }, PREFIX_OPCODE },
     { "cvtpd2pi", { MXC, EXx }, PREFIX_OPCODE },
-    { "cvtsd2siY", { Gv, EXq }, PREFIX_OPCODE },
+    { "cvtsd2si", { Gv, EXq }, PREFIX_OPCODE },
   },
 
   /* PREFIX_0F2E */
@@ -4188,13 +4217,21 @@ static const struct dis386 prefix_table[][4] = {
     { "incsspK",       { Rdq }, PREFIX_OPCODE },
   },
 
-  /* PREFIX_0FAE_REG_6 */
+  /* PREFIX_MOD_0_0FAE_REG_6 */
   {
     { "xsaveopt",      { FXSAVE }, PREFIX_OPCODE },
     { "clrssbsy",      { Mq }, PREFIX_OPCODE },
     { "clwb",  { Mb }, PREFIX_OPCODE },
   },
 
+  /* PREFIX_MOD_1_0FAE_REG_6 */
+  {
+    { RM_TABLE (RM_0FAE_REG_6) },
+    { "umonitor",      { Eva }, PREFIX_OPCODE },
+    { "tpause",        { Edq }, PREFIX_OPCODE },
+    { "umwait",        { Edq }, PREFIX_OPCODE },
+  },
+
   /* PREFIX_0FAE_REG_7 */
   {
     { "clflush",       { Mb }, 0 },
@@ -9543,26 +9580,26 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_0F2C_P_1 */
   {
-    { "vcvttss2siY",   { Gv, EXdScalar }, 0 },
-    { "vcvttss2siY",   { Gv, EXdScalar }, 0 },
+    { "vcvttss2si",    { Gv, EXdScalar }, 0 },
+    { "vcvttss2si",    { Gv, EXdScalar }, 0 },
   },
 
   /* VEX_LEN_0F2C_P_3 */
   {
-    { "vcvttsd2siY",   { Gv, EXqScalar }, 0 },
-    { "vcvttsd2siY",   { Gv, EXqScalar }, 0 },
+    { "vcvttsd2si",    { Gv, EXqScalar }, 0 },
+    { "vcvttsd2si",    { Gv, EXqScalar }, 0 },
   },
 
   /* VEX_LEN_0F2D_P_1 */
   {
-    { "vcvtss2siY",    { Gv, EXdScalar }, 0 },
-    { "vcvtss2siY",    { Gv, EXdScalar }, 0 },
+    { "vcvtss2si",     { Gv, EXdScalar }, 0 },
+    { "vcvtss2si",     { Gv, EXdScalar }, 0 },
   },
 
   /* VEX_LEN_0F2D_P_3 */
   {
-    { "vcvtsd2siY",    { Gv, EXqScalar }, 0 },
-    { "vcvtsd2siY",    { Gv, EXqScalar }, 0 },
+    { "vcvtsd2si",     { Gv, EXqScalar }, 0 },
+    { "vcvtsd2si",     { Gv, EXqScalar }, 0 },
   },
 
   /* VEX_LEN_0F2E_P_0 */
@@ -11605,6 +11642,11 @@ static const struct dis386 mod_table[][2] = {
     { "bndmk",         { Gbnd, Ev_bnd }, 0 },
     { "nopQ",          { Ev }, 0 },
   },
+  {
+    /* MOD_0F1C_PREFIX_0 */
+    { REG_TABLE (REG_0F1C_MOD_0) },
+    { "nopQ",          { Ev }, 0 },
+  },
   {
     /* MOD_0F1E_PREFIX_1 */
     { "nopQ",          { Ev }, 0 },
@@ -11723,8 +11765,8 @@ static const struct dis386 mod_table[][2] = {
   },
   {
     /* MOD_0FAE_REG_6 */
-    { PREFIX_TABLE (PREFIX_0FAE_REG_6) },
-    { RM_TABLE (RM_0FAE_REG_6) },
+    { PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_6) },
+    { PREFIX_TABLE (PREFIX_MOD_1_0FAE_REG_6) },
   },
   {
     /* MOD_0FAE_REG_7 */
@@ -12823,7 +12865,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
        {
        case 0:
-         vex.prefix = 0;
          break;
        case 1:
          vex.prefix = DATA_PREFIX_OPCODE;
@@ -12888,7 +12929,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
        {
        case 0:
-         vex.prefix = 0;
          break;
        case 1:
          vex.prefix = DATA_PREFIX_OPCODE;
@@ -12926,12 +12966,10 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       /* For the 2-byte VEX prefix in 32-bit mode, the highest bit in
         VEX.vvvv is 1.  */
       vex.register_specifier = (~(*codep >> 3)) & 0xf;
-      vex.w = 0;
       vex.length = (*codep & 0x4) ? 256 : 128;
       switch ((*codep & 0x3))
        {
        case 0:
-         vex.prefix = 0;
          break;
        case 1:
          vex.prefix = DATA_PREFIX_OPCODE;
@@ -13006,7 +13044,6 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
       switch ((*codep & 0x3))
        {
        case 0:
-         vex.prefix = 0;
          break;
        case 1:
          vex.prefix = DATA_PREFIX_OPCODE;
@@ -13364,7 +13401,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
   need_vex = 0;
   need_vex_reg = 0;
   vex_w_done = 0;
-  vex.evex = 0;
+  memset (&vex, 0, sizeof (vex));
 
   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
     {
@@ -14410,16 +14447,7 @@ case_S:
          break;
        case 'Y':
          if (l == 0 && len == 1)
-           {
-             if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
-               break;
-             if (rex & REX_W)
-               {
-                 USED_REX (REX_W);
-                 *obufp++ = 'q';
-               }
-             break;
-           }
+           abort ();
          else
            {
              if (l != 1 || len != 2 || last[0] != 'X')
@@ -15047,6 +15075,7 @@ OP_E_register (int bytemode, int sizeflag)
 
   if ((sizeflag & SUFFIX_ALWAYS)
       && (bytemode == b_swap_mode
+         || bytemode == bnd_swap_mode
          || bytemode == v_swap_mode))
     swap_operand ();
 
@@ -15076,6 +15105,7 @@ OP_E_register (int bytemode, int sizeflag)
       names = address_mode == mode_64bit ? names64 : names32;
       break;
     case bnd_mode:
+    case bnd_swap_mode:
       if (reg > 0x3)
        {
          oappend ("(bad)");
@@ -15118,6 +15148,21 @@ OP_E_register (int bytemode, int sizeflag)
          used_prefixes |= (prefixes & PREFIX_DATA);
        }
       break;
+    case va_mode:
+      names = (address_mode == mode_64bit
+              ? names64 : names32);
+      if (!(prefixes & PREFIX_ADDR))
+       names = (address_mode == mode_16bit
+                    ? names16 : names);
+      else
+       {
+         /* Remove "addr16/addr32".  */
+         all_prefixes[last_addr_prefix] = 0;
+         names = (address_mode != mode_32bit
+                      ? names32 : names16);
+         used_prefixes |= PREFIX_ADDR;
+       }
+      break;
     case mask_bd_mode:
     case mask_mode:
       if (reg > 0x7)
@@ -15272,7 +15317,8 @@ OP_E_memory (int bytemode, int sizeflag)
       int scale = 0;
       int addr32flag = !((sizeflag & AFLAG)
                         || bytemode == v_bnd_mode
-                        || bytemode == bnd_mode);
+                        || bytemode == bnd_mode
+                        || bytemode == bnd_swap_mode);
       const char **indexes64 = names64;
       const char **indexes32 = names32;
 
@@ -15389,7 +15435,8 @@ OP_E_memory (int bytemode, int sizeflag)
 
       if ((havebase || haveindex || riprel)
          && (bytemode != v_bnd_mode)
-         && (bytemode != bnd_mode))
+         && (bytemode != bnd_mode)
+         && (bytemode != bnd_swap_mode))
        used_prefixes |= PREFIX_ADDR;
 
       if (havedisp || (intel_syntax && riprel))