static void OP_0f07 (int, int);
static void OP_Monitor (int, int);
static void OP_Mwait (int, int);
+static void OP_Mwaitx (int, int);
static void NOP_Fixup1 (int, int);
static void NOP_Fixup2 (int, int);
static void OP_3DNowSuffix (int, int);
MOD_0FB2,
MOD_0FB4,
MOD_0FB5,
+ MOD_0FC3,
MOD_0FC7_REG_3,
MOD_0FC7_REG_4,
MOD_0FC7_REG_5,
MOD_VEX_0F16_PREFIX_0,
MOD_VEX_0F17,
MOD_VEX_0F2B,
+ MOD_VEX_W_0_0F41_P_0_LEN_1,
+ MOD_VEX_W_1_0F41_P_0_LEN_1,
+ MOD_VEX_W_0_0F41_P_2_LEN_1,
+ MOD_VEX_W_1_0F41_P_2_LEN_1,
+ MOD_VEX_W_0_0F42_P_0_LEN_1,
+ MOD_VEX_W_1_0F42_P_0_LEN_1,
+ MOD_VEX_W_0_0F42_P_2_LEN_1,
+ MOD_VEX_W_1_0F42_P_2_LEN_1,
+ MOD_VEX_W_0_0F44_P_0_LEN_1,
+ MOD_VEX_W_1_0F44_P_0_LEN_1,
+ MOD_VEX_W_0_0F44_P_2_LEN_1,
+ MOD_VEX_W_1_0F44_P_2_LEN_1,
+ MOD_VEX_W_0_0F45_P_0_LEN_1,
+ MOD_VEX_W_1_0F45_P_0_LEN_1,
+ MOD_VEX_W_0_0F45_P_2_LEN_1,
+ MOD_VEX_W_1_0F45_P_2_LEN_1,
+ MOD_VEX_W_0_0F46_P_0_LEN_1,
+ MOD_VEX_W_1_0F46_P_0_LEN_1,
+ MOD_VEX_W_0_0F46_P_2_LEN_1,
+ MOD_VEX_W_1_0F46_P_2_LEN_1,
+ MOD_VEX_W_0_0F47_P_0_LEN_1,
+ MOD_VEX_W_1_0F47_P_0_LEN_1,
+ MOD_VEX_W_0_0F47_P_2_LEN_1,
+ MOD_VEX_W_1_0F47_P_2_LEN_1,
+ MOD_VEX_W_0_0F4A_P_0_LEN_1,
+ MOD_VEX_W_1_0F4A_P_0_LEN_1,
+ MOD_VEX_W_0_0F4A_P_2_LEN_1,
+ MOD_VEX_W_1_0F4A_P_2_LEN_1,
+ MOD_VEX_W_0_0F4B_P_0_LEN_1,
+ MOD_VEX_W_1_0F4B_P_0_LEN_1,
+ MOD_VEX_W_0_0F4B_P_2_LEN_1,
MOD_VEX_0F50,
MOD_VEX_0F71_REG_2,
MOD_VEX_0F71_REG_4,
MOD_VEX_0F73_REG_3,
MOD_VEX_0F73_REG_6,
MOD_VEX_0F73_REG_7,
+ MOD_VEX_W_0_0F91_P_0_LEN_0,
+ MOD_VEX_W_1_0F91_P_0_LEN_0,
+ MOD_VEX_W_0_0F91_P_2_LEN_0,
+ MOD_VEX_W_1_0F91_P_2_LEN_0,
+ MOD_VEX_W_0_0F92_P_0_LEN_0,
+ MOD_VEX_W_0_0F92_P_2_LEN_0,
+ MOD_VEX_W_0_0F92_P_3_LEN_0,
+ MOD_VEX_W_1_0F92_P_3_LEN_0,
+ MOD_VEX_W_0_0F93_P_0_LEN_0,
+ MOD_VEX_W_0_0F93_P_2_LEN_0,
+ MOD_VEX_W_0_0F93_P_3_LEN_0,
+ MOD_VEX_W_1_0F93_P_3_LEN_0,
+ MOD_VEX_W_0_0F98_P_0_LEN_0,
+ MOD_VEX_W_1_0F98_P_0_LEN_0,
+ MOD_VEX_W_0_0F98_P_2_LEN_0,
+ MOD_VEX_W_1_0F98_P_2_LEN_0,
+ MOD_VEX_W_0_0F99_P_0_LEN_0,
+ MOD_VEX_W_1_0F99_P_0_LEN_0,
+ MOD_VEX_W_0_0F99_P_2_LEN_0,
+ MOD_VEX_W_1_0F99_P_2_LEN_0,
MOD_VEX_0FAE_REG_2,
MOD_VEX_0FAE_REG_3,
MOD_VEX_0FD7_PREFIX_2,
MOD_VEX_0F385A_PREFIX_2,
MOD_VEX_0F388C_PREFIX_2,
MOD_VEX_0F388E_PREFIX_2,
+ MOD_VEX_W_0_0F3A30_P_2_LEN_0,
+ MOD_VEX_W_1_0F3A30_P_2_LEN_0,
+ MOD_VEX_W_0_0F3A31_P_2_LEN_0,
+ MOD_VEX_W_1_0F3A31_P_2_LEN_0,
+ MOD_VEX_W_0_0F3A32_P_2_LEN_0,
+ MOD_VEX_W_1_0F3A32_P_2_LEN_0,
+ MOD_VEX_W_0_0F3A33_P_2_LEN_0,
+ MOD_VEX_W_1_0F3A33_P_2_LEN_0,
MOD_EVEX_0F10_PREFIX_1,
MOD_EVEX_0F10_PREFIX_3,
PREFIX_0FBC,
PREFIX_0FBD,
PREFIX_0FC2,
- PREFIX_0FC3,
+ PREFIX_MOD_0_0FC3,
PREFIX_MOD_0_0FC7_REG_6,
PREFIX_MOD_3_0FC7_REG_6,
PREFIX_MOD_3_0FC7_REG_7,
{ "xaddB", { Ebh1, Gb }, 0 },
{ "xaddS", { Evh1, Gv }, 0 },
{ PREFIX_TABLE (PREFIX_0FC2) },
- { PREFIX_TABLE (PREFIX_0FC3) },
+ { MOD_TABLE (MOD_0FC3) },
{ "pinsrw", { MX, Edqw, Ib }, PREFIX_OPCODE },
{ "pextrw", { Gdq, MS, Ib }, PREFIX_OPCODE },
{ "shufpX", { XM, EXx, Ib }, PREFIX_OPCODE },
{ "cmpsd", { XM, EXq, CMP }, PREFIX_OPCODE },
},
- /* PREFIX_0FC3 */
+ /* PREFIX_MOD_0_0FC3 */
{
- { "movntiS", { Ma, Gv }, PREFIX_OPCODE },
+ { "movntiS", { Ev, Gv }, PREFIX_OPCODE },
},
/* PREFIX_MOD_0_0FC7_REG_6 */
},
{
/* VEX_W_0F41_P_0_LEN_1 */
- { "kandw", { MaskG, MaskVex, MaskR }, 0 },
- { "kandq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F41_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F41_P_0_LEN_1) },
},
{
/* VEX_W_0F41_P_2_LEN_1 */
- { "kandb", { MaskG, MaskVex, MaskR }, 0 },
- { "kandd", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F41_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F41_P_2_LEN_1) }
},
{
/* VEX_W_0F42_P_0_LEN_1 */
- { "kandnw", { MaskG, MaskVex, MaskR }, 0 },
- { "kandnq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F42_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F42_P_0_LEN_1) },
},
{
/* VEX_W_0F42_P_2_LEN_1 */
- { "kandnb", { MaskG, MaskVex, MaskR }, 0 },
- { "kandnd", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F42_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F42_P_2_LEN_1) },
},
{
/* VEX_W_0F44_P_0_LEN_0 */
- { "knotw", { MaskG, MaskR }, 0 },
- { "knotq", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F44_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F44_P_0_LEN_1) },
},
{
/* VEX_W_0F44_P_2_LEN_0 */
- { "knotb", { MaskG, MaskR }, 0 },
- { "knotd", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F44_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F44_P_2_LEN_1) },
},
{
/* VEX_W_0F45_P_0_LEN_1 */
- { "korw", { MaskG, MaskVex, MaskR }, 0 },
- { "korq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F45_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F45_P_0_LEN_1) },
},
{
/* VEX_W_0F45_P_2_LEN_1 */
- { "korb", { MaskG, MaskVex, MaskR }, 0 },
- { "kord", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F45_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F45_P_2_LEN_1) },
},
{
/* VEX_W_0F46_P_0_LEN_1 */
- { "kxnorw", { MaskG, MaskVex, MaskR }, 0 },
- { "kxnorq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F46_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F46_P_0_LEN_1) },
},
{
/* VEX_W_0F46_P_2_LEN_1 */
- { "kxnorb", { MaskG, MaskVex, MaskR }, 0 },
- { "kxnord", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F46_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F46_P_2_LEN_1) },
},
{
/* VEX_W_0F47_P_0_LEN_1 */
- { "kxorw", { MaskG, MaskVex, MaskR }, 0 },
- { "kxorq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F47_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F47_P_0_LEN_1) },
},
{
/* VEX_W_0F47_P_2_LEN_1 */
- { "kxorb", { MaskG, MaskVex, MaskR }, 0 },
- { "kxord", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F47_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F47_P_2_LEN_1) },
},
{
/* VEX_W_0F4A_P_0_LEN_1 */
- { "kaddw", { MaskG, MaskVex, MaskR }, 0 },
- { "kaddq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F4A_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F4A_P_0_LEN_1) },
},
{
/* VEX_W_0F4A_P_2_LEN_1 */
- { "kaddb", { MaskG, MaskVex, MaskR }, 0 },
- { "kaddd", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F4A_P_2_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F4A_P_2_LEN_1) },
},
{
/* VEX_W_0F4B_P_0_LEN_1 */
- { "kunpckwd", { MaskG, MaskVex, MaskR }, 0 },
- { "kunpckdq", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F4B_P_0_LEN_1) },
+ { MOD_TABLE (MOD_VEX_W_1_0F4B_P_0_LEN_1) },
},
{
/* VEX_W_0F4B_P_2_LEN_1 */
- { "kunpckbw", { MaskG, MaskVex, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F4B_P_2_LEN_1) },
},
{
/* VEX_W_0F50_M_0 */
},
{
/* VEX_W_0F91_P_0_LEN_0 */
- { "kmovw", { Ew, MaskG }, 0 },
- { "kmovq", { Eq, MaskG }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F91_P_0_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F91_P_0_LEN_0) },
},
{
/* VEX_W_0F91_P_2_LEN_0 */
- { "kmovb", { Eb, MaskG }, 0 },
- { "kmovd", { Ed, MaskG }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F91_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F91_P_2_LEN_0) },
},
{
/* VEX_W_0F92_P_0_LEN_0 */
- { "kmovw", { MaskG, Rdq }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F92_P_0_LEN_0) },
},
{
/* VEX_W_0F92_P_2_LEN_0 */
- { "kmovb", { MaskG, Rdq }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) },
},
{
/* VEX_W_0F92_P_3_LEN_0 */
- { "kmovd", { MaskG, Rdq }, 0 },
- { "kmovq", { MaskG, Rdq }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F92_P_3_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F92_P_3_LEN_0) },
},
{
/* VEX_W_0F93_P_0_LEN_0 */
- { "kmovw", { Gdq, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) },
},
{
/* VEX_W_0F93_P_2_LEN_0 */
- { "kmovb", { Gdq, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) },
},
{
/* VEX_W_0F93_P_3_LEN_0 */
- { "kmovd", { Gdq, MaskR }, 0 },
- { "kmovq", { Gdq, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F93_P_3_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F93_P_3_LEN_0) },
},
{
/* VEX_W_0F98_P_0_LEN_0 */
- { "kortestw", { MaskG, MaskR }, 0 },
- { "kortestq", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F98_P_0_LEN_0) },
},
{
/* VEX_W_0F98_P_2_LEN_0 */
- { "kortestb", { MaskG, MaskR }, 0 },
- { "kortestd", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F98_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F98_P_2_LEN_0) },
},
{
/* VEX_W_0F99_P_0_LEN_0 */
- { "ktestw", { MaskG, MaskR }, 0 },
- { "ktestq", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F99_P_0_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F99_P_0_LEN_0) },
},
{
/* VEX_W_0F99_P_2_LEN_0 */
- { "ktestb", { MaskG, MaskR }, 0 },
- { "ktestd", { MaskG, MaskR }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F99_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F99_P_2_LEN_0) },
},
{
/* VEX_W_0FAE_R_2_M_0 */
},
{
/* VEX_W_0F3A30_P_2_LEN_0 */
- { "kshiftrb", { MaskG, MaskR, Ib }, 0 },
- { "kshiftrw", { MaskG, MaskR, Ib }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F3A30_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F3A30_P_2_LEN_0) },
},
{
/* VEX_W_0F3A31_P_2_LEN_0 */
- { "kshiftrd", { MaskG, MaskR, Ib }, 0 },
- { "kshiftrq", { MaskG, MaskR, Ib }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F3A31_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F3A31_P_2_LEN_0) },
},
{
/* VEX_W_0F3A32_P_2_LEN_0 */
- { "kshiftlb", { MaskG, MaskR, Ib }, 0 },
- { "kshiftlw", { MaskG, MaskR, Ib }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F3A32_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F3A32_P_2_LEN_0) },
},
{
/* VEX_W_0F3A33_P_2_LEN_0 */
- { "kshiftld", { MaskG, MaskR, Ib }, 0 },
- { "kshiftlq", { MaskG, MaskR, Ib }, 0 },
+ { MOD_TABLE (MOD_VEX_W_0_0F3A33_P_2_LEN_0) },
+ { MOD_TABLE (MOD_VEX_W_1_0F3A33_P_2_LEN_0) },
},
{
/* VEX_W_0F3A38_P_2 */
/* MOD_0FB5 */
{ "lgsS", { Gv, Mp }, 0 },
},
+ {
+ /* MOD_0FC3 */
+ { PREFIX_TABLE (PREFIX_MOD_0_0FC3) },
+ },
{
/* MOD_0FC7_REG_3 */
- { "xrstors", { FXSAVE }, 0 },
+ { "xrstors", { FXSAVE }, 0 },
},
{
/* MOD_0FC7_REG_4 */
/* MOD_VEX_0F2B */
{ VEX_W_TABLE (VEX_W_0F2B_M_0) },
},
+ {
+ /* MOD_VEX_W_0_0F41_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kandw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F41_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kandq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F41_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kandb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F41_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kandd", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F42_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kandnw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F42_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kandnq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F42_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kandnb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F42_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kandnd", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F44_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "knotw", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F44_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "knotq", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F44_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "knotb", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F44_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "knotd", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F45_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "korw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F45_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "korq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F45_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "korb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F45_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kord", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F46_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kxnorw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F46_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kxnorq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F46_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kxnorb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F46_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kxnord", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F47_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kxorw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F47_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kxorq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F47_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kxorb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F47_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kxord", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F4A_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kaddw", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F4A_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kaddq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F4A_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kaddb", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F4A_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kaddd", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F4B_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kunpckwd", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F4B_P_0_LEN_1 */
+ { Bad_Opcode },
+ { "kunpckdq", { MaskG, MaskVex, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F4B_P_2_LEN_1 */
+ { Bad_Opcode },
+ { "kunpckbw", { MaskG, MaskVex, MaskR }, 0 },
+ },
{
/* MOD_VEX_0F50 */
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F73_REG_7) },
},
+ {
+ /* MOD_VEX_W_0_0F91_P_0_LEN_0 */
+ { "kmovw", { Ew, MaskG }, 0 },
+ { Bad_Opcode },
+ },
+ {
+ /* MOD_VEX_W_0_0F91_P_0_LEN_0 */
+ { "kmovq", { Eq, MaskG }, 0 },
+ { Bad_Opcode },
+ },
+ {
+ /* MOD_VEX_W_0_0F91_P_2_LEN_0 */
+ { "kmovb", { Eb, MaskG }, 0 },
+ { Bad_Opcode },
+ },
+ {
+ /* MOD_VEX_W_0_0F91_P_2_LEN_0 */
+ { "kmovd", { Ed, MaskG }, 0 },
+ { Bad_Opcode },
+ },
+ {
+ /* MOD_VEX_W_0_0F92_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "kmovw", { MaskG, Rdq }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F92_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kmovb", { MaskG, Rdq }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F92_P_3_LEN_0 */
+ { Bad_Opcode },
+ { "kmovd", { MaskG, Rdq }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F92_P_3_LEN_0 */
+ { Bad_Opcode },
+ { "kmovq", { MaskG, Rdq }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F93_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "kmovw", { Gdq, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F93_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kmovb", { Gdq, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F93_P_3_LEN_0 */
+ { Bad_Opcode },
+ { "kmovd", { Gdq, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F93_P_3_LEN_0 */
+ { Bad_Opcode },
+ { "kmovq", { Gdq, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F98_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "kortestw", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F98_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "kortestq", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F98_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kortestb", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F98_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kortestd", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F99_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "ktestw", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F99_P_0_LEN_0 */
+ { Bad_Opcode },
+ { "ktestq", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F99_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "ktestb", { MaskG, MaskR }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F99_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "ktestd", { MaskG, MaskR }, 0 },
+ },
{
/* MOD_VEX_0FAE_REG_2 */
{ VEX_LEN_TABLE (VEX_LEN_0FAE_R_2_M_0) },
/* MOD_VEX_0F388E_PREFIX_2 */
{ "vpmaskmov%LW", { Mx, Vex, XM }, 0 },
},
+ {
+ /* MOD_VEX_W_0_0F3A30_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftrb", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F3A30_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftrw", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F3A31_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftrd", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F3A31_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftrq", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F3A32_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftlb", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F3A32_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftlw", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_0_0F3A33_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftld", { MaskG, MaskR, Ib }, 0 },
+ },
+ {
+ /* MOD_VEX_W_1_0F3A33_P_2_LEN_0 */
+ { Bad_Opcode },
+ { "kshiftlq", { MaskG, MaskR, Ib }, 0 },
+ },
#define NEED_MOD_TABLE
#include "i386-dis-evex.h"
#undef NEED_MOD_TABLE
/* RM_0F01_REG_7 */
{ "swapgs", { Skip_MODRM }, 0 },
{ "rdtscp", { Skip_MODRM }, 0 },
- { Bad_Opcode },
- { Bad_Opcode },
+ { "monitorx", { { OP_Monitor, 0 } }, 0 },
+ { "mwaitx", { { OP_Mwaitx, 0 } }, 0 },
{ "clzero", { Skip_MODRM }, 0 },
},
{
if (*codep == 0x0f)
{
unsigned char threebyte;
- FETCH_DATA (info, codep + 2);
- threebyte = *++codep;
+
+ codep++;
+ FETCH_DATA (info, codep + 1);
+ threebyte = *codep;
dp = &dis386_twobyte[threebyte];
need_modrm = twobyte_has_modrm[*codep];
codep++;
for (i = 0; i < MAX_OPERANDS; ++i)
op_txt[i] = op_out[i];
+ if (intel_syntax && dp && dp->op[2].rtn == OP_Rounding
+ && dp->op[3].rtn == OP_E && dp->op[4].rtn == NULL)
+ {
+ op_txt[2] = op_out[3];
+ op_txt[3] = op_out[2];
+ }
+
for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
{
op_ad = op_index[i];
a = *codep++ & 0xff;
a |= (*codep++ & 0xff) << 8;
a |= (*codep++ & 0xff) << 16;
- a |= (*codep++ & 0xff) << 24;
+ a |= (*codep++ & 0xffu) << 24;
b = *codep++ & 0xff;
b |= (*codep++ & 0xff) << 8;
b |= (*codep++ & 0xff) << 16;
- b |= (*codep++ & 0xff) << 24;
+ b |= (*codep++ & 0xffu) << 24;
x = a + ((bfd_vma) b << 32);
#else
abort ();
}
}
+static void
+OP_Mwaitx (int bytemode ATTRIBUTE_UNUSED,
+ int sizeflag ATTRIBUTE_UNUSED)
+{
+ /* mwaitx %eax,%ecx,%ebx */
+ if (!intel_syntax)
+ {
+ const char **names = (address_mode == mode_64bit
+ ? names64 : names32);
+ strcpy (op_out[0], names[0]);
+ strcpy (op_out[1], names[1]);
+ strcpy (op_out[2], names[3]);
+ two_source_ops = 1;
+ }
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ codep++;
+}
+
static void
OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
int sizeflag ATTRIBUTE_UNUSED)
projects / deliverable / binutils-gdb.git / blobdiff