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Add "volatile" keyword to "struct gdb_exception" declaration
[deliverable/binutils-gdb.git] / opcodes / i386-gen.c
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 87254d2df839df28a5b43673a69e12292b1f5d12..09f8280c2ea901b8484465ab5e0e6a7d64f1b101 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -1,4 +1,4 @@
-/* Copyright 2007, 2008, 2009, 2010, 2011, 2012
+/* Copyright 2007-2014
    Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
@@ -81,7 +81,7 @@ static initializer cpu_flag_init[] =
   { "CPU_K6_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
   { "CPU_K6_2_FLAGS",
-    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuNop|CpuMMX|Cpu3dnow" },
+    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
   { "CPU_ATHLON_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA" },
   { "CPU_K8_FLAGS",
@@ -92,6 +92,10 @@ static initializer cpu_flag_init[] =
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
   { "CPU_BDVER2_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+  { "CPU_BDVER3_FLAGS",
+    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase" },
+  { "CPU_BDVER4_FLAGS",
+    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd" },
   { "CPU_BTVER1_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
   { "CPU_BTVER2_FLAGS",
@@ -125,7 +129,7 @@ static initializer cpu_flag_init[] =
   { "CPU_SSE4_2_FLAGS",
     "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
   { "CPU_ANY_SSE_FLAGS",
-    "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2" },
+    "CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" },
   { "CPU_VMX_FLAGS",
     "CpuVMX" },
   { "CPU_SMX_FLAGS",
@@ -192,8 +196,16 @@ static initializer cpu_flag_init[] =
     "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
   { "CPU_AVX2_FLAGS",
     "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" },
+  { "CPU_AVX512F_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" },
+  { "CPU_AVX512CD_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" },
+  { "CPU_AVX512ER_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" },
+  { "CPU_AVX512PF_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" },
   { "CPU_ANY_AVX_FLAGS",
-    "CpuAVX|CpuAVX2" },
+    "CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" },
   { "CPU_L1OM_FLAGS",
     "unknown" },
   { "CPU_K1OM_FLAGS",
@@ -204,6 +216,12 @@ static initializer cpu_flag_init[] =
     "CpuRdSeed" },
   { "CPU_PRFCHW_FLAGS",
     "CpuPRFCHW" },
+  { "CPU_SMAP_FLAGS",
+    "CpuSMAP" },
+  { "CPU_MPX_FLAGS",
+    "CpuMPX" },
+  { "CPU_SHA_FLAGS",
+    "CpuSHA" },
 };
 
 static initializer operand_type_init[] =
@@ -272,6 +290,10 @@ static initializer operand_type_init[] =
     "RegXMM" },
   { "OPERAND_TYPE_REGYMM",
     "RegYMM" },
+  { "OPERAND_TYPE_REGZMM",
+    "RegZMM" },
+  { "OPERAND_TYPE_REGMASK",
+    "RegMask" },
   { "OPERAND_TYPE_ESSEG",
     "EsSeg" },
   { "OPERAND_TYPE_ACC32",
@@ -292,6 +314,8 @@ static initializer operand_type_init[] =
     "Imm16|Imm32S" },
   { "OPERAND_TYPE_IMM16_32_32S",
     "Imm16|Imm32|Imm32S" },
+  { "OPERAND_TYPE_IMM32_64",
+    "Imm32|Imm64" },
   { "OPERAND_TYPE_IMM32_32S_DISP32",
     "Imm32|Imm32S|Disp32" },
   { "OPERAND_TYPE_IMM64_DISP64",
@@ -302,6 +326,10 @@ static initializer operand_type_init[] =
     "Imm32|Imm32S|Imm64|Disp32|Disp64" },
   { "OPERAND_TYPE_VEC_IMM4",
     "Vec_Imm4" },
+  { "OPERAND_TYPE_REGBND",
+    "RegBND" },
+  { "OPERAND_TYPE_VEC_DISP8",
+    "Vec_Disp8" },
 };
 
 typedef struct bitfield
@@ -338,6 +366,10 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuSSE4_2),
   BITFIELD (CpuAVX),
   BITFIELD (CpuAVX2),
+  BITFIELD (CpuAVX512F),
+  BITFIELD (CpuAVX512CD),
+  BITFIELD (CpuAVX512ER),
+  BITFIELD (CpuAVX512PF),
   BITFIELD (CpuL1OM),
   BITFIELD (CpuK1OM),
   BITFIELD (CpuSSE4a),
@@ -375,8 +407,12 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuRDSEED),
   BITFIELD (CpuADX),
   BITFIELD (CpuPRFCHW),
+  BITFIELD (CpuSMAP),
+  BITFIELD (CpuSHA),
+  BITFIELD (CpuVREX),
   BITFIELD (Cpu64),
   BITFIELD (CpuNo64),
+  BITFIELD (CpuMPX),
 #ifdef CpuUnused
   BITFIELD (CpuUnused),
 #endif
@@ -410,6 +446,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (No_ldSuf),
   BITFIELD (FWait),
   BITFIELD (IsString),
+  BITFIELD (BNDPrefixOk),
   BITFIELD (IsLockable),
   BITFIELD (RegKludge),
   BITFIELD (FirstXmm0),
@@ -433,6 +470,14 @@ static bitfield opcode_modifiers[] =
   BITFIELD (VecSIB),
   BITFIELD (SSE2AVX),
   BITFIELD (NoAVX),
+  BITFIELD (EVex),
+  BITFIELD (Masking),
+  BITFIELD (VecESize),
+  BITFIELD (Broadcast),
+  BITFIELD (StaticRounding),
+  BITFIELD (SAE),
+  BITFIELD (Disp8MemShift),
+  BITFIELD (NoDefMask),
   BITFIELD (OldGcc),
   BITFIELD (ATTMnemonic),
   BITFIELD (ATTSyntax),
@@ -449,6 +494,8 @@ static bitfield operand_types[] =
   BITFIELD (RegMMX),
   BITFIELD (RegXMM),
   BITFIELD (RegYMM),
+  BITFIELD (RegZMM),
+  BITFIELD (RegMask),
   BITFIELD (Imm1),
   BITFIELD (Imm8),
   BITFIELD (Imm8S),
@@ -483,9 +530,12 @@ static bitfield operand_types[] =
   BITFIELD (Tbyte),
   BITFIELD (Xmmword),
   BITFIELD (Ymmword),
+  BITFIELD (Zmmword),
   BITFIELD (Unspecified),
   BITFIELD (Anysize),
   BITFIELD (Vec_Imm4),
+  BITFIELD (RegBND),
+  BITFIELD (Vec_Disp8),
 #ifdef OTUnused
   BITFIELD (OTUnused),
 #endif
@@ -517,7 +567,7 @@ static void
 process_copyright (FILE *fp)
 {
   fprintf (fp, "/* This file is automatically generated by i386-gen.  Do not edit!  */\n\
-/* Copyright 2007, 2008, 2009, 2010, 2011\n\
+/* Copyright 2007-2014\n\
    Free Software Foundation, Inc.\n\
 \n\
    This file is part of the GNU opcodes library.\n\
GDB Binutils - Deliverables
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