Enable Intel MOVDIRI, MOVDIR64B instructions.

[deliverable/binutils-gdb.git] / opcodes / i386-gen.c

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 025f00ab8cc9bc6eb886dbacb1fb126247527163..58828d09e694cf73893bef4ec708d543407fe7f7 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -88,7 +88,7 @@ static initializer cpu_flag_init[] =
   { "CPU_AMDFAM10_FLAGS",
     "CPU_K8_FLAGS|CpuFISTTP|CPU_SSE4A_FLAGS|CpuABM" },
   { "CPU_BDVER1_FLAGS",
-    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuFMA4|CpuXOP|CpuLWP|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
+    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_XOP_FLAGS|CpuABM|CpuLWP|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" },
   { "CPU_BDVER2_FLAGS",
     "CPU_BDVER1_FLAGS|CpuFMA|CpuBMI|CpuTBM|CpuF16C" },
   { "CPU_BDVER3_FLAGS",
@@ -96,11 +96,11 @@ static initializer cpu_flag_init[] =
   { "CPU_BDVER4_FLAGS",
     "CPU_BDVER3_FLAGS|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" },
   { "CPU_ZNVER1_FLAGS",
-    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_SSE4_2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
+    "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuRdtscp|CpuCX16|CPU_AVX2_FLAGS|CpuSSE4A|CpuABM|CpuSVME|CpuAES|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuFMA|CpuBMI|CpuF16C|CpuXsaveopt|CpuFSGSBase|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" },
   { "CPU_BTVER1_FLAGS",
     "CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuABM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" },
   { "CPU_BTVER2_FLAGS",
-    "CPU_BTVER1_FLAGS|CPU_SSE4_2_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" },
+    "CPU_BTVER1_FLAGS|CPU_AVX_FLAGS|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuMovbe|CpuXsaveopt|CpuPRFCHW" },
   { "CPU_8087_FLAGS",
     "Cpu8087" },
   { "CPU_287_FLAGS",
@@ -148,7 +148,7 @@ static initializer cpu_flag_init[] =
   { "CPU_XOP_FLAGS",
     "CPU_SSE4A_FLAGS|CPU_FMA4_FLAGS|CpuXOP" },
   { "CPU_LWP_FLAGS",
-    "CpuLWP" },
+    "CPU_XSAVE_FLAGS|CpuLWP" },
   { "CPU_BMI_FLAGS",
     "CpuBMI" },
   { "CPU_TBM_FLAGS",
@@ -192,7 +192,7 @@ static initializer cpu_flag_init[] =
   { "CPU_ABM_FLAGS",
     "CpuABM" },
   { "CPU_AVX_FLAGS",
-    "CPU_SSE4_2_FLAGS|CpuAVX" },
+    "CPU_SSE4_2_FLAGS|CPU_XSAVE_FLAGS|CpuAVX" },
   { "CPU_AVX2_FLAGS",
     "CPU_AVX_FLAGS|CpuAVX2" },
   { "CPU_AVX512F_FLAGS",
@@ -240,7 +240,7 @@ static initializer cpu_flag_init[] =
   { "CPU_SMAP_FLAGS",
     "CpuSMAP" },
   { "CPU_MPX_FLAGS",
-    "CpuMPX" },
+    "CPU_XSAVE_FLAGS|CpuMPX" },
   { "CPU_SHA_FLAGS",
     "CPU_SSE2_FLAGS|CpuSHA" },
   { "CPU_CLFLUSHOPT_FLAGS",
@@ -260,7 +260,7 @@ static initializer cpu_flag_init[] =
   { "CPU_MWAITX_FLAGS",
     "CpuMWAITX" },
   { "CPU_OSPKE_FLAGS",
-    "CpuOSPKE" },
+    "CPU_XSAVE_FLAGS|CpuOSPKE" },
   { "CPU_RDPID_FLAGS",
     "CpuRDPID" },
   { "CPU_PTWRITE_FLAGS",
@@ -283,6 +283,10 @@ static initializer cpu_flag_init[] =
     "CpuWAITPKG" },
   { "CPU_CLDEMOTE_FLAGS",
     "CpuCLDEMOTE" },
+  { "CPU_MOVDIRI_FLAGS",
+    "CpuMOVDIRI" },
+  { "CPU_MOVDIR64B_FLAGS",
+    "CpuMOVDIR64B" },
   { "CPU_ANY_X87_FLAGS",
     "CPU_ANY_287_FLAGS|Cpu8087" },
   { "CPU_ANY_287_FLAGS",
@@ -343,6 +347,10 @@ static initializer cpu_flag_init[] =
     "CpuAVX512_VNNI" },
   { "CPU_ANY_AVX512_BITALG_FLAGS",
     "CpuAVX512_BITALG" },
+  { "CPU_ANY_MOVDIRI_FLAGS",
+    "CpuMOVDIRI" },
+  { "CPU_ANY_MOVDIR64B_FLAGS",
+    "CpuMOVDIR64B" },
 };
 
 static const initializer operand_type_shorthands[] =
@@ -577,6 +585,13 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuPCONFIG),
   BITFIELD (CpuWAITPKG),
   BITFIELD (CpuCLDEMOTE),
+  BITFIELD (CpuMOVDIRI),
+  BITFIELD (CpuMOVDIR64B),
+  BITFIELD (CpuRegMMX),
+  BITFIELD (CpuRegXMM),
+  BITFIELD (CpuRegYMM),
+  BITFIELD (CpuRegZMM),
+  BITFIELD (CpuRegMask),
 #ifdef CpuUnused
   BITFIELD (CpuUnused),
 #endif
@@ -619,6 +634,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (ToDword),
   BITFIELD (ToQword),
   BITFIELD (AddrPrefixOp0),
+  BITFIELD (AddrPrefixOpReg),
   BITFIELD (IsPrefix),
   BITFIELD (ImmExt),
   BITFIELD (NoRex64),