"CpuSMX" },
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
+ { "CPU_AES_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
+ { "CPU_PCLMUL_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" },
+ { "CPU_FMA_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
"CpuABM" },
{ "CPU_SSE5_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"},
+ { "CPU_AVX_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
};
static initializer operand_type_init [] =
"RegMMX" },
{ "OPERAND_TYPE_REGXMM",
"RegXMM" },
+ { "OPERAND_TYPE_REGYMM",
+ "RegYMM" },
{ "OPERAND_TYPE_ESSEG",
"EsSeg" },
{ "OPERAND_TYPE_ACC32",
"Reg32|Acc|Dword" },
{ "OPERAND_TYPE_ACC64",
"Reg64|Acc|Qword" },
+ { "OPERAND_TYPE_INOUTPORTREG",
+ "InOutPortReg" },
{ "OPERAND_TYPE_REG16_INOUTPORTREG",
"Reg16|InOutPortReg" },
{ "OPERAND_TYPE_DISP16_32",
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
+ { "OPERAND_TYPE_VEX_IMM4",
+ "VEX_Imm4" },
};
typedef struct bitfield
BITFIELD (CpuSSSE3),
BITFIELD (CpuSSE4_1),
BITFIELD (CpuSSE4_2),
+ BITFIELD (CpuAVX),
BITFIELD (CpuSSE4a),
BITFIELD (CpuSSE5),
BITFIELD (Cpu3dnow),
BITFIELD (CpuVMX),
BITFIELD (CpuSMX),
BITFIELD (CpuABM),
- BITFIELD (CpuLM),
BITFIELD (CpuXsave),
+ BITFIELD (CpuAES),
+ BITFIELD (CpuPCLMUL),
+ BITFIELD (CpuFMA),
+ BITFIELD (CpuLM),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
#ifdef CpuUnused
BITFIELD (IsString),
BITFIELD (RegKludge),
BITFIELD (FirstXmm0),
+ BITFIELD (Implicit1stXmm0),
BITFIELD (ByteOkIntel),
BITFIELD (ToDword),
BITFIELD (ToQword),
BITFIELD (Drex),
BITFIELD (Drexv),
BITFIELD (Drexc),
+ BITFIELD (Vex),
+ BITFIELD (Vex256),
+ BITFIELD (VexNDD),
+ BITFIELD (VexNDS),
+ BITFIELD (VexW0),
+ BITFIELD (VexW1),
+ BITFIELD (Vex0F),
+ BITFIELD (Vex0F38),
+ BITFIELD (Vex0F3A),
+ BITFIELD (Vex3Sources),
+ BITFIELD (VexImmExt),
+ BITFIELD (SSE2AVX),
+ BITFIELD (NoAVX),
BITFIELD (OldGcc),
BITFIELD (ATTMnemonic),
BITFIELD (ATTSyntax),
BITFIELD (FloatReg),
BITFIELD (RegMMX),
BITFIELD (RegXMM),
+ BITFIELD (RegYMM),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Imm16),
BITFIELD (Qword),
BITFIELD (Tbyte),
BITFIELD (Xmmword),
+ BITFIELD (Ymmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
+ BITFIELD (Vex_Imm4),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
char buf[2048];
char *str, *p, *last;
char *reg_name, *reg_type, *reg_flags, *reg_num;
+ char *dw2_32_num, *dw2_64_num;
filename = "i386-reg.tbl";
fp = fopen (filename, "r");
/* Find reg_num. */
reg_num = next_field (str, ',', &str);
+ if (str >= last)
+ abort ();
+
fprintf (table, " { \"%s\",\n ", reg_name);
process_i386_operand_type (table, reg_type, 0, "\t");
- fprintf (table, ",\n %s, %s },\n", reg_flags, reg_num);
+ /* Find 32-bit Dwarf2 register number. */
+ dw2_32_num = next_field (str, ',', &str);
+
+ if (str >= last)
+ abort ();
+
+ /* Find 64-bit Dwarf2 register number. */
+ dw2_64_num = next_field (str, ',', &str);
+
+ fprintf (table, ",\n %s, %s, { %s, %s } },\n",
+ reg_flags, reg_num, dw2_32_num, dw2_64_num);
}
fclose (fp);