* output.cc (Output_segment::add_output_section): Remove front

[deliverable/binutils-gdb.git] / opcodes / i386-gen.c

diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 04413dc2146964f3c6cc8218efd39d51b7e3d38e..aa9a7ff61e98d6d69372da992157926536a366c2 100644 (file)
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -102,6 +102,16 @@ static initializer cpu_flag_init [] =
     "CpuSMX" },
   { "CPU_XSAVE_FLAGS",
     "CpuXsave" },
+  { "CPU_AES_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
+  { "CPU_PCLMUL_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuPCLMUL" },
+  { "CPU_FMA_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
+  { "CPU_MOVBE_FLAGS",
+    "CpuMovbe" },
+  { "CPU_EPT_FLAGS",
+    "CpuEPT" },
   { "CPU_3DNOW_FLAGS",
     "CpuMMX|Cpu3dnow" },
   { "CPU_3DNOWA_FLAGS",
@@ -116,6 +126,8 @@ static initializer cpu_flag_init [] =
     "CpuABM" },
   { "CPU_SSE5_FLAGS",
     "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuSSE5"},
+  { "CPU_AVX_FLAGS",
+    "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX" },
 };
 
 static initializer operand_type_init [] =
@@ -182,12 +194,16 @@ static initializer operand_type_init [] =
     "RegMMX" },
   { "OPERAND_TYPE_REGXMM",
     "RegXMM" },
+  { "OPERAND_TYPE_REGYMM",
+    "RegYMM" },
   { "OPERAND_TYPE_ESSEG",
     "EsSeg" },
   { "OPERAND_TYPE_ACC32",
     "Reg32|Acc|Dword" },
   { "OPERAND_TYPE_ACC64",
     "Reg64|Acc|Qword" },
+  { "OPERAND_TYPE_INOUTPORTREG",
+    "InOutPortReg" },
   { "OPERAND_TYPE_REG16_INOUTPORTREG",
     "Reg16|InOutPortReg" },
   { "OPERAND_TYPE_DISP16_32",
@@ -208,6 +224,8 @@ static initializer operand_type_init [] =
     "Imm32|Imm32S|Imm64|Disp32" },
   { "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
     "Imm32|Imm32S|Imm64|Disp32|Disp64" },
+  { "OPERAND_TYPE_VEX_IMM4",
+    "VEX_Imm4" },
 };
 
 typedef struct bitfield
@@ -237,6 +255,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuSSSE3),
   BITFIELD (CpuSSE4_1),
   BITFIELD (CpuSSE4_2),
+  BITFIELD (CpuAVX),
   BITFIELD (CpuSSE4a),
   BITFIELD (CpuSSE5),
   BITFIELD (Cpu3dnow),
@@ -246,8 +265,13 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuVMX),
   BITFIELD (CpuSMX),
   BITFIELD (CpuABM),
-  BITFIELD (CpuLM),
   BITFIELD (CpuXsave),
+  BITFIELD (CpuAES),
+  BITFIELD (CpuPCLMUL),
+  BITFIELD (CpuFMA),
+  BITFIELD (CpuLM),
+  BITFIELD (CpuMovbe),
+  BITFIELD (CpuEPT),
   BITFIELD (Cpu64),
   BITFIELD (CpuNo64),
 #ifdef CpuUnused
@@ -283,6 +307,7 @@ static bitfield opcode_modifiers[] =
   BITFIELD (IsString),
   BITFIELD (RegKludge),
   BITFIELD (FirstXmm0),
+  BITFIELD (Implicit1stXmm0),
   BITFIELD (ByteOkIntel),
   BITFIELD (ToDword),
   BITFIELD (ToQword),
@@ -295,6 +320,19 @@ static bitfield opcode_modifiers[] =
   BITFIELD (Drex),
   BITFIELD (Drexv),
   BITFIELD (Drexc),
+  BITFIELD (Vex),
+  BITFIELD (Vex256),
+  BITFIELD (VexNDD),
+  BITFIELD (VexNDS),
+  BITFIELD (VexW0),
+  BITFIELD (VexW1),
+  BITFIELD (Vex0F),
+  BITFIELD (Vex0F38),
+  BITFIELD (Vex0F3A),
+  BITFIELD (Vex3Sources),
+  BITFIELD (VexImmExt),
+  BITFIELD (SSE2AVX),
+  BITFIELD (NoAVX),
   BITFIELD (OldGcc),
   BITFIELD (ATTMnemonic),
   BITFIELD (ATTSyntax),
@@ -310,6 +348,7 @@ static bitfield operand_types[] =
   BITFIELD (FloatReg),
   BITFIELD (RegMMX),
   BITFIELD (RegXMM),
+  BITFIELD (RegYMM),
   BITFIELD (Imm8),
   BITFIELD (Imm8S),
   BITFIELD (Imm16),
@@ -343,8 +382,10 @@ static bitfield operand_types[] =
   BITFIELD (Qword),
   BITFIELD (Tbyte),
   BITFIELD (Xmmword),
+  BITFIELD (Ymmword),
   BITFIELD (Unspecified),
   BITFIELD (Anysize),
+  BITFIELD (Vex_Imm4),
 #ifdef OTUnused
   BITFIELD (OTUnused),
 #endif