/* Declarations for Intel 80386 opcode table
- Copyright (C) 2007-2018 Free Software Foundation, Inc.
+ Copyright (C) 2007-2019 Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
CpuAVX512_VNNI,
/* Intel AVX-512 BITALG Instructions support required. */
CpuAVX512_BITALG,
+ /* Intel AVX-512 BF16 Instructions support required. */
+ CpuAVX512_BF16,
/* mwaitx instruction required */
CpuMWAITX,
/* Clzero instruction required */
unsigned int cpuavx512_vbmi2:1;
unsigned int cpuavx512_vnni:1;
unsigned int cpuavx512_bitalg:1;
+ unsigned int cpuavx512_bf16:1;
unsigned int cpumwaitx:1;
unsigned int cpuclzero:1;
unsigned int cpuospke:1;
/* src/dest swap for floats. */
FloatR,
/* needs size prefix if in 32-bit mode */
- Size16,
+#define SIZE16 1
/* needs size prefix if in 16-bit mode */
- Size32,
+#define SIZE32 2
/* needs size prefix if in 64-bit mode */
- Size64,
+#define SIZE64 3
+ Size,
/* check register size. */
CheckRegSize,
/* instruction ignores operand size prefix and in Intel mode ignores
0: Set by the REX.W bit.
1: VEX.W0. Should always be 0.
2: VEX.W1. Should always be 1.
+ 3: VEX.WIG. The VEX.W bit is ignored.
*/
#define VEXW0 1
#define VEXW1 2
+#define VEXWIG 3
VexW,
/* VEX opcode prefix:
0: VEX 0x0F opcode prefix.
unsigned int jumpintersegment:1;
unsigned int floatmf:1;
unsigned int floatr:1;
- unsigned int size16:1;
- unsigned int size32:1;
- unsigned int size64:1;
+ unsigned int size:2;
unsigned int checkregsize:1;
unsigned int ignoresize:1;
unsigned int defaultsize:1;