2007-10-02 Carlos Eduardo Seo <cseo@linux.vnet.ibm.com>

[deliverable/binutils-gdb.git] / opcodes / i386-opc.h

diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 8a4f15b29427d840de81ff7ea2a3e115c09567fa..2f6e5b381b31d1ce8ec050d01e04b07593b02c50 100644 (file)
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -79,7 +79,7 @@
 /* SSE4.2 support required */
 #define CpuSSE4_2      (CpuSSE4_1 + 1)
 /* SSE5 support required */
-#define CpuSSE5         (CpuSSE4_2 + 1)
+#define CpuSSE5                (CpuSSE4_2 + 1)
 /* 64bit support available, used by -march= in assembler.  */
 #define CpuLM          (CpuSSE5 + 1)
 /* 64bit support required  */
@@ -202,11 +202,11 @@ typedef union i386_cpu_flags
 #define Rex64                  (NoRex64 + 1)
 /* deprecated fp insn, gets a warning */
 #define Ugh                    (Rex64 + 1)
-#define Drex                    (Ugh + 1)
+#define Drex                   (Ugh + 1)
 /* instruction needs DREX with multiple encodings for memory ops */
-#define Drexv                   (Drex + 1)
+#define Drexv                  (Drex + 1)
 /* special DREX for comparisons */
-#define Drexc                   (Drexv + 1)
+#define Drexc                  (Drexv + 1)
 /* The last bitfield in i386_opcode_modifier.  */
 #define Opcode_Modifier_Max    Drexc
 
@@ -416,6 +416,9 @@ typedef struct template
   unsigned int extension_opcode;
 #define None 0xffff            /* If no extension_opcode is possible.  */
 
+  /* Opcode length.  */
+  unsigned char opcode_length;
+
   /* cpu feature flags */
   i386_cpu_flags cpu_flags;
 
@@ -443,6 +446,11 @@ typedef struct
 #define RegRex     0x1  /* Extended register.  */
 #define RegRex64    0x2  /* Extended 8 bit register.  */
   unsigned int reg_num;
+#define RegRip ((unsigned int ) ~0)
+#define RegEip (RegRip - 1)
+/* EIZ and RIZ are fake index registers.  */
+#define RegEiz (RegEip - 1)
+#define RegRiz (RegEiz - 1)
 }
 reg_entry;