* gdb.texinfo (GDB/MI Simple Examples): Added 'disp' field to the

[deliverable/binutils-gdb.git] / opcodes / i386-reg.tbl

diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl
index 6aa89fc4d9479caa6f1399c917c21a9acff152fd..c88a9e06cfbf925479ac15db48d5b09da990ff14 100644 (file)
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -188,6 +188,23 @@ xmm12, RegXMM, RegRex, 4, Dw2Inval, 29
 xmm13, RegXMM, RegRex, 5, Dw2Inval, 30
 xmm14, RegXMM, RegRex, 6, Dw2Inval, 31
 xmm15, RegXMM, RegRex, 7, Dw2Inval, 32
+// AVX registers.
+ymm0, RegYMM, 0, 0, 53, 70
+ymm1, RegYMM, 0, 1, 54, 71
+ymm2, RegYMM, 0, 2, 55, 72
+ymm3, RegYMM, 0, 3, 56, 73
+ymm4, RegYMM, 0, 4, 57, 74
+ymm5, RegYMM, 0, 5, 58, 75
+ymm6, RegYMM, 0, 6, 59, 76
+ymm7, RegYMM, 0, 7, 60, 77
+ymm8, RegYMM, RegRex, 0, Dw2Inval, 78
+ymm9, RegYMM, RegRex, 1, Dw2Inval, 79
+ymm10, RegYMM, RegRex, 2, Dw2Inval, 80
+ymm11, RegYMM, RegRex, 3, Dw2Inval, 81
+ymm12, RegYMM, RegRex, 4, Dw2Inval, 82
+ymm13, RegYMM, RegRex, 5, Dw2Inval, 83
+ymm14, RegYMM, RegRex, 6, Dw2Inval, 84
+ymm15, RegYMM, RegRex, 7, Dw2Inval, 85
 // No type will make these registers rejected for all purposes except
 // for addressing.  This saves creating one extra type for RIP/EIP.
 rip, BaseIndex, RegRex64, RegRip, Dw2Inval, 16