arc: Change max instruction length to 64-bits

[deliverable/binutils-gdb.git] / opcodes / i860-dis.c

diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c
index d95c7e96f09ee94beb1ba45f958ddf17cd2f809c..547184f72edda4ee4d63a58688b2f87d77a9b731 100644 (file)
--- a/opcodes/i860-dis.c
+++ b/opcodes/i860-dis.c
@@ -1,22 +1,26 @@
 /* Disassembler for the i860.
-   Copyright 2000, 2003 Free Software Foundation, Inc.
+   Copyright (C) 2000-2016 Free Software Foundation, Inc.
 
    Contributed by Jason Eckhardt <jle@cygnus.com>.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+   This file is part of the GNU opcodes library.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   This library is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+#include "sysdep.h"
 #include "dis-asm.h"
 #include "opcode/i860.h"
 
@@ -24,14 +28,14 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 #define I860_REG_PREFIX "%"
 
 /* Integer register names (encoded as 0..31 in the instruction).  */
-static const char *const grnames[] = 
+static const char *const grnames[] =
  {"r0",  "r1",  "sp",  "fp",  "r4",  "r5",  "r6",  "r7",
   "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",
   "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
   "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"};
 
 /* FP register names (encoded as 0..31 in the instruction).  */
-static const char *const frnames[] = 
+static const char *const frnames[] =
  {"f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",
   "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",
   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
@@ -39,7 +43,7 @@ static const char *const frnames[] =
 
 /* Control/status register names (encoded as 0..11 in the instruction).
    Registers bear, ccr, p0, p1, p2 and p3 are XP only.  */
-static const char *const crnames[] = 
+static const char *const crnames[] =
  {"fir", "psr", "dirbase", "db", "fsr", "epsr", "bear", "ccr",
   "p0", "p1", "p2", "p3", "--", "--", "--", "--" };
 
@@ -73,10 +77,10 @@ print_br_address (disassemble_info *info, bfd_vma memaddr, long val)
 
   long adj = (long)memaddr + 4 + (val << 2);
 
-  (*info->fprintf_func) (info->stream, "0x%08x", adj);
-           
+  (*info->fprintf_func) (info->stream, "0x%08lx", adj);
+
   /* Attempt to obtain a symbol for the target address.  */
-       
+
   if (info->print_address_func && adj != 0)
     {
       (*info->fprintf_func) (info->stream, "\t// ");
@@ -130,7 +134,7 @@ print_insn_i860 (bfd_vma memaddr, disassemble_info *info)
       int val;
 
       /* If this a flop (or a shrd) and its dual bit is set,
-         prefix with 'd.'.  */         
+         prefix with 'd.'.  */
       if (((insn & 0xfc000000) == 0x48000000
            || (insn & 0xfc000000) == 0xb0000000)
           && (insn & 0x200))