/* ia64-opc-i.c -- IA-64 `I' opcode table.
- Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
+ Copyright 1998, 1999, 2000, 2002, 2005 Free Software Foundation, Inc.
Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
This file is part of GDB, GAS, and the GNU binutils.
You should have received a copy of the GNU General Public License
along with this file; see the file COPYING. If not, write to the
- Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+ 02110-1301, USA. */
#include "ia64-opc.h"
#define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3)
#define OpX3X6(a,b,c) (bOp (a) | bX3 (b) | bX6(c)), \
(mOp | mX3 | mX6)
+#define OpX3X6Yb(a,b,c,d) (bOp (a) | bX3 (b) | bX6(c) | bYb(d)), \
+ (mOp | mX3 | mX6 | mYb)
#define OpX3XbIhWh(a,b,c,d,e) \
(bOp (a) | bX3 (b) | bXb (c) | bIh (d) | bWh (e)), \
(mOp | mX3 | mXb | mIh | mWh)
(bOp (a) | bX3 (b) | bXb (c) | bIh (d) | bWh (e) | bTag13 (f)), \
(mOp | mX3 | mXb | mIh | mWh | mTag13)
+#define FULL17 ((ia64_insn)0x10ff001fc0LL)
+
/* Used to initialise unused fields in ia64_opcode struct,
in order to stop gcc from complaining. */
#define EMPTY 0,0,NULL
/* I-type instruction encodings (sorted according to major opcode). */
{"break.i", I0, OpX3X6 (0, 0, 0x00), {IMMU21}, X_IN_MLX, 0, NULL},
- {"nop.i", I0, OpX3X6 (0, 0, 0x01), {IMMU21}, X_IN_MLX, 0, NULL},
+ {"nop.i", I0, OpX3X6Yb (0, 0, 0x01, 0), {IMMU21}, X_IN_MLX, 0, NULL},
+ {"hint.i", I0, OpX3X6Yb (0, 0, 0x01, 1), {IMMU21}, X_IN_MLX, 0, NULL},
{"chk.s.i", I0, OpX3 (0, 1), {R2, TGT25b}, EMPTY},
{"mov", I, OpX3XbIhWhTag13 (0, 7, 0, 0, 1, 0), {B1, R2}, PSEUDO, 0, NULL},
#undef MOV
{"mov", I, OpX3X6 (0, 0, 0x31), {R1, B2}, EMPTY},
{"mov", I, OpX3 (0, 3), {PR, R2, IMM17}, EMPTY},
+ /* Don't remove one of the seemingly redundant FULL17-s. */
+ {"mov", I, FULL17 | OpX3 (0, 3) | FULL17, {PR, R2}, PSEUDO, 0, NULL},
{"mov", I, OpX3 (0, 2), {PR_ROT, IMM44}, EMPTY},
{"mov", I, OpX3X6 (0, 0, 0x30), {R1, IP}, EMPTY},
{"mov", I, OpX3X6 (0, 0, 0x33), {R1, PR}, EMPTY},
{"tbit.nz.or.andcm", TBIT (1, 1, 0, 1)},
{"tbit.z.and.orcm", TBITCM (1, 1, 0, 1)},
#undef TBIT
+#undef TBITCM
#define TNAT(a,b,c,d) \
I2, OpX2TaTbYaC (5, 0, a, b, c, d), {P1, P2, R3}, EMPTY
#define TNATCM(a,b,c,d) \
{"tnat.nz.or.andcm", TNAT (1, 1, 1, 1)},
{"tnat.z.and.orcm", TNATCM (1, 1, 1, 1)},
#undef TNAT
+#undef TNATCM
{"pmpyshr2", I, OpZaZbVeX2aX2b (7, 0, 1, 0, 0, 3), {R1, R2, R3, CNT2c}, EMPTY},
{"pmpyshr2.u", I, OpZaZbVeX2aX2b (7, 0, 1, 0, 0, 1), {R1, R2, R3, CNT2c}, EMPTY},