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* emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Do not emit
[deliverable/binutils-gdb.git] / opcodes / ia64-raw.tbl
diff --git a/opcodes/ia64-raw.tbl b/opcodes/ia64-raw.tbl
index 3b39e730a848757c1f03fd2031eeb01f9aa1126a..476721c510e9a6891c37dc31640fb7bd50201063 100644 (file)
--- a/opcodes/ia64-raw.tbl
+++ b/opcodes/ia64-raw.tbl
@@ -2,8 +2,14 @@ Resource Name; Writers;        Readers;        Semantics of Dependency
 ALAT;  chk.a.clr, IC:mem-readers-alat, IC:mem-writers, IC:invala-all;  IC:mem-readers-alat, IC:mem-writers, IC:chk-a, invala.e;        none
 AR[BSP];       br.call, brl.call, br.ret, cover, IC:mov-to-AR-BSPSTORE, rfi;   br.call, brl.call, br.ia, br.ret, cover, flushrs, loadrs, IC:mov-from-AR-BSP, rfi;      impliedF
 AR[BSPSTORE];  alloc, loadrs, flushrs, IC:mov-to-AR-BSPSTORE;  alloc, br.ia, flushrs, IC:mov-from-AR-BSPSTORE; impliedF
+AR[CFLG];      IC:mov-to-AR-CFLG;      br.ia, IC:mov-from-AR-CFLG;     impliedF
 AR[CCV];       IC:mov-to-AR-CCV;       br.ia, IC:cmpxchg, IC:mov-from-AR-CCV;  impliedF
+AR[CSD];       ld16, IC:mov-to-AR-CSD; br.ia, cmp8xchg16, IC:mov-from-AR-CSD, st16;    impliedF
 AR[EC];        IC:mod-sched-brs, br.ret, IC:mov-to-AR-EC;      br.call, brl.call, br.ia, IC:mod-sched-brs, IC:mov-from-AR-EC;  impliedF
+AR[EFLAG];     IC:mov-to-AR-EFLAG;     br.ia, IC:mov-from-AR-EFLAG;    impliedF
+AR[FCR];       IC:mov-to-AR-FCR;       br.ia, IC:mov-from-AR-FCR;      impliedF
+AR[FDR];       IC:mov-to-AR-FDR;       br.ia, IC:mov-from-AR-FDR;      impliedF
+AR[FIR];       IC:mov-to-AR-FIR;       br.ia, IC:mov-from-AR-FIR;      impliedF
 AR[FPSR].sf0.controls; IC:mov-to-AR-FPSR, fsetc.s0;    br.ia, IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0, fsetc, IC:mov-from-AR-FPSR;     impliedF
 AR[FPSR].sf1.controls; IC:mov-to-AR-FPSR, fsetc.s1;    br.ia, IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1, IC:mov-from-AR-FPSR;    impliedF
 AR[FPSR].sf2.controls; IC:mov-to-AR-FPSR, fsetc.s2;    br.ia, IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2, IC:mov-from-AR-FPSR;    impliedF
@@ -14,6 +20,7 @@ AR[FPSR].sf2.flags;   IC:fp-arith-s2, fclrf.s2, IC:fcmp-s2, IC:fpcmp-s2, IC:mov-to
 AR[FPSR].sf3.flags;    IC:fp-arith-s3, fclrf.s3, IC:fcmp-s3, IC:fpcmp-s3, IC:mov-to-AR-FPSR;   br.ia, fchkf.s3, IC:mov-from-AR-FPSR;   impliedF
 AR[FPSR].traps;        IC:mov-to-AR-FPSR;      br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR;    impliedF
 AR[FPSR].rv;   IC:mov-to-AR-FPSR;      br.ia, IC:fp-arith, fchkf, fcmp, fpcmp, IC:mov-from-AR-FPSR;    impliedF
+AR[FSR];       IC:mov-to-AR-FSR;       br.ia, IC:mov-from-AR-FSR;      impliedF
 AR[ITC];       IC:mov-to-AR-ITC;       br.ia, IC:mov-from-AR-ITC;      impliedF
 AR[K%], % in 0 - 7;    IC:mov-to-AR-K+1;       br.ia, IC:mov-from-AR-K+1;      impliedF
 AR[LC];        IC:mod-sched-brs-counted, IC:mov-to-AR-LC;      br.ia, IC:mod-sched-brs-counted, IC:mov-from-AR-LC;     impliedF
@@ -22,6 +29,7 @@ AR[PFS];      IC:mov-to-AR-PFS;       alloc, br.ia, epc, IC:mov-from-AR-PFS;  impliedF
 AR[PFS];       IC:mov-to-AR-PFS;       br.ret; none
 AR[RNAT];      alloc, flushrs, loadrs, IC:mov-to-AR-RNAT, IC:mov-to-AR-BSPSTORE;       alloc, br.ia, flushrs, loadrs, IC:mov-from-AR-RNAT;     impliedF
 AR[RSC];       IC:mov-to-AR-RSC;       alloc, br.ia, flushrs, loadrs, IC:mov-from-AR-RSC, IC:mov-from-AR-BSPSTORE, IC:mov-to-AR-RNAT, IC:mov-from-AR-RNAT, IC:mov-to-AR-BSPSTORE;      impliedF
+AR[SSD];       IC:mov-to-AR-SSD;       br.ia, IC:mov-from-AR-SSD;      impliedF
 AR[UNAT]{%}, % in 0 - 63;      IC:mov-to-AR-UNAT, st8.spill;   br.ia, ld8.fill, IC:mov-from-AR-UNAT;   impliedF
 AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111;     IC:none;        br.ia, IC:mov-from-AR-rv+1;     none
 AR%, % in 48-63, 112-127;      IC:mov-to-AR-ig+1;      br.ia, IC:mov-from-AR-ig+1;     impliedF
@@ -53,7 +61,7 @@ CR[IPSR];     IC:mov-to-CR-IPSR;      rfi;    implied
 CR[IRR%], % in 0 - 3;  IC:mov-from-CR-IVR;     IC:mov-from-CR-IRR+1;   data
 CR[ISR];       IC:mov-to-CR-ISR;       IC:mov-from-CR-ISR;     data
 CR[ITIR];      IC:mov-to-CR-ITIR;      IC:mov-from-CR-ITIR;    data
-CR[ITIR];      IC:mov-to-CR-ITIR;      itc.i, itc.d, itr.i, itc.d;     implied
+CR[ITIR];      IC:mov-to-CR-ITIR;      itc.i, itc.d, itr.i, itr.d;     implied
 CR[ITM];       IC:mov-to-CR-ITM;       IC:mov-from-CR-ITM;     data
 CR[ITV];       IC:mov-to-CR-ITV;       IC:mov-from-CR-ITV;     data
 CR[IVA];       IC:mov-to-CR-IVA;       IC:mov-from-CR-IVA;     instr
@@ -80,7 +88,7 @@ DTR;  ptr.d;  itr.d, itc.d;   impliedF
 FR%, % in 0 - 1;       IC:none;        IC:fr-readers+1;        none
 FR%, % in 2 - 127;     IC:fr-writers+1\IC:ldf-c+1\IC:ldfp-c+1; IC:fr-readers+1;        impliedF
 FR%, % in 2 - 127;     IC:ldf-c+1, IC:ldfp-c+1;        IC:fr-readers+1;        none
-GR0;   IC:none;        IC:gr-readers+1, IC:mov-immediate;      none
+GR0;   IC:none;        IC:gr-readers+1;        none
 GR%, % in 1 - 127;     IC:ld-c+1+13;   IC:gr-readers+1;        none
 GR%, % in 1 - 127;     IC:gr-writers+1\IC:ld-c+1+13;   IC:gr-readers+1;        impliedF
 IBR#;  IC:mov-to-IND-IBR+3;    IC:mov-from-IND-IBR+3;  impliedF
@@ -108,11 +116,14 @@ PKR#;     IC:mov-to-IND-PKR+3;    IC:mov-to-IND-PKR+3;    impliedF
 PMC#;  IC:mov-to-IND-PMC+3;    IC:mov-from-IND-PMC+3;  impliedF
 PMC#;  IC:mov-to-IND-PMC+3;    IC:mov-from-IND-PMD+3;  SC+3 Section 12.1.1
 PMD#;  IC:mov-to-IND-PMD+3;    IC:mov-from-IND-PMD+3;  impliedF
-PR0;   IC:pr-writers+1;        IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR+12, IC:mov-to-PR+12;  none
-PR%, % in 1 - 62;      IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;    IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR, IC:mov-to-PR+12; impliedF
-PR%, % in 1 - 62;      IC:pr-writers-fp+1;     IC:pr-readers-br+1;     impliedF
-PR%, % in 1 - 62;      IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;        IC:pr-readers-br+1;     none
-PR63;  IC:mod-sched-brs, IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;  IC:pr-readers-nobr-nomovpr+1 , IC:mov-from-PR, IC:mov-to-PR+12; impliedF
+PR0;   IC:pr-writers+1;        IC:pr-readers-br+1, IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR+12, IC:mov-to-PR+12;   none
+PR%, % in 1 - 15;      IC:pr-writers+1, IC:mov-to-PR-allreg+7; IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12;  impliedF
+PR%, % in 1 - 15;      IC:pr-writers-fp+1;     IC:pr-readers-br+1;     impliedF
+PR%, % in 1 - 15;      IC:pr-writers-int+1, IC:mov-to-PR-allreg+7;     IC:pr-readers-br+1;     none
+PR%, % in 16 - 62;     IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;    IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12;  impliedF
+PR%, % in 16 - 62;     IC:pr-writers-fp+1;     IC:pr-readers-br+1;     impliedF
+PR%, % in 16 - 62;     IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;        IC:pr-readers-br+1;     none
+PR63;  IC:mod-sched-brs, IC:pr-writers+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;  IC:pr-readers-nobr-nomovpr+1, IC:mov-from-PR, IC:mov-to-PR+12;  impliedF
 PR63;  IC:pr-writers-fp+1, IC:mod-sched-brs;   IC:pr-readers-br+1;     impliedF
 PR63;  IC:pr-writers-int+1, IC:mov-to-PR-allreg+7, IC:mov-to-PR-rotreg;        IC:pr-readers-br+1;     none
 PSR.ac;        IC:user-mask-writers-partial+7, IC:mov-to-PSR-um;       IC:mem-readers, IC:mem-writers; implied
GDB Binutils - Deliverables
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