/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-This file is used to generate m32r-asm.c.
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+- the resultant file is machine generated, cgen-asm.in isn't
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+along with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/* ??? Eventually more and more of this stuff can go to cpu-independent files.
+ Keep that in mind. */
#include "sysdep.h"
#include <ctype.h>
#include "ansidecl.h"
#include "bfd.h"
#include "symcat.h"
+#include "m32r-desc.h"
#include "m32r-opc.h"
#include "opintl.h"
-/* ??? The layout of this stuff is still work in progress.
- For speed in assembly/disassembly, we use inline functions. That of course
- will only work for GCC. When this stuff is finished, we can decide whether
- to keep the inline functions (and only get the performance increase when
- compiled with GCC), or switch to macros, or use something else.
-*/
+#undef min
+#define min(a,b) ((a) < (b) ? (a) : (b))
+#undef max
+#define max(a,b) ((a) > (b) ? (a) : (b))
-static const char * insert_normal
- PARAMS ((long, unsigned int, int, int, int, char *));
static const char * parse_insn_normal
- PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *));
-static const char * insert_insn_normal
- PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *));
+ PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
\f
/* -- assembler routines inserted here */
+
/* -- asm.c */
/* Handle '#' prefixes (i.e. skip over them). */
static const char *
-parse_hash (strp, opindex, valuep)
+parse_hash (cd, strp, opindex, valuep)
+ CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
/* Handle shigh(), high(). */
static const char *
-parse_hi16 (strp, opindex, valuep)
+parse_hi16 (cd, strp, opindex, valuep)
+ CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
+ bfd_vma value;
if (**strp == '#')
++*strp;
if (strncasecmp (*strp, "high(", 5) == 0)
{
*strp += 5;
- errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_ULO,
- &result_type, valuep);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
+ &result_type, &value);
if (**strp != ')')
return "missing `)'";
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- *valuep >>= 16;
+ value >>= 16;
+ *valuep = value;
return errmsg;
}
else if (strncasecmp (*strp, "shigh(", 6) == 0)
{
*strp += 6;
- errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_SLO,
- &result_type, valuep);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
+ &result_type, &value);
if (**strp != ')')
return "missing `)'";
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- *valuep = (*valuep >> 16) + ((*valuep) & 0x8000 ? 1 : 0);
+ value = (value >> 16) + (value & 0x8000 ? 1 : 0);
+ *valuep = value;
return errmsg;
}
- return cgen_parse_unsigned_integer (strp, opindex, valuep);
+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}
/* Handle low() in a signed context. Also handle sda().
handles the case where low() isn't present. */
static const char *
-parse_slo16 (strp, opindex, valuep)
+parse_slo16 (cd, strp, opindex, valuep)
+ CGEN_CPU_DESC cd;
const char **strp;
int opindex;
long *valuep;
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
+ bfd_vma value;
if (**strp == '#')
++*strp;
if (strncasecmp (*strp, "low(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16,
- &result_type, valuep);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
+ &result_type, &value);
if (**strp != ')')
return "missing `)'";
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- *valuep &= 0xffff;
+ value &= 0xffff;
+ *valuep = value;
return errmsg;
}
if (strncasecmp (*strp, "sda(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_SDA16, NULL, valuep);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
+ NULL, &value);
if (**strp != ')')
return "missing `)'";
++*strp;
+ *valuep = value;
return errmsg;
}
- return cgen_parse_signed_integer (strp, opindex, valuep);
+ return cgen_parse_signed_integer (cd, strp, opindex, valuep);
}
/* Handle low() in an unsigned context.
handles the case where low() isn't present. */
static const char *
-parse_ulo16 (strp, opindex, valuep)
+parse_ulo16 (cd, strp, opindex, valuep)
+ CGEN_CPU_DESC cd;
const char **strp;
int opindex;
unsigned long *valuep;
{
const char *errmsg;
enum cgen_parse_operand_result result_type;
+ bfd_vma value;
if (**strp == '#')
++*strp;
if (strncasecmp (*strp, "low(", 4) == 0)
{
*strp += 4;
- errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16,
- &result_type, valuep);
+ errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
+ &result_type, &value);
if (**strp != ')')
return "missing `)'";
++*strp;
if (errmsg == NULL
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
- *valuep &= 0xffff;
+ value &= 0xffff;
+ *valuep = value;
return errmsg;
}
- return cgen_parse_unsigned_integer (strp, opindex, valuep);
+ return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
}
/* -- */
*/
const char *
-m32r_cgen_parse_operand (opindex, strp, fields)
+m32r_cgen_parse_operand (cd, opindex, strp, fields)
+ CGEN_CPU_DESC cd;
int opindex;
const char ** strp;
CGEN_FIELDS * fields;
{
- const char * errmsg;
+ const char * errmsg = NULL;
+ /* Used by scalar operands that still need to be parsed. */
+ long junk;
switch (opindex)
{
- case M32R_OPERAND_SR :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
- break;
- case M32R_OPERAND_DR :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
- break;
- case M32R_OPERAND_SRC1 :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r1);
+ case M32R_OPERAND_ACC :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
break;
- case M32R_OPERAND_SRC2 :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, & fields->f_r2);
+ case M32R_OPERAND_ACCD :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
break;
- case M32R_OPERAND_SCR :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r2);
+ case M32R_OPERAND_ACCS :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
break;
case M32R_OPERAND_DCR :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, & fields->f_r1);
- break;
- case M32R_OPERAND_SIMM8 :
- errmsg = cgen_parse_signed_integer (strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
- break;
- case M32R_OPERAND_SIMM16 :
- errmsg = cgen_parse_signed_integer (strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
- break;
- case M32R_OPERAND_UIMM4 :
- errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
- break;
- case M32R_OPERAND_UIMM5 :
- errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
- break;
- case M32R_OPERAND_UIMM16 :
- errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
break;
-/* start-sanitize-m32rx */
- case M32R_OPERAND_IMM1 :
- errmsg = cgen_parse_unsigned_integer (strp, M32R_OPERAND_IMM1, &fields->f_imm1);
+ case M32R_OPERAND_DISP16 :
+ {
+ bfd_vma value;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
+ fields->f_disp16 = value;
+ }
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCD :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
+ case M32R_OPERAND_DISP24 :
+ {
+ bfd_vma value;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
+ fields->f_disp24 = value;
+ }
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCS :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
+ case M32R_OPERAND_DISP8 :
+ {
+ bfd_vma value;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
+ fields->f_disp8 = value;
+ }
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACC :
- errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
+ case M32R_OPERAND_DR :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
break;
-/* end-sanitize-m32rx */
case M32R_OPERAND_HASH :
- errmsg = parse_hash (strp, M32R_OPERAND_HASH, &fields->f_nil);
+ errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
break;
case M32R_OPERAND_HI16 :
- errmsg = parse_hi16 (strp, M32R_OPERAND_HI16, &fields->f_hi16);
+ errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
break;
- case M32R_OPERAND_SLO16 :
- errmsg = parse_slo16 (strp, M32R_OPERAND_SLO16, &fields->f_simm16);
- break;
- case M32R_OPERAND_ULO16 :
- errmsg = parse_ulo16 (strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
+ case M32R_OPERAND_IMM1 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
break;
- case M32R_OPERAND_UIMM24 :
- errmsg = cgen_parse_address (strp, M32R_OPERAND_UIMM24, 0, NULL, & fields->f_uimm24);
+ case M32R_OPERAND_SCR :
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
break;
- case M32R_OPERAND_DISP8 :
- errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP8, 0, NULL, & fields->f_disp8);
+ case M32R_OPERAND_SIMM16 :
+ errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
break;
- case M32R_OPERAND_DISP16 :
- errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP16, 0, NULL, & fields->f_disp16);
+ case M32R_OPERAND_SIMM8 :
+ errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
break;
- case M32R_OPERAND_DISP24 :
- errmsg = cgen_parse_address (strp, M32R_OPERAND_DISP24, 0, NULL, & fields->f_disp24);
+ case M32R_OPERAND_SLO16 :
+ errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
break;
-
- default :
- /* xgettext:c-format */
- fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
- abort ();
- }
-
- return errmsg;
-}
-
-/* Main entry point for operand insertion.
-
- This function is basically just a big switch statement. Earlier versions
- used tables to look up the function to use, but
- - if the table contains both assembler and disassembler functions then
- the disassembler contains much of the assembler and vice-versa,
- - there's a lot of inlining possibilities as things grow,
- - using a switch statement avoids the function call overhead.
-
- This function could be moved into `parse_insn_normal', but keeping it
- separate makes clear the interface between `parse_insn_normal' and each of
- the handlers. It's also needed by GAS to insert operands that couldn't be
- resolved during parsing.
-*/
-
-const char *
-m32r_cgen_insert_operand (opindex, fields, buffer)
- int opindex;
- CGEN_FIELDS * fields;
- char * buffer;
-{
- const char * errmsg;
-
- switch (opindex)
- {
case M32R_OPERAND_SR :
- errmsg = insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_DR :
- errmsg = insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
break;
case M32R_OPERAND_SRC1 :
- errmsg = insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
break;
case M32R_OPERAND_SRC2 :
- errmsg = insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_SCR :
- errmsg = insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_DCR :
- errmsg = insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_SIMM8 :
- errmsg = insert_normal (fields->f_simm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_SIMM16 :
- errmsg = insert_normal (fields->f_simm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_UIMM4 :
- errmsg = insert_normal (fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_UIMM5 :
- errmsg = insert_normal (fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
break;
case M32R_OPERAND_UIMM16 :
- errmsg = insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
break;
-/* start-sanitize-m32rx */
- case M32R_OPERAND_IMM1 :
+ case M32R_OPERAND_UIMM24 :
{
- long value = ((fields->f_imm1) - (1));
- errmsg = insert_normal (value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 15, 1, CGEN_FIELDS_BITSIZE (fields), buffer);
+ bfd_vma value;
+ errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
+ fields->f_uimm24 = value;
}
break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCD :
- errmsg = insert_normal (fields->f_accd, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACCS :
- errmsg = insert_normal (fields->f_accs, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
-/* end-sanitize-m32rx */
-/* start-sanitize-m32rx */
- case M32R_OPERAND_ACC :
- errmsg = insert_normal (fields->f_acc, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 1, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
-/* end-sanitize-m32rx */
- case M32R_OPERAND_HASH :
- errmsg = insert_normal (fields->f_nil, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_HI16 :
- errmsg = insert_normal (fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM4 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
break;
- case M32R_OPERAND_SLO16 :
- errmsg = insert_normal (fields->f_simm16, 0, 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
+ case M32R_OPERAND_UIMM5 :
+ errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
break;
case M32R_OPERAND_ULO16 :
- errmsg = insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_UIMM24 :
- errmsg = insert_normal (fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, CGEN_FIELDS_BITSIZE (fields), buffer);
- break;
- case M32R_OPERAND_DISP8 :
- {
- long value = ((fields->f_disp8) >> (2));
- errmsg = insert_normal (value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
- break;
- case M32R_OPERAND_DISP16 :
- {
- long value = ((fields->f_disp16) >> (2));
- errmsg = insert_normal (value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
- break;
- case M32R_OPERAND_DISP24 :
- {
- long value = ((fields->f_disp24) >> (2));
- errmsg = insert_normal (value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, CGEN_FIELDS_BITSIZE (fields), buffer);
- }
+ errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
break;
default :
/* xgettext:c-format */
- fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
- opindex);
+ fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
abort ();
}
return errmsg;
}
-cgen_parse_fn * m32r_cgen_parse_handlers[] =
+cgen_parse_fn * const m32r_cgen_parse_handlers[] =
{
- 0, /* default */
parse_insn_normal,
};
-cgen_insert_fn * m32r_cgen_insert_handlers[] =
-{
- 0, /* default */
- insert_insn_normal,
-};
-
void
-m32r_cgen_init_asm (mach, endian)
- int mach;
- enum cgen_endian endian;
+m32r_cgen_init_asm (cd)
+ CGEN_CPU_DESC cd;
{
- m32r_cgen_init_tables (mach);
- cgen_set_cpu (& m32r_cgen_opcode_table, mach, endian);
- cgen_asm_init ();
+ m32r_cgen_init_opcode_table (cd);
+ m32r_cgen_init_ibld_table (cd);
+ cd->parse_handlers = & m32r_cgen_parse_handlers[0];
+ cd->parse_operand = m32r_cgen_parse_operand;
}
-\f
-/* Default insertion routine.
-
- ATTRS is a mask of the boolean attributes.
- LENGTH is the length of VALUE in bits.
- TOTAL_LENGTH is the total length of the insn (currently 8,16,32).
-
- The result is an error message or NULL if success. */
-
-/* ??? This duplicates functionality with bfd's howto table and
- bfd_install_relocation. */
-/* ??? For architectures where insns can be representable as ints,
- store insn in `field' struct and add registers, etc. while parsing? */
-
-static const char *
-insert_normal (value, attrs, start, length, total_length, buffer)
- long value;
- unsigned int attrs;
- int start;
- int length;
- int total_length;
- char * buffer;
-{
- bfd_vma x;
- static char buf[100];
- /* Written this way to avoid undefined behaviour.
- Yes, `long' will be bfd_vma but not yet. */
- long mask = (((1L << (length - 1)) - 1) << 1) | 1;
-
- /* If LENGTH is zero, this operand doesn't contribute to the value. */
- if (length == 0)
- return NULL;
-
- /* Ensure VALUE will fit. */
- if ((attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED)) != 0)
- {
- unsigned long max = mask;
- if ((unsigned long) value > max)
- {
- /* xgettext:c-format */
- sprintf (buf, _("operand out of range (%lu not between 0 and %lu)"),
- value, max);
- return buf;
- }
- }
- else
- {
- long min = - (1L << (length - 1));
- long max = (1L << (length - 1)) - 1;
- if (value < min || value > max)
- {
- sprintf
- /* xgettext:c-format */
- (buf, _("operand out of range (%ld not between %ld and %ld)"),
- value, min, max);
- return buf;
- }
- }
-
-#if 0 /*def CGEN_INT_INSN*/
- *buffer |= (value & mask) << (total_length - (start + length));
-#else
- switch (total_length)
- {
- case 8:
- x = * (unsigned char *) buffer;
- break;
- case 16:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- x = bfd_getb16 (buffer);
- else
- x = bfd_getl16 (buffer);
- break;
- case 32:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- x = bfd_getb32 (buffer);
- else
- x = bfd_getl32 (buffer);
- break;
- default :
- abort ();
- }
-
- x |= (value & mask) << (total_length - (start + length));
-
- switch (total_length)
- {
- case 8:
- * buffer = value;
- break;
- case 16:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- bfd_putb16 (x, buffer);
- else
- bfd_putl16 (x, buffer);
- break;
- case 32:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- bfd_putb32 (x, buffer);
- else
- bfd_putl32 (x, buffer);
- break;
- default :
- abort ();
- }
-#endif
-
- return NULL;
-}
\f
/* Default insn parser.
*/
static const char *
-parse_insn_normal (insn, strp, fields)
- const CGEN_INSN * insn;
- const char ** strp;
- CGEN_FIELDS * fields;
+parse_insn_normal (cd, insn, strp, fields)
+ CGEN_CPU_DESC cd;
+ const CGEN_INSN *insn;
+ const char **strp;
+ CGEN_FIELDS *fields;
{
- const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
- const char * str = *strp;
- const char * errmsg;
- const char * p;
+ /* ??? Runtime added insns not handled yet. */
+ const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
+ const char *str = *strp;
+ const char *errmsg;
+ const char *p;
const unsigned char * syn;
#ifdef CGEN_MNEMONIC_OPERANDS
+ /* FIXME: wip */
int past_opcode_p;
#endif
/* For now we assume the mnemonic is first (there are no leading operands).
- We can parse it without needing to set up operand parsing. */
+ We can parse it without needing to set up operand parsing.
+ GAS's input scrubber will ensure mnemonics are lowercase, but we may
+ not be called from GAS. */
p = CGEN_INSN_MNEMONIC (insn);
- while (* p && * p == * str)
- ++ p, ++ str;
-
- if (* p || (* str && !isspace (* str)))
+ while (*p && tolower (*p) == tolower (*str))
+ ++p, ++str;
+
+ if (* p)
return _("unrecognized instruction");
- CGEN_INIT_PARSE ();
- cgen_init_parse_operand ();
+#ifndef CGEN_MNEMONIC_OPERANDS
+ if (* str && !isspace (* str))
+ return _("unrecognized instruction");
+#endif
+
+ CGEN_INIT_PARSE (cd);
+ cgen_init_parse_operand (cd);
#ifdef CGEN_MNEMONIC_OPERANDS
past_opcode_p = 0;
#endif
/* We don't check for (*str != '\0') here because we want to parse
any trailing fake arguments in the syntax string. */
- syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
+ syn = CGEN_SYNTAX_STRING (syntax);
/* Mnemonics come first for now, ensure valid string. */
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
while (* syn != 0)
{
/* Non operand chars must match exactly. */
- /* FIXME: Need to better handle whitespace. */
if (CGEN_SYNTAX_CHAR_P (* syn))
{
+ /* FIXME: While we allow for non-GAS callers above, we assume the
+ first char after the mnemonic part is a space. */
+ /* FIXME: We also take inappropriate advantage of the fact that
+ GAS's input scrubber will remove extraneous blanks. */
if (*str == CGEN_SYNTAX_CHAR (* syn))
{
#ifdef CGEN_MNEMONIC_OPERANDS
}
/* We have an operand of some sort. */
- errmsg = m32r_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn),
- &str, fields);
+ errmsg = m32r_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
+ &str, fields);
if (errmsg)
return errmsg;
}
/* We couldn't parse it. */
- return "unrecognized instruction";
-}
-
-/* Default insn builder (insert handler).
- The instruction is recorded in target byte order.
- The result is an error message or NULL if success. */
-/* FIXME: change buffer to char *? */
-
-static const char *
-insert_insn_normal (insn, fields, buffer)
- const CGEN_INSN * insn;
- CGEN_FIELDS * fields;
- cgen_insn_t * buffer;
-{
- const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
- bfd_vma value;
- const unsigned char * syn;
-
- CGEN_INIT_INSERT ();
- value = CGEN_INSN_VALUE (insn);
-
- /* If we're recording insns as numbers (rather than a string of bytes),
- target byte order handling is deferred until later. */
-#undef min
-#define min(a,b) ((a) < (b) ? (a) : (b))
-#if 0 /*def CGEN_INT_INSN*/
- *buffer = value;
-#else
- switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields)))
- {
- case 8:
- * buffer = value;
- break;
- case 16:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- bfd_putb16 (value, (char *) buffer);
- else
- bfd_putl16 (value, (char *) buffer);
- break;
- case 32:
- if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
- bfd_putb32 (value, (char *) buffer);
- else
- bfd_putl32 (value, (char *) buffer);
- break;
- default:
- abort ();
- }
-#endif
-
- /* ??? Rather than scanning the syntax string again, we could store
- in `fields' a null terminated list of the fields that are present. */
-
- for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
- {
- const char *errmsg;
-
- if (CGEN_SYNTAX_CHAR_P (* syn))
- continue;
-
- errmsg = m32r_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields,
- (char *) buffer);
- if (errmsg)
- return errmsg;
- }
-
- return NULL;
+ return _("unrecognized instruction");
}
\f
/* Main entry point.
This routine is called for each instruction to be assembled.
STR points to the insn to be assembled.
We assume all necessary tables have been initialized.
- The assembled instruction, less any fixups, is stored in buf.
- [??? What byte order?]
+ The assembled instruction, less any fixups, is stored in BUF.
+ Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
+ still needs to be converted to target byte order, otherwise BUF is an array
+ of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
or NULL if an error occured (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
- this function recurses. */
+ this function recurses.
+
+ ??? It's possible to make this cpu-independent.
+ One would have to deal with a few minor things.
+ At this point in time doing so would be more of a curiosity than useful
+ [for example this file isn't _that_ big], but keeping the possibility in
+ mind helps keep the design clean. */
const CGEN_INSN *
-m32r_cgen_assemble_insn (str, fields, buf, errmsg)
- const char * str;
- CGEN_FIELDS * fields;
- cgen_insn_t * buf;
- char ** errmsg;
+m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
+ CGEN_CPU_DESC cd;
+ const char *str;
+ CGEN_FIELDS *fields;
+ CGEN_INSN_BYTES_PTR buf;
+ char **errmsg;
{
- const char * start;
- CGEN_INSN_LIST * ilist;
+ const char *start;
+ CGEN_INSN_LIST *ilist;
+ const char *tmp_errmsg;
/* Skip leading white space. */
while (isspace (* str))
/* The instructions are stored in hashed lists.
Get the first in the list. */
- ilist = CGEN_ASM_LOOKUP_INSN (str);
+ ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
/* Keep looking until we find a match. */
{
const CGEN_INSN *insn = ilist->insn;
-#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+ /* not usually needed as unsupported opcodes shouldn't be in the hash lists */
/* Is this insn supported by the selected cpu? */
- if (! m32r_cgen_insn_supported (insn))
+ if (! m32r_cgen_insn_supported (cd, insn))
continue;
#endif
-#if 1 /* FIXME: wip */
/* If the RELAX attribute is set, this is an insn that shouldn't be
chosen immediately. Instead, it is used during assembler/linker
relaxation if possible. */
- if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
+ if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
continue;
-#endif
str = start;
- /* Record a default length for the insn. This will get set to the
- correct value while parsing. */
- /* FIXME: wip */
+ /* Allow parse/insert handlers to obtain length of insn. */
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
- if (! CGEN_PARSE_FN (insn) (insn, & str, fields))
+ if (!(tmp_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields)))
{
- if (CGEN_INSERT_FN (insn) (insn, fields, buf) != NULL)
+ /* ??? 0 is passed for `pc' */
+ if (CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, (bfd_vma) 0)
+ != NULL)
continue;
/* It is up to the caller to actually output the insn and any
queued relocs. */
/* Try the next entry. */
}
- /* FIXME: We can return a better error message than this.
- Need to track why it failed and pick the right one. */
{
- static char errbuf[100];
+ static char errbuf[150];
+
+#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
+ /* if verbose error messages, use errmsg from CGEN_PARSE_FN */
+ if (strlen (start) > 50)
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
+ else
+ /* xgettext:c-format */
+ sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
+#else
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
else
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s'"), start);
+#endif
*errmsg = errbuf;
return NULL;
FIXME: Not currently used. */
void
-m32r_cgen_asm_hash_keywords (opvals)
- CGEN_KEYWORD * opvals;
+m32r_cgen_asm_hash_keywords (cd, opvals)
+ CGEN_CPU_DESC cd;
+ CGEN_KEYWORD *opvals;
{
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
const CGEN_KEYWORD_ENTRY * ke;
if (! m32r_cgen_opval_supported (ke))
continue;
#endif
- cgen_asm_record_register (ke->name, ke->value);
+ cgen_asm_record_register (cd, ke->name, ke->value);
}
}
projects / deliverable / binutils-gdb.git / blobdiff