* gas/testsuite/arm/thumbv6.d (setend): Remove stray tab at end

[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c

diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 8b3477c2eac95985b48bf24c3e9501b4a31d9df1..87c33f04cd3e00da91d5fc55b5a858ed8eba4bc6 100644 (file)
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -4,7 +4,7 @@
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 - the resultant file is machine generated, cgen-asm.in isn't
 
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2004 Free Software Foundation, Inc.
 
 This file is part of the GNU Binutils and GDB, the GNU debugger.
 
@@ -43,7 +43,7 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
 #define max(a,b) ((a) > (b) ? (a) : (b))
 
 static const char * parse_insn_normal
-     PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
+  (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
 \f
 /* -- assembler routines inserted here.  */
 
@@ -111,7 +111,10 @@ parse_hi16 (cd, strp, opindex, valuep)
       ++*strp;
       if (errmsg == NULL
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-       value = (value >> 16) + (value & 0x8000 ? 1 : 0);
+        {
+          value = value + (value & 0x8000 ? 0x10000 : 0);
+          value >>= 16;
+        }
       *valuep = value;
       return errmsg;
     }
@@ -147,7 +150,11 @@ parse_slo16 (cd, strp, opindex, valuep)
       ++*strp;
       if (errmsg == NULL
          && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
-       value &= 0xffff;
+        {
+         value &= 0xffff;
+          if (value & 0x8000)
+             value |= 0xffff0000;
+        }
       *valuep = value;
       return errmsg;
     }
@@ -219,8 +226,7 @@ const char * m32r_cgen_parse_operand
 
    This function could be moved into `parse_insn_normal', but keeping it
    separate makes clear the interface between `parse_insn_normal' and each of
-   the handlers.
-*/
+   the handlers.  */
 
 const char *
 m32r_cgen_parse_operand (cd, opindex, strp, fields)
@@ -311,12 +317,18 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields)
         fields->f_uimm24 = value;
       }
       break;
+    case M32R_OPERAND_UIMM3 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3);
+      break;
     case M32R_OPERAND_UIMM4 :
       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
       break;
     case M32R_OPERAND_UIMM5 :
       errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
       break;
+    case M32R_OPERAND_UIMM8 :
+      errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8);
+      break;
     case M32R_OPERAND_ULO16 :
       errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
       break;
@@ -359,8 +371,7 @@ m32r_cgen_init_asm (cd)
    Returns NULL for success, an error message for failure.  */
 
 char * 
-m32r_cgen_build_insn_regex (insn)
-     CGEN_INSN *insn;
+m32r_cgen_build_insn_regex (CGEN_INSN *insn)
 {  
   CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
   const char *mnem = CGEN_INSN_MNEMONIC (insn);
@@ -483,11 +494,10 @@ m32r_cgen_build_insn_regex (insn)
    Returns NULL for success, an error message for failure.  */
 
 static const char *
-parse_insn_normal (cd, insn, strp, fields)
-     CGEN_CPU_DESC cd;
-     const CGEN_INSN *insn;
-     const char **strp;
-     CGEN_FIELDS *fields;
+parse_insn_normal (CGEN_CPU_DESC cd,
+                  const CGEN_INSN *insn,
+                  const char **strp,
+                  CGEN_FIELDS *fields)
 {
   /* ??? Runtime added insns not handled yet.  */
   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
@@ -574,7 +584,7 @@ parse_insn_normal (cd, insn, strp, fields)
        }
 
       /* We have an operand of some sort.  */
-      errmsg = m32r_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
+      errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
                                          &str, fields);
       if (errmsg)
        return errmsg;
@@ -625,12 +635,11 @@ parse_insn_normal (cd, insn, strp, fields)
    mind helps keep the design clean.  */
 
 const CGEN_INSN *
-m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
-     CGEN_CPU_DESC cd;
-     const char *str;
-     CGEN_FIELDS *fields;
-     CGEN_INSN_BYTES_PTR buf;
-     char **errmsg;
+m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
+                          const char *str,
+                          CGEN_FIELDS *fields,
+                          CGEN_INSN_BYTES_PTR buf,
+                          char **errmsg)
 {
   const char *start;
   CGEN_INSN_LIST *ilist;
@@ -660,10 +669,10 @@ m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
       if (! m32r_cgen_insn_supported (cd, insn))
        continue;
 #endif
-      /* If the RELAX attribute is set, this is an insn that shouldn't be
+      /* If the RELAXED attribute is set, this is an insn that shouldn't be
         chosen immediately.  Instead, it is used during assembler/linker
         relaxation if possible.  */
-      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
+      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
        continue;
 
       str = start;
@@ -734,9 +743,7 @@ m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg)
    FIXME: Not currently used.  */
 
 void
-m32r_cgen_asm_hash_keywords (cd, opvals)
-     CGEN_CPU_DESC cd;
-     CGEN_KEYWORD *opvals;
+m32r_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
 {
   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
   const CGEN_KEYWORD_ENTRY * ke;