/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-- the resultant file is machine generated, cgen-dis.in isn't
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-dis.in isn't
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007,
+ 2008, 2010 Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of libopcodes.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+ This library is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
#include "dis-asm.h"
#include "bfd.h"
#include "symcat.h"
+#include "libiberty.h"
#include "m32r-desc.h"
#include "m32r-opc.h"
#include "opintl.h"
#define UNKNOWN_INSN_MSG _("*unknown*")
static void print_normal
- PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
+ (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
static void print_address
- PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
+ (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
static void print_keyword
- PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
+ (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
static void print_insn_normal
- PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
- bfd_vma, int));
-static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma,
- disassemble_info *, char *, int));
+ (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
+static int print_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
static int default_print_insn
- PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
+static int read_insn
+ (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
+ unsigned long *);
\f
-/* -- disassembler routines inserted here */
+/* -- disassembler routines inserted here. */
/* -- dis.c */
-
/* Immediate values are prefixed with '#'. */
-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-do { \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
- (*info->fprintf_func) (info->stream, "#"); \
-} while (0)
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
+ do \
+ { \
+ if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
+ (*info->fprintf_func) (info->stream, "#"); \
+ } \
+ while (0)
/* Handle '#' prefixes as operands. */
static void
-print_hash (cd, dis_info, value, attrs, pc, length)
- CGEN_CPU_DESC cd;
- PTR dis_info;
- long value;
- unsigned int attrs;
- bfd_vma pc;
- int length;
+print_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value ATTRIBUTE_UNUSED,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
+
(*info->fprintf_func) (info->stream, "#");
}
-#undef CGEN_PRINT_INSN
+#undef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN my_print_insn
static int
-my_print_insn (cd, pc, info)
- CGEN_CPU_DESC cd;
- bfd_vma pc;
- disassemble_info *info;
+my_print_insn (CGEN_CPU_DESC cd,
+ bfd_vma pc,
+ disassemble_info *info)
{
- char buffer[CGEN_MAX_INSN_SIZE];
- char *buf = buffer;
+ bfd_byte buffer[CGEN_MAX_INSN_SIZE];
+ bfd_byte *buf = buffer;
int status;
int buflen = (pc & 3) == 0 ? 4 : 2;
+ int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
+ bfd_byte *x;
/* Read the base part of the insn. */
- status = (*info->read_memory_func) (pc, buf, buflen, info);
+ status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0),
+ buf, buflen, info);
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
}
/* 32 bit insn? */
- if ((pc & 3) == 0 && (buf[0] & 0x80) != 0)
+ x = (big_p ? &buf[0] : &buf[3]);
+ if ((pc & 3) == 0 && (*x & 0x80) != 0)
return print_insn (cd, pc, info, buf, buflen);
/* Print the first insn. */
if ((pc & 3) == 0)
{
+ buf += (big_p ? 0 : 2);
if (print_insn (cd, pc, info, buf, 2) == 0)
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
- buf += 2;
+ buf += (big_p ? 2 : -2);
}
- if (buf[0] & 0x80)
+ x = (big_p ? &buf[0] : &buf[1]);
+ if (*x & 0x80)
{
/* Parallel. */
(*info->fprintf_func) (info->stream, " || ");
- buf[0] &= 0x7f;
+ *x &= 0x7f;
}
else
(*info->fprintf_func) (info->stream, " -> ");
/* -- */
+void m32r_cgen_print_operand
+ (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
+
/* Main entry point for printing operands.
XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
of dis-asm.h on cgen.h.
This function could be moved into `print_insn_normal', but keeping it
separate makes clear the interface between `print_insn_normal' and each of
- the handlers.
-*/
+ the handlers. */
void
-m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
- CGEN_CPU_DESC cd;
- int opindex;
- PTR xinfo;
- CGEN_FIELDS *fields;
- void const *attrs;
- bfd_vma pc;
- int length;
+m32r_cgen_print_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ void * xinfo,
+ CGEN_FIELDS *fields,
+ void const *attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ int length)
{
- disassemble_info *info = (disassemble_info *) xinfo;
+ disassemble_info *info = (disassemble_info *) xinfo;
switch (opindex)
{
case M32R_OPERAND_UIMM24 :
print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
break;
+ case M32R_OPERAND_UIMM3 :
+ print_normal (cd, info, fields->f_uimm3, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
case M32R_OPERAND_UIMM4 :
print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
break;
case M32R_OPERAND_UIMM5 :
print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
break;
+ case M32R_OPERAND_UIMM8 :
+ print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+ break;
case M32R_OPERAND_ULO16 :
print_normal (cd, info, fields->f_uimm16, 0, pc, length);
break;
void
-m32r_cgen_init_dis (cd)
- CGEN_CPU_DESC cd;
+m32r_cgen_init_dis (CGEN_CPU_DESC cd)
{
m32r_cgen_init_opcode_table (cd);
m32r_cgen_init_ibld_table (cd);
/* Default print handler. */
static void
-print_normal (cd, dis_info, value, attrs, pc, length)
-#ifdef CGEN_PRINT_NORMAL
- CGEN_CPU_DESC cd;
-#else
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
-#endif
- PTR dis_info;
- long value;
- unsigned int attrs;
-#ifdef CGEN_PRINT_NORMAL
- bfd_vma pc;
- int length;
-#else
- bfd_vma pc ATTRIBUTE_UNUSED;
- int length ATTRIBUTE_UNUSED;
-#endif
+print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ long value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
/* Default address handler. */
static void
-print_address (cd, dis_info, value, attrs, pc, length)
-#ifdef CGEN_PRINT_NORMAL
- CGEN_CPU_DESC cd;
-#else
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
-#endif
- PTR dis_info;
- bfd_vma value;
- unsigned int attrs;
-#ifdef CGEN_PRINT_NORMAL
- bfd_vma pc;
- int length;
-#else
- bfd_vma pc ATTRIBUTE_UNUSED;
- int length ATTRIBUTE_UNUSED;
-#endif
+print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ bfd_vma value,
+ unsigned int attrs,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
- ; /* nothing to do */
+ ; /* Nothing to do. */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
/* Keyword print handler. */
static void
-print_keyword (cd, dis_info, keyword_table, value, attrs)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- PTR dis_info;
- CGEN_KEYWORD *keyword_table;
- long value;
- unsigned int attrs ATTRIBUTE_UNUSED;
+print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void *dis_info,
+ CGEN_KEYWORD *keyword_table,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
const CGEN_KEYWORD_ENTRY *ke;
\f
/* Default insn printer.
- DIS_INFO is defined as `PTR' so the disassembler needn't know anything
+ DIS_INFO is defined as `void *' so the disassembler needn't know anything
about disassemble_info. */
static void
-print_insn_normal (cd, dis_info, insn, fields, pc, length)
- CGEN_CPU_DESC cd;
- PTR dis_info;
- const CGEN_INSN *insn;
- CGEN_FIELDS *fields;
- bfd_vma pc;
- int length;
+print_insn_normal (CGEN_CPU_DESC cd,
+ void *dis_info,
+ const CGEN_INSN *insn,
+ CGEN_FIELDS *fields,
+ bfd_vma pc,
+ int length)
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
disassemble_info *info = (disassemble_info *) dis_info;
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
the extract info.
Returns 0 if all is well, non-zero otherwise. */
+
static int
-read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
- CGEN_CPU_DESC cd;
- bfd_vma pc;
- disassemble_info *info;
- char *buf;
- int buflen;
- CGEN_EXTRACT_INFO *ex_info;
- unsigned long *insn_value;
+read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ int buflen,
+ CGEN_EXTRACT_INFO *ex_info,
+ unsigned long *insn_value)
{
int status = (*info->read_memory_func) (pc, buf, buflen, info);
+
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
been called). */
static int
-print_insn (cd, pc, info, buf, buflen)
- CGEN_CPU_DESC cd;
- bfd_vma pc;
- disassemble_info *info;
- char *buf;
- int buflen;
+print_insn (CGEN_CPU_DESC cd,
+ bfd_vma pc,
+ disassemble_info *info,
+ bfd_byte *buf,
+ unsigned int buflen)
{
CGEN_INSN_INT insn_value;
const CGEN_INSN_LIST *insn_list;
CGEN_EXTRACT_INFO ex_info;
+ int basesize;
/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
- insn_value = cgen_get_insn_value (cd, buf, buflen * 8);
+ basesize = cd->base_insn_bitsize < buflen * 8 ?
+ cd->base_insn_bitsize : buflen * 8;
+ insn_value = cgen_get_insn_value (cd, buf, basesize);
+
/* Fill in ex_info fields like read_insn would. Don't actually call
read_insn, since the incoming buffer is already read (and possibly
/* The instructions are stored in hash lists.
Pick the first one and keep trying until we find the right one. */
- insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
+ insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
while (insn_list != NULL)
{
const CGEN_INSN *insn = insn_list->insn;
unsigned long insn_value_cropped;
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
- /* not needed as insn shouldn't be in hash lists if not supported */
+ /* Not needed as insn shouldn't be in hash lists if not supported. */
/* Supported by this cpu? */
if (! m32r_cgen_insn_supported (cd, insn))
{
/* Base size may exceed this instruction's size. Extract the
relevant part from the buffer. */
- if ((CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
- (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
info->endian == BFD_ENDIAN_BIG);
else
/* Make sure the entire insn is loaded into insn_value, if it
can fit. */
- if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize &&
- (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+ if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
+ (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
{
unsigned long full_insn_value;
int rc = read_insn (cd, pc, info, buf,
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
- /* length < 0 -> error */
+ /* Length < 0 -> error. */
if (length < 0)
return length;
if (length > 0)
{
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
- /* length is in bits, result is in bytes */
+ /* Length is in bits, result is in bytes. */
return length / 8;
}
}
#endif
static int
-default_print_insn (cd, pc, info)
- CGEN_CPU_DESC cd;
- bfd_vma pc;
- disassemble_info *info;
+default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
{
- char buf[CGEN_MAX_INSN_SIZE];
+ bfd_byte buf[CGEN_MAX_INSN_SIZE];
int buflen;
int status;
Print one instruction from PC on INFO->STREAM.
Return the size of the instruction (in bytes). */
+typedef struct cpu_desc_list
+{
+ struct cpu_desc_list *next;
+ CGEN_BITSET *isa;
+ int mach;
+ int endian;
+ CGEN_CPU_DESC cd;
+} cpu_desc_list;
+
int
-print_insn_m32r (pc, info)
- bfd_vma pc;
- disassemble_info *info;
+print_insn_m32r (bfd_vma pc, disassemble_info *info)
{
+ static cpu_desc_list *cd_list = 0;
+ cpu_desc_list *cl = 0;
static CGEN_CPU_DESC cd = 0;
- static int prev_isa;
+ static CGEN_BITSET *prev_isa;
static int prev_mach;
static int prev_endian;
int length;
- int isa,mach;
+ CGEN_BITSET *isa;
+ int mach;
int endian = (info->endian == BFD_ENDIAN_BIG
? CGEN_ENDIAN_BIG
: CGEN_ENDIAN_LITTLE);
#endif
#ifdef CGEN_COMPUTE_ISA
- isa = CGEN_COMPUTE_ISA (info);
+ {
+ static CGEN_BITSET *permanent_isa;
+
+ if (!permanent_isa)
+ permanent_isa = cgen_bitset_create (MAX_ISAS);
+ isa = permanent_isa;
+ cgen_bitset_clear (isa);
+ cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
+ }
#else
- isa = 0;
+ isa = info->insn_sets;
#endif
- /* If we've switched cpu's, close the current table and open a new one. */
+ /* If we've switched cpu's, try to find a handle we've used before */
if (cd
- && (isa != prev_isa
+ && (cgen_bitset_compare (isa, prev_isa) != 0
|| mach != prev_mach
|| endian != prev_endian))
{
- m32r_cgen_cpu_close (cd);
cd = 0;
- }
+ for (cl = cd_list; cl; cl = cl->next)
+ {
+ if (cgen_bitset_compare (cl->isa, isa) == 0 &&
+ cl->mach == mach &&
+ cl->endian == endian)
+ {
+ cd = cl->cd;
+ prev_isa = cd->isas;
+ break;
+ }
+ }
+ }
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
abort ();
mach_name = arch_type->printable_name;
- prev_isa = isa;
+ prev_isa = cgen_bitset_copy (isa);
prev_mach = mach;
prev_endian = endian;
cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
CGEN_CPU_OPEN_END);
if (!cd)
abort ();
+
+ /* Save this away for future reference. */
+ cl = xmalloc (sizeof (struct cpu_desc_list));
+ cl->cd = cd;
+ cl->isa = prev_isa;
+ cl->mach = mach;
+ cl->endian = endian;
+ cl->next = cd_list;
+ cd_list = cl;
+
m32r_cgen_init_dis (cd);
}