THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
- the resultant file is machine generated, cgen-ibld.in isn't
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of the GNU Binutils and GDB, the GNU debugger.
Keep that in mind. */
#include "sysdep.h"
-#include <ctype.h>
#include <stdio.h>
#include "ansidecl.h"
#include "dis-asm.h"
static int extract_insn_normal
PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma));
+static void put_insn_int_value
+ PARAMS ((CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT));
+const char * m32r_cgen_insert_operand
+ PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
+int m32r_cgen_extract_operand
+ PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma));
+int m32r_cgen_get_int_operand
+ PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
+bfd_vma m32r_cgen_get_vma_operand
+ PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
+void m32r_cgen_set_int_operand
+ PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int));
+void m32r_cgen_set_vma_operand
+ PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma));
\f
/* Operand insertion. */
int shift;
int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
- switch (word_length)
- {
- case 8:
- x = *bufp;
- break;
- case 16:
- if (big_p)
- x = bfd_getb16 (bufp);
- else
- x = bfd_getl16 (bufp);
- break;
- case 24:
- /* ??? This may need reworking as these cases don't necessarily
- want the first byte and the last two bytes handled like this. */
- if (big_p)
- x = (bufp[0] << 16) | bfd_getb16 (bufp + 1);
- else
- x = bfd_getl16 (bufp) | (bufp[2] << 16);
- break;
- case 32:
- if (big_p)
- x = bfd_getb32 (bufp);
- else
- x = bfd_getl32 (bufp);
- break;
- default :
- abort ();
- }
+ x = bfd_get_bits (bufp, word_length, big_p);
/* Written this way to avoid undefined behaviour. */
mask = (((1L << (length - 1)) - 1) << 1) | 1;
shift = (word_length - (start + length));
x = (x & ~(mask << shift)) | ((value & mask) << shift);
- switch (word_length)
- {
- case 8:
- *bufp = x;
- break;
- case 16:
- if (big_p)
- bfd_putb16 (x, bufp);
- else
- bfd_putl16 (x, bufp);
- break;
- case 24:
- /* ??? This may need reworking as these cases don't necessarily
- want the first byte and the last two bytes handled like this. */
- if (big_p)
- {
- bufp[0] = x >> 16;
- bfd_putb16 (x, bufp + 1);
- }
- else
- {
- bfd_putl16 (x, bufp);
- bufp[2] = x >> 16;
- }
- break;
- case 32:
- if (big_p)
- bfd_putb32 (x, bufp);
- else
- bfd_putl32 (x, bufp);
- break;
- default :
- abort ();
- }
+ bfd_put_bits ((bfd_vma) x, bufp, word_length, big_p);
}
#endif /* ! CGEN_INT_INSN_P */
if (length == 0)
return NULL;
+#if 0
if (CGEN_INT_INSN_P
&& word_offset != 0)
abort ();
+#endif
if (word_length > 32)
abort ();
}
/* Ensure VALUE will fit. */
- if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
{
+ long minval = - (1L << (length - 1));
unsigned long maxval = mask;
+
+ if ((value > 0 && (unsigned long) value > maxval)
+ || value < minval)
+ {
+ /* xgettext:c-format */
+ sprintf (errbuf,
+ _("operand out of range (%ld not between %ld and %lu)"),
+ value, minval, maxval);
+ return errbuf;
+ }
+ }
+ else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
+ {
+ unsigned long maxval = mask;
+
if ((unsigned long) value > maxval)
{
/* xgettext:c-format */
}
else
{
- long minval = - (1L << (length - 1));
- long maxval = (1L << (length - 1)) - 1;
- if (value < minval || value > maxval)
+ if (! cgen_signed_overflow_ok_p (cd))
{
- sprintf
- /* xgettext:c-format */
- (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
- value, minval, maxval);
- return errbuf;
+ long minval = - (1L << (length - 1));
+ long maxval = (1L << (length - 1)) - 1;
+
+ if (value < minval || value > maxval)
+ {
+ sprintf
+ /* xgettext:c-format */
+ (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
+ value, minval, maxval);
+ return errbuf;
+ }
}
}
int shift;
if (CGEN_INSN_LSB0_P)
- shift = (start + 1) - length;
+ shift = (word_offset + start + 1) - length;
else
- shift = word_length - (start + length);
+ shift = total_length - (word_offset + start + length);
*buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
}
}
/* Default insn builder (insert handler).
- The instruction is recorded in CGEN_INT_INSN_P byte order
- (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is
- recorded in host byte order, otherwise BUFFER is an array of bytes and the
- value is recorded in target byte order).
+ The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
+ that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
+ recorded in host byte order, otherwise BUFFER is an array of bytes
+ and the value is recorded in target byte order).
The result is an error message or NULL if success. */
static const char *
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
unsigned long value;
- const unsigned char * syn;
+ const CGEN_SYNTAX_CHAR_TYPE * syn;
CGEN_INIT_INSERT (cd);
value = CGEN_INSN_BASE_VALUE (insn);
#if CGEN_INT_INSN_P
- *buffer = value;
+ put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
+ CGEN_FIELDS_BITSIZE (fields), value);
#else
e.g. storing a branch displacement that got resolved later.
Needs more thought first. */
- for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
+ for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
{
const char *errmsg;
return NULL;
}
+
+/* Cover function to store an insn value into an integral insn. Must go here
+ because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
+
+static void
+put_insn_int_value (cd, buf, length, insn_length, value)
+ CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
+ CGEN_INSN_BYTES_PTR buf;
+ int length;
+ int insn_length;
+ CGEN_INSN_INT value;
+{
+ /* For architectures with insns smaller than the base-insn-bitsize,
+ length may be too big. */
+ if (length > insn_length)
+ *buf = value;
+ else
+ {
+ int shift = insn_length - length;
+ /* Written this way to avoid undefined behaviour. */
+ CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
+ *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
+ }
+}
\f
/* Operand extraction. */
unsigned char *bufp;
bfd_vma pc;
{
- unsigned long x,mask;
+ unsigned long x;
int shift;
int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
- switch (word_length)
- {
- case 8:
- x = *bufp;
- break;
- case 16:
- if (big_p)
- x = bfd_getb16 (bufp);
- else
- x = bfd_getl16 (bufp);
- break;
- case 24:
- /* ??? This may need reworking as these cases don't necessarily
- want the first byte and the last two bytes handled like this. */
- if (big_p)
- x = (bufp[0] << 16) | bfd_getb16 (bufp + 1);
- else
- x = bfd_getl16 (bufp) | (bufp[2] << 16);
- break;
- case 32:
- if (big_p)
- x = bfd_getb32 (bufp);
- else
- x = bfd_getl32 (bufp);
- break;
- default :
- abort ();
- }
+ x = bfd_get_bits (bufp, word_length, big_p);
- /* Written this way to avoid undefined behaviour. */
- mask = (((1L << (length - 1)) - 1) << 1) | 1;
if (CGEN_INSN_LSB0_P)
shift = (start + 1) - length;
else
shift = (word_length - (start + length));
- return (x >> shift) & mask;
+ return x >> shift;
}
#endif /* ! CGEN_INT_INSN_P */
extract_normal (cd, ex_info, insn_value, attrs, word_offset, start, length,
word_length, total_length, pc, valuep)
CGEN_CPU_DESC cd;
+#if ! CGEN_INT_INSN_P
CGEN_EXTRACT_INFO *ex_info;
+#else
+ CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED;
+#endif
CGEN_INSN_INT insn_value;
unsigned int attrs;
unsigned int word_offset, start, length, word_length, total_length;
+#if ! CGEN_INT_INSN_P
bfd_vma pc;
+#else
+ bfd_vma pc ATTRIBUTE_UNUSED;
+#endif
long *valuep;
{
- CGEN_INSN_INT value;
+ long value, mask;
/* If LENGTH is zero, this operand doesn't contribute to the value
so give it a standard value of zero. */
return 1;
}
+#if 0
if (CGEN_INT_INSN_P
&& word_offset != 0)
abort ();
+#endif
if (word_length > 32)
abort ();
word_length = total_length;
}
- /* Does the value reside in INSN_VALUE? */
+ /* Does the value reside in INSN_VALUE, and at the right alignment? */
- if (word_offset == 0)
+ if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
{
- /* Written this way to avoid undefined behaviour. */
- CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
-
if (CGEN_INSN_LSB0_P)
- value = insn_value >> ((start + 1) - length);
+ value = insn_value >> ((word_offset + start + 1) - length);
else
- value = insn_value >> (word_length - (start + length));
- value &= mask;
- /* sign extend? */
- if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
- && (value & (1L << (length - 1))))
- value |= ~mask;
+ value = insn_value >> (total_length - ( word_offset + start + length));
}
#if ! CGEN_INT_INSN_P
#endif /* ! CGEN_INT_INSN_P */
+ /* Written this way to avoid undefined behaviour. */
+ mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
+ value &= mask;
+ /* sign extend? */
+ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
+ && (value & (1L << (length - 1))))
+ value |= ~mask;
+
*valuep = value;
return 1;
bfd_vma pc;
{
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
- const unsigned char *syn;
+ const CGEN_SYNTAX_CHAR_TYPE *syn;
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
CGEN_INSN_BYTES_PTR buffer;
bfd_vma pc;
{
- const char * errmsg;
+ const char * errmsg = NULL;
unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ errmsg = insert_normal (cd, fields->f_acc, 0, 0, 8, 1, 32, total_length, buffer);
+ break;
+ case M32R_OPERAND_ACCD :
+ errmsg = insert_normal (cd, fields->f_accd, 0, 0, 4, 2, 32, total_length, buffer);
+ break;
+ case M32R_OPERAND_ACCS :
+ errmsg = insert_normal (cd, fields->f_accs, 0, 0, 12, 2, 32, total_length, buffer);
+ break;
case M32R_OPERAND_DCR :
errmsg = insert_normal (cd, fields->f_r1, 0, 0, 4, 4, 32, total_length, buffer);
break;
errmsg = insert_normal (cd, fields->f_r1, 0, 0, 4, 4, 32, total_length, buffer);
break;
case M32R_OPERAND_HASH :
- errmsg = insert_normal (cd, fields->f_nil, 0, 0, 0, 0, 0, total_length, buffer);
break;
case M32R_OPERAND_HI16 :
errmsg = insert_normal (cd, fields->f_hi16, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, buffer);
break;
+ case M32R_OPERAND_IMM1 :
+ {
+ long value = fields->f_imm1;
+ value = ((value) - (1));
+ errmsg = insert_normal (cd, value, 0, 0, 15, 1, 32, total_length, buffer);
+ }
+ break;
case M32R_OPERAND_SCR :
errmsg = insert_normal (cd, fields->f_r2, 0, 0, 12, 4, 32, total_length, buffer);
break;
}
/* Main entry point for operand extraction.
+ The result is <= 0 for error, >0 for success.
+ ??? Actual values aren't well defined right now.
This function is basically just a big switch statement. Earlier versions
used tables to look up the function to use, but
CGEN_FIELDS * fields;
bfd_vma pc;
{
- int length;
+ /* Assume success (for those operands that are nops). */
+ int length = 1;
unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_acc);
+ break;
+ case M32R_OPERAND_ACCD :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 2, 32, total_length, pc, & fields->f_accd);
+ break;
+ case M32R_OPERAND_ACCS :
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 2, 32, total_length, pc, & fields->f_accs);
+ break;
case M32R_OPERAND_DCR :
length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_r1);
break;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_r1);
break;
case M32R_OPERAND_HASH :
- length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 0, 0, total_length, pc, & fields->f_nil);
break;
case M32R_OPERAND_HI16 :
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT), 0, 16, 16, 32, total_length, pc, & fields->f_hi16);
break;
+ case M32R_OPERAND_IMM1 :
+ {
+ long value;
+ length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & value);
+ value = ((value) + (1));
+ fields->f_imm1 = value;
+ }
+ break;
case M32R_OPERAND_SCR :
length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_r2);
break;
int
m32r_cgen_get_int_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd;
+ CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
int opindex;
const CGEN_FIELDS * fields;
{
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ value = fields->f_acc;
+ break;
+ case M32R_OPERAND_ACCD :
+ value = fields->f_accd;
+ break;
+ case M32R_OPERAND_ACCS :
+ value = fields->f_accs;
+ break;
case M32R_OPERAND_DCR :
value = fields->f_r1;
break;
value = fields->f_r1;
break;
case M32R_OPERAND_HASH :
- value = fields->f_nil;
+ value = 0;
break;
case M32R_OPERAND_HI16 :
value = fields->f_hi16;
break;
+ case M32R_OPERAND_IMM1 :
+ value = fields->f_imm1;
+ break;
case M32R_OPERAND_SCR :
value = fields->f_r2;
break;
bfd_vma
m32r_cgen_get_vma_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd;
+ CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
int opindex;
const CGEN_FIELDS * fields;
{
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ value = fields->f_acc;
+ break;
+ case M32R_OPERAND_ACCD :
+ value = fields->f_accd;
+ break;
+ case M32R_OPERAND_ACCS :
+ value = fields->f_accs;
+ break;
case M32R_OPERAND_DCR :
value = fields->f_r1;
break;
value = fields->f_r1;
break;
case M32R_OPERAND_HASH :
- value = fields->f_nil;
+ value = 0;
break;
case M32R_OPERAND_HI16 :
value = fields->f_hi16;
break;
+ case M32R_OPERAND_IMM1 :
+ value = fields->f_imm1;
+ break;
case M32R_OPERAND_SCR :
value = fields->f_r2;
break;
void
m32r_cgen_set_int_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd;
+ CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
int opindex;
CGEN_FIELDS * fields;
int value;
{
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ fields->f_acc = value;
+ break;
+ case M32R_OPERAND_ACCD :
+ fields->f_accd = value;
+ break;
+ case M32R_OPERAND_ACCS :
+ fields->f_accs = value;
+ break;
case M32R_OPERAND_DCR :
fields->f_r1 = value;
break;
fields->f_r1 = value;
break;
case M32R_OPERAND_HASH :
- fields->f_nil = value;
break;
case M32R_OPERAND_HI16 :
fields->f_hi16 = value;
break;
+ case M32R_OPERAND_IMM1 :
+ fields->f_imm1 = value;
+ break;
case M32R_OPERAND_SCR :
fields->f_r2 = value;
break;
void
m32r_cgen_set_vma_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd;
+ CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
int opindex;
CGEN_FIELDS * fields;
bfd_vma value;
{
switch (opindex)
{
+ case M32R_OPERAND_ACC :
+ fields->f_acc = value;
+ break;
+ case M32R_OPERAND_ACCD :
+ fields->f_accd = value;
+ break;
+ case M32R_OPERAND_ACCS :
+ fields->f_accs = value;
+ break;
case M32R_OPERAND_DCR :
fields->f_r1 = value;
break;
fields->f_r1 = value;
break;
case M32R_OPERAND_HASH :
- fields->f_nil = value;
break;
case M32R_OPERAND_HI16 :
fields->f_hi16 = value;
break;
+ case M32R_OPERAND_IMM1 :
+ fields->f_imm1 = value;
+ break;
case M32R_OPERAND_SCR :
fields->f_r2 = value;
break;