/* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
- Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
+ Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+ Written by Stephane Carrez (stcarrez@nerim.fr)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
#include "opcode/m68hc11.h"
#include "dis-asm.h"
+#define PC_REGNUM 3
+
static const char *const reg_name[] = {
"X", "Y", "SP", "PC"
};
static int read_memory
PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
static int print_indexed_operand
- PARAMS ((bfd_vma, struct disassemble_info *, int));
+ PARAMS ((bfd_vma, struct disassemble_info *, int*, int, int, bfd_vma));
static int print_insn
PARAMS ((bfd_vma, struct disassemble_info *, int));
/* Read the 68HC12 indexed operand byte and print the corresponding mode.
Returns the number of bytes read or -1 if failure. */
static int
-print_indexed_operand (memaddr, info, mov_insn)
+print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
bfd_vma memaddr;
struct disassemble_info *info;
+ int *indirect;
int mov_insn;
+ int pc_offset;
+ bfd_vma endaddr;
{
bfd_byte buffer[4];
int reg;
short sval;
int pos = 1;
+ if (indirect)
+ *indirect = 0;
+
status = read_memory (memaddr, &buffer[0], 1, info);
if (status != 0)
{
sval = (buffer[0] & 0x1f);
if (sval & 0x10)
sval |= 0xfff0;
+ /* 68HC12 requires an adjustment for movb/movw pc relative modes. */
+ if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
+ sval += pc_offset;
(*info->fprintf_func) (info->stream, "%d,%s",
(int) sval, reg_name[reg]);
+
+ if (reg == PC_REGNUM)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ (* info->print_address_func) (endaddr + sval, info);
+ (* info->fprintf_func) (info->stream, "}");
+ }
}
/* Auto pre/post increment/decrement. */
sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
(*info->fprintf_func) (info->stream, "[%u,%s]",
sval & 0x0ffff, reg_name[reg]);
+ if (indirect)
+ *indirect = 1;
}
+
+ /* n,r with 9 and 16 bit signed constant. */
else if ((buffer[0] & 0x4) == 0)
{
if (mov_insn)
sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
sval &= 0x0FFFF;
pos += 2;
+ endaddr += 2;
}
else
{
if (buffer[0] & 0x01)
sval |= 0xff00;
pos++;
+ endaddr++;
}
(*info->fprintf_func) (info->stream, "%d,%s",
(int) sval, reg_name[reg]);
+ if (reg == PC_REGNUM)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ (* info->print_address_func) (endaddr + sval, info);
+ (* info->fprintf_func) (info->stream, "}");
+ }
}
else
{
case 3:
default:
(*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
+ if (indirect)
+ *indirect = 1;
break;
}
}
for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
{
int offset;
+ int pc_src_offset;
+ int pc_dst_offset;
if ((opcode->arch & arch) == 0)
continue;
/* This movb/movw is special (see above). */
offset = -offset;
+ pc_dst_offset = 2;
if (format & M6811_OP_IMM8)
{
(*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
format &= ~M6811_OP_IMM8;
+ /* Set PC destination offset. */
+ pc_dst_offset = 1;
}
else if (format & M6811_OP_IX)
{
}
}
+#define M6812_DST_MOVE (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
#define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
/* Analyze the 68HC12 indexed byte. */
if (format & M6812_INDEXED_FLAGS)
{
- status = print_indexed_operand (memaddr + pos, info, 0);
+ int indirect;
+ bfd_vma endaddr;
+
+ endaddr = memaddr + pos + 1;
+ if (format & M6811_OP_IND16)
+ endaddr += 2;
+ pc_src_offset = -1;
+ pc_dst_offset = 1;
+ status = print_indexed_operand (memaddr + pos, info, &indirect,
+ (format & M6812_DST_MOVE),
+ pc_src_offset, endaddr);
if (status < 0)
{
return status;
}
pos += status;
+
+ /* The indirect addressing mode of the call instruction does
+ not need the page code. */
+ if ((format & M6812_OP_PAGE) && indirect)
+ format &= ~M6812_OP_PAGE;
}
/* 68HC12 dbcc/ibcc/tbcc operands. */
reg_dst_table[(buffer[0] & 7)]);
}
+ if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
+ {
+ int val;
+ bfd_vma addr;
+ unsigned page = 0;
+
+ status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
+ if (status != 0)
+ {
+ return status;
+ }
+ if (format & M6812_OP_IDX_P2)
+ offset = -2;
+ else
+ offset = 0;
+ pos += 2;
+
+ val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
+ val &= 0x0FFFF;
+ addr = val;
+ pc_dst_offset = 2;
+ if (format & M6812_OP_PAGE)
+ {
+ status = read_memory (memaddr + pos + offset, buffer, 1, info);
+ if (status != 0)
+ return status;
+
+ page = (unsigned) buffer[0];
+ if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
+ addr = ((val - M68HC12_BANK_BASE)
+ | (page << M68HC12_BANK_SHIFT))
+ + M68HC12_BANK_VIRT;
+ }
+ else if ((arch & cpu6812)
+ && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
+ {
+ int cur_page;
+ bfd_vma vaddr;
+
+ if (memaddr >= M68HC12_BANK_VIRT)
+ cur_page = ((memaddr - M68HC12_BANK_VIRT)
+ >> M68HC12_BANK_SHIFT);
+ else
+ cur_page = 0;
+
+ vaddr = ((addr - M68HC12_BANK_BASE)
+ + (cur_page << M68HC12_BANK_SHIFT))
+ + M68HC12_BANK_VIRT;
+ if (!info->symbol_at_address_func (addr, info)
+ && info->symbol_at_address_func (vaddr, info))
+ addr = vaddr;
+ }
+ if (format & M6811_OP_IMM16)
+ {
+ format &= ~M6811_OP_IMM16;
+ (*info->fprintf_func) (info->stream, "#");
+ }
+ else
+ format &= ~M6811_OP_IND16;
+
+ (*info->print_address_func) (addr, info);
+ if (format & M6812_OP_PAGE)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ (* info->print_address_func) (val, info);
+ (* info->fprintf_func) (info->stream, ", %d}", page);
+ format &= ~M6812_OP_PAGE;
+ pos += 1;
+ }
+ }
+
+ if (format & M6812_OP_IDX_P2)
+ {
+ (*info->fprintf_func) (info->stream, ", ");
+ status = print_indexed_operand (memaddr + pos + offset, info,
+ 0, 1, pc_dst_offset,
+ memaddr + pos + offset + 1);
+ if (status < 0)
+ return status;
+ pos += status;
+ }
+
+ if (format & M6812_OP_IND16_P2)
+ {
+ int val;
+
+ (*info->fprintf_func) (info->stream, ", ");
+
+ status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
+ if (status != 0)
+ {
+ return status;
+ }
+ pos += 2;
+
+ val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
+ val &= 0x0FFFF;
+ (*info->print_address_func) (val, info);
+ }
+
/* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
and in that order. The brset/brclr insn have a bitmask and then
a relative branch offset. */
(*info->print_address_func) (memaddr + pos + val, info);
format &= ~M6812_OP_JUMP_REL16;
}
- if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
- {
- int val;
-
- status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
- if (status != 0)
- {
- return status;
- }
- if (format & M6812_OP_IDX_P2)
- offset = -2;
- else
- offset = 0;
- pos += 2;
-
- val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
- val &= 0x0FFFF;
- if (format & M6811_OP_IMM16)
- {
- format &= ~M6811_OP_IMM16;
- (*info->fprintf_func) (info->stream, "#");
- }
- else
- format &= ~M6811_OP_IND16;
-
- (*info->print_address_func) (val, info);
- }
-
- if (format & M6812_OP_IDX_P2)
- {
- (*info->fprintf_func) (info->stream, ", ");
- status = print_indexed_operand (memaddr + pos + offset, info, 1);
- if (status < 0)
- return status;
- pos += status;
- }
- if (format & M6812_OP_IND16_P2)
+ if (format & M6812_OP_PAGE)
{
int val;
- (*info->fprintf_func) (info->stream, ", ");
-
- status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
+ status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
if (status != 0)
{
return status;
}
- pos += 2;
+ pos += 1;
- val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
- val &= 0x0FFFF;
- (*info->print_address_func) (val, info);
+ val = buffer[0] & 0x0ff;
+ (*info->fprintf_func) (info->stream, ", %d", val);
}
-
+
#ifdef DEBUG
/* Consistency check. 'format' must be 0, so that we have handled
all formats; and the computed size of the insn must match the