#include "opcode/m68hc11.h"
#include "dis-asm.h"
+#define PC_REGNUM 3
+
static const char *const reg_name[] = {
"X", "Y", "SP", "PC"
};
static int read_memory
PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
static int print_indexed_operand
- PARAMS ((bfd_vma, struct disassemble_info *, int*, int));
+ PARAMS ((bfd_vma, struct disassemble_info *, int*, int, int, bfd_vma));
static int print_insn
PARAMS ((bfd_vma, struct disassemble_info *, int));
/* Read the 68HC12 indexed operand byte and print the corresponding mode.
Returns the number of bytes read or -1 if failure. */
static int
-print_indexed_operand (memaddr, info, indirect, mov_insn)
+print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
bfd_vma memaddr;
struct disassemble_info *info;
int *indirect;
int mov_insn;
+ int pc_offset;
+ bfd_vma endaddr;
{
bfd_byte buffer[4];
int reg;
sval = (buffer[0] & 0x1f);
if (sval & 0x10)
sval |= 0xfff0;
+ /* 68HC12 requires an adjustment for movb/movw pc relative modes. */
+ if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
+ sval += pc_offset;
(*info->fprintf_func) (info->stream, "%d,%s",
(int) sval, reg_name[reg]);
+
+ if (reg == PC_REGNUM)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ (* info->print_address_func) (endaddr + sval, info);
+ (* info->fprintf_func) (info->stream, "}");
+ }
}
/* Auto pre/post increment/decrement. */
if (indirect)
*indirect = 1;
}
+
+ /* n,r with 9 and 16 bit signed constant. */
else if ((buffer[0] & 0x4) == 0)
{
if (mov_insn)
sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
sval &= 0x0FFFF;
pos += 2;
+ endaddr += 2;
}
else
{
if (buffer[0] & 0x01)
sval |= 0xff00;
pos++;
+ endaddr++;
}
(*info->fprintf_func) (info->stream, "%d,%s",
(int) sval, reg_name[reg]);
+ if (reg == PC_REGNUM)
+ {
+ (* info->fprintf_func) (info->stream, " {");
+ (* info->print_address_func) (endaddr + sval, info);
+ (* info->fprintf_func) (info->stream, "}");
+ }
}
else
{
for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
{
int offset;
+ int pc_src_offset;
+ int pc_dst_offset;
if ((opcode->arch & arch) == 0)
continue;
/* This movb/movw is special (see above). */
offset = -offset;
+ pc_dst_offset = 2;
if (format & M6811_OP_IMM8)
{
(*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
format &= ~M6811_OP_IMM8;
+ /* Set PC destination offset. */
+ pc_dst_offset = 1;
}
else if (format & M6811_OP_IX)
{
}
}
+#define M6812_DST_MOVE (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
#define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
/* Analyze the 68HC12 indexed byte. */
if (format & M6812_INDEXED_FLAGS)
{
int indirect;
-
- status = print_indexed_operand (memaddr + pos, info, &indirect, 0);
+ bfd_vma endaddr;
+
+ endaddr = memaddr + pos + 1;
+ if (format & M6811_OP_IND16)
+ endaddr += 2;
+ pc_src_offset = -1;
+ pc_dst_offset = 1;
+ status = print_indexed_operand (memaddr + pos, info, &indirect,
+ (format & M6812_DST_MOVE),
+ pc_src_offset, endaddr);
if (status < 0)
{
return status;
reg_dst_table[(buffer[0] & 7)]);
}
- /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
- and in that order. The brset/brclr insn have a bitmask and then
- a relative branch offset. */
- if (format & M6811_OP_BITMASK)
- {
- status = read_memory (memaddr + pos, &buffer[0], 1, info);
- if (status != 0)
- {
- return status;
- }
- pos++;
- (*info->fprintf_func) (info->stream, " #$%02x%s",
- buffer[0] & 0x0FF,
- (format & M6811_OP_JUMP_REL ? " " : ""));
- format &= ~M6811_OP_BITMASK;
- }
- if (format & M6811_OP_JUMP_REL)
- {
- int val;
-
- status = read_memory (memaddr + pos, &buffer[0], 1, info);
- if (status != 0)
- {
- return status;
- }
-
- pos++;
- val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
- (*info->print_address_func) (memaddr + pos + val, info);
- format &= ~M6811_OP_JUMP_REL;
- }
- else if (format & M6812_OP_JUMP_REL16)
- {
- int val;
-
- status = read_memory (memaddr + pos, &buffer[0], 2, info);
- if (status != 0)
- {
- return status;
- }
-
- pos += 2;
- val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
- if (val & 0x8000)
- val |= 0xffff0000;
-
- (*info->print_address_func) (memaddr + pos + val, info);
- format &= ~M6812_OP_JUMP_REL16;
- }
if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
{
int val;
val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
val &= 0x0FFFF;
addr = val;
+ pc_dst_offset = 2;
if (format & M6812_OP_PAGE)
{
status = read_memory (memaddr + pos + offset, buffer, 1, info);
if (format & M6812_OP_IDX_P2)
{
(*info->fprintf_func) (info->stream, ", ");
- status = print_indexed_operand (memaddr + pos + offset, info, 0, 1);
+ status = print_indexed_operand (memaddr + pos + offset, info,
+ 0, 1, pc_dst_offset,
+ memaddr + pos + offset + 1);
if (status < 0)
return status;
pos += status;
(*info->print_address_func) (val, info);
}
+ /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
+ and in that order. The brset/brclr insn have a bitmask and then
+ a relative branch offset. */
+ if (format & M6811_OP_BITMASK)
+ {
+ status = read_memory (memaddr + pos, &buffer[0], 1, info);
+ if (status != 0)
+ {
+ return status;
+ }
+ pos++;
+ (*info->fprintf_func) (info->stream, " #$%02x%s",
+ buffer[0] & 0x0FF,
+ (format & M6811_OP_JUMP_REL ? " " : ""));
+ format &= ~M6811_OP_BITMASK;
+ }
+ if (format & M6811_OP_JUMP_REL)
+ {
+ int val;
+
+ status = read_memory (memaddr + pos, &buffer[0], 1, info);
+ if (status != 0)
+ {
+ return status;
+ }
+
+ pos++;
+ val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
+ (*info->print_address_func) (memaddr + pos + val, info);
+ format &= ~M6811_OP_JUMP_REL;
+ }
+ else if (format & M6812_OP_JUMP_REL16)
+ {
+ int val;
+
+ status = read_memory (memaddr + pos, &buffer[0], 2, info);
+ if (status != 0)
+ {
+ return status;
+ }
+
+ pos += 2;
+ val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
+ if (val & 0x8000)
+ val |= 0xffff0000;
+
+ (*info->print_address_func) (memaddr + pos + val, info);
+ format &= ~M6812_OP_JUMP_REL16;
+ }
+
if (format & M6812_OP_PAGE)
{
int val;
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