arc: Implement NPS-400 dcmac instruction

[deliverable/binutils-gdb.git] / opcodes / m68k-dis.c

diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 076e646407f030921f44ec53dd43d2551a24556d..1e7c830292314b988f5909c445644e56438d8fca 100644 (file)
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -1,7 +1,5 @@
 /* Print Motorola 68k instructions.
-   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
-   1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
-   Free Software Foundation, Inc.
+   Copyright (C) 1986-2016 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -81,7 +79,7 @@ static char *const reg_half_names[] =
        return ret_val;                         \
       val = COERCE16 ((p[-2] << 8) + p[-1]);   \
     }                                          \
-  while (0)                                            
+  while (0)
 
 /* Get a 4 byte signed integer.  */
 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
@@ -161,8 +159,6 @@ static char *const reg_half_names[] =
 /* Maximum length of an instruction.  */
 #define MAXLEN 22
 
-#include <setjmp.h>
-
 struct private
 {
   /* Points to first byte not fetched.  */
@@ -654,7 +650,7 @@ print_insn_arg (const char *d,
       {
         static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
         FETCH_ARG (2, val);
-       (*info->fprintf_func) (info->stream, cacheFieldName[val]);
+       (*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]);
         break;
       }
 
@@ -699,35 +695,64 @@ print_insn_arg (const char *d,
     case 'J':
       {
        /* FIXME: There's a problem here, different m68k processors call the
-          same address different names. This table can't get it right
-          because it doesn't know which processor it's disassembling for.  */
-       static const struct { char *name; int value; } names[]
-         = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
-            {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
-             {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
-            {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
-            {"%msp", 0x803}, {"%isp", 0x804},
-            /* reg c04 is sometimes called flashbar or rambar.
-               rec c05 is also sometimes called rambar.  */
-            {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
-
-            /* Should we be calling this psr like we do in case 'Y'?  */
-            {"%mmusr",0x805},
-
-             {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
-
-            /* Fido added these.  */
-             {"%cac", 0xffe}, {"%mbo", 0xfff}};
+          same address different names.  The tables below try to get it right
+          using info->mach, but only for v4e.  */
+       struct regname { char * name; int value; };
+       static const struct regname names[] =
+         {
+           {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
+           {"%tc",  0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
+           {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
+           {"%rgpiobar", 0x009}, {"%acr4",0x00c},
+           {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
+           {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
+           {"%msp", 0x803}, {"%isp", 0x804},
+           {"%pc", 0x80f},
+           /* Reg c04 is sometimes called flashbar or rambar.
+              Reg c05 is also sometimes called rambar.  */
+           {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
+
+           /* reg c0e is sometimes called mbar2 or secmbar.
+              reg c0f is sometimes called mbar.  */
+           {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
+
+           /* Should we be calling this psr like we do in case 'Y'?  */
+           {"%mmusr",0x805},
+
+           {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
+
+           /* Fido added these.  */
+           {"%cac", 0xffe}, {"%mbo", 0xfff}
+       };
+       /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least.  */
+       static const struct regname names_v4e[] =
+         {
+           {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
+           {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
+         };
+       unsigned int arch_mask;
 
+       arch_mask = bfd_m68k_mach_to_features (info->mach);
        FETCH_ARG (12, val);
-       for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
+       if (arch_mask & (mcfisa_b | mcfisa_c))
+         {
+           for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
+             if (names_v4e[regno].value == val)
+               {
+                 (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
+                 break;
+               }
+           if (regno >= 0)
+             break;
+         }
+       for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
          if (names[regno].value == val)
            {
              (*info->fprintf_func) (info->stream, "%s", names[regno].name);
              break;
            }
        if (regno < 0)
-         (*info->fprintf_func) (info->stream, "%d", val);
+         (*info->fprintf_func) (info->stream, "0x%x", val);
       }
       break;
 
@@ -763,7 +788,7 @@ print_insn_arg (const char *d,
          static char *const scalefactor_name[] = { "<<", ">>" };
 
          FETCH_ARG (1, val);
-         (*info->fprintf_func) (info->stream, scalefactor_name[val]);
+         (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]);
        }
       else
        {
@@ -1082,7 +1107,7 @@ print_insn_arg (const char *d,
                  return -1;
              }
              if (flt_p)        /* Print a float? */
-               (*info->fprintf_func) (info->stream, "#%g", flval);
+               (*info->fprintf_func) (info->stream, "#0e%g", flval);
              else
                (*info->fprintf_func) (info->stream, "#%d", val);
              break;
@@ -1195,6 +1220,7 @@ print_insn_arg (const char *d,
 
     case 'X':
       place = '8';
+      /* Fall through.  */
     case 'Y':
     case 'Z':
     case 'W':
@@ -1203,7 +1229,6 @@ print_insn_arg (const char *d,
     case '2':
     case '3':
       {
-       int val;
        char *name = 0;
 
        FETCH_ARG (5, val);
@@ -1312,7 +1337,7 @@ match_insn_m68k (bfd_vma memaddr,
 
   if (*args == '.')
     args++;
-  
+
   /* Point at first word of argument data,
      and at descriptor for first argument.  */
   p = buffer + 2;
@@ -1559,7 +1584,7 @@ m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
        }
     }
   return 0;
-}              
+}
 
 /* Print the m68k instruction at address MEMADDR in debugged memory,
    on INFO->STREAM.  Returns length of the instruction, in bytes.  */
@@ -1598,7 +1623,7 @@ print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
 
   if (val == 0)
     /* Handle undefined instructions.  */
-    info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
+    info->fprintf_func (info->stream, ".short 0x%04x", (buffer[0] << 8) + buffer[1]);
 
   return val ? val : 2;
 }