/* Print Motorola 68k instructions.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
- 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
+ 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
Free Software Foundation, Inc.
- This file is free software; you can redistribute it and/or modify
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
val = (buffer[1] >> 6);
break;
+ case 'E':
+ FETCH_DATA (info, buffer + 3);
+ val = (buffer[2] >> 1);
+ break;
+
case 'm':
val = (buffer[1] & 0x40 ? 0x8 : 0)
| ((buffer[0] >> 1) & 0x7)
abort ();
}
- switch (bits)
- {
- case 1:
- return val & 1;
- case 2:
- return val & 3;
- case 3:
- return val & 7;
- case 4:
- return val & 017;
- case 5:
- return val & 037;
- case 6:
- return val & 077;
- case 7:
- return val & 0177;
- case 8:
- return val & 0377;
- case 12:
- return val & 07777;
- default:
- abort ();
- }
+ /* bits is never too big. */
+ return val & ((1 << bits) - 1);
}
/* Check if an EA is valid for a particular code. This is required
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804},
- {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
+ /* reg c04 is sometimes called flashbar or rambar.
+ rec c05 is also sometimes called rambar. */
+ {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
/* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805},
{"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
/* Fido added these. */
- {"%cac", 0xffe}, {"%mbb", 0xfff}};
+ {"%cac", 0xffe}, {"%mbo", 0xfff}};
val = fetch_arg (buffer, place, 12, info);
for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
(*info->fprintf_func) (info->stream, "#%d", val);
break;
+ case 'j':
+ val = fetch_arg (buffer, place, 3, info);
+ (*info->fprintf_func) (info->stream, "#%d", val+1);
+ break;
+
+ case 'K':
+ val = fetch_arg (buffer, place, 9, info);
+ (*info->fprintf_func) (info->stream, "#%d", val);
+ break;
+
case 'M':
if (place == 'h')
{
unsigned char *save_p;
unsigned char *p;
const char *d;
+ const char *args = best->args;
struct private *priv = (struct private *) info->private_data;
bfd_byte *buffer = priv->the_buffer;
void (* save_print_address) (bfd_vma, struct disassemble_info *)
= info->print_address_func;
+ if (*args == '.')
+ args++;
+
/* Point at first word of argument data,
and at descriptor for first argument. */
p = buffer + 2;
The only place this is stored in the opcode table is
in the arguments--look for arguments which specify fields in the 2nd
or 3rd words of the instruction. */
- for (d = best->args; *d; d += 2)
+ for (d = args; *d; d += 2)
{
/* I don't think it is necessary to be checking d[0] here;
I suspect all this could be moved to the case statement below. */
three words long. */
if (p - buffer < 6
&& (best->match & 0xffff) == 0xffff
- && best->args[0] == '#'
- && best->args[1] == 'w')
+ && args[0] == '#'
+ && args[1] == 'w')
{
/* Copy the one word argument into the usual location for a one
word argument, to simplify printing it. We can get away with
FETCH_DATA (info, p);
- d = best->args;
-
save_p = p;
info->print_address_func = dummy_print_address;
info->fprintf_func = (fprintf_ftype) dummy_printer;
/* We scan the operands twice. The first time we don't print anything,
but look for errors. */
- for (; *d; d += 2)
+ for (d = args; *d; d += 2)
{
int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
info->fprintf_func = save_printer;
info->print_address_func = save_print_address;
- d = best->args;
+ d = args;
info->fprintf_func (info->stream, "%s", best->name);
const struct m68k_opcode *opc = opcodes[major_opcode][i];
unsigned long opcode = opc->opcode;
unsigned long match = opc->match;
+ const char *args = opc->args;
+
+ if (*args == '.')
+ args++;
if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
&& ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
/* Don't use for printout the variants of divul and divsl
that have the same register number in two places.
The more general variants will match instead. */
- for (d = opc->args; *d; d += 2)
+ for (d = args; *d; d += 2)
if (d[1] == 'D')
break;
point coprocessor instructions which use the same
register number in two places, as above. */
if (*d == '\0')
- for (d = opc->args; *d; d += 2)
+ for (d = args; *d; d += 2)
if (d[1] == 't')
break;
wait for fmoveml. */
if (*d == '\0')
{
- for (d = opc->args; *d; d += 2)
+ for (d = args; *d; d += 2)
{
if (d[0] == 's' && d[1] == '8')
{
/* Don't match FPU insns with non-default coprocessor ID. */
if (*d == '\0')
{
- for (d = opc->args; *d; d += 2)
+ for (d = args; *d; d += 2)
{
if (d[0] == 'I')
{