gas: run the hwcaps-bump tests with 64-bit sparc objects only.

[deliverable/binutils-gdb.git] / opcodes / mep-opc.h

diff --git a/opcodes/mep-opc.h b/opcodes/mep-opc.h
index 0704c3001a7727e1e004f13353366d1ff4f1ae01..cee5321c85a93cc820349a168848e60411d86725 100644 (file)
--- a/opcodes/mep-opc.h
+++ b/opcodes/mep-opc.h
@@ -2,7 +2,7 @@
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 
-Copyright 1996-2007 Free Software Foundation, Inc.
+Copyright (C) 1996-2016 Free Software Foundation, Inc.
 
 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 
@@ -87,7 +87,7 @@ extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_core_isas_mask;
 )
 
 /* A mask for all ISAs executed by a VLIW coprocessor.  */
-#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask 
+#define MEP_ALL_COP_ISAS_MASK mep_all_cop_isas_mask
 extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
 
 #define MEP_INSN_COP_P(insn) ( \
@@ -96,6 +96,7 @@ extern CGEN_ATTR_VALUE_BITSET_TYPE mep_all_cop_isas_mask;
 )
 
 extern int mep_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
+extern int mep_cgen_insn_supported_asm (CGEN_CPU_DESC, const CGEN_INSN *);
 
 /* -- asm.c */
 /* Enum declaration for mep instruction types.  */
@@ -484,6 +485,8 @@ struct cgen_fields
   long f_ivc2_3u25;
   long f_ivc2_imm16p0;
   long f_ivc2_simm16p0;
+  long f_ivc2_ccrn_c3hi;
+  long f_ivc2_ccrn_c3lo;
   long f_ivc2_crn;
   long f_ivc2_crm;
   long f_ivc2_ccrn_h1;
@@ -492,6 +495,7 @@ struct cgen_fields
   long f_ivc2_cmov1;
   long f_ivc2_cmov2;
   long f_ivc2_cmov3;
+  long f_ivc2_ccrn_c3;
   long f_ivc2_ccrn;
   long f_ivc2_crnx;
 };