MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support

[deliverable/binutils-gdb.git] / opcodes / microblaze-dis.c

diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c
index e204e36310db34650bf9b3bd662c6c74b94f193a..6a174b0eb903e3b9913ccac5cbb915f40fe0294d 100644 (file)
--- a/opcodes/microblaze-dis.c
+++ b/opcodes/microblaze-dis.c
@@ -1,6 +1,6 @@
 /* Disassemble Xilinx microblaze instructions.
 
-   Copyright 2009, 2012 Free Software Foundation, Inc.
+   Copyright (C) 2009-2017 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -24,7 +24,7 @@
 #define STATIC_TABLE
 #define DEFINE_TABLE
 
-#include "dis-asm.h"
+#include "disassemble.h"
 #include <strings.h>
 #include "microblaze-opc.h"
 #include "microblaze-dis.h"
@@ -139,6 +139,12 @@ get_field_special (long instr, struct op_code_struct * op)
     case REG_TLBSX_MASK :
       strcpy (spr, "tlbsx");
       break;
+    case REG_SHR_MASK :
+      strcpy (spr, "shr");
+      break;
+    case REG_SLR_MASK :
+      strcpy (spr, "slr");
+      break;
     default :
       if (((((instr & IMM_MASK) >> IMM_LOW) ^ op->immval_mask) & 0xE000)
           == REG_PVR_MASK)
@@ -377,8 +383,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
        case INST_TYPE_R1:
          print_func (stream, "\t%s", get_field_r1 (inst));
          break;
-       case INST_TYPE_RD_R1_SPECIAL:
-         print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
+       case INST_TYPE_R1_R2_SPECIAL:
+         print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_r2 (inst));
          break;
        case INST_TYPE_RD_IMM15:
          print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));