* config/tc-mips.c (macro): Handle a register plus a 16-bit

[deliverable/binutils-gdb.git] / opcodes / mips-dis.c

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index a1e13fffffcc7416eed0dcc978aeb2cbe02578fd..9b35a472712b59002ecd337b2309bcea83064a9d 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1,6 +1,6 @@
 /* Print mips instructions for GDB, the GNU debugger, or for objdump.
    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2001
+   2000, 2001, 2002
    Free Software Foundation, Inc.
    Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
 
@@ -284,6 +284,53 @@ print_insn_arg (d, l, pc, info)
                             (l >> OP_SH_SEL) & OP_MASK_SEL);
       break;
 
+    case 'O':
+      (*info->fprintf_func) (info->stream, "%d",
+                            (l >> OP_SH_ALN) & OP_MASK_ALN);
+      break;
+
+    case 'Q':
+      {
+       unsigned int vsel = (l >> OP_SH_VSEL) & OP_MASK_VSEL;
+       if ((vsel & 0x10) == 0)
+         {
+           int fmt;
+           vsel &= 0x0f;
+           for (fmt = 0; fmt < 3; fmt++, vsel >>= 1)
+             if ((vsel & 1) == 0)
+               break;
+           (*info->fprintf_func) (info->stream, "$v%d[%d]",
+                                  (l >> OP_SH_FT) & OP_MASK_FT, 
+                                  vsel >> 1);
+         }
+       else if ((vsel & 0x08) == 0)
+         {
+           (*info->fprintf_func) (info->stream, "$v%d",
+                                  (l >> OP_SH_FT) & OP_MASK_FT);
+         }
+       else
+         {
+           (*info->fprintf_func) (info->stream, "0x%x",
+                                  (l >> OP_SH_FT) & OP_MASK_FT);
+         }
+      }
+      break;
+
+    case 'X':
+      (*info->fprintf_func) (info->stream, "$v%d",
+                            (l >> OP_SH_FD) & OP_MASK_FD);
+      break;
+
+    case 'Y':
+      (*info->fprintf_func) (info->stream, "$v%d",
+                            (l >> OP_SH_FS) & OP_MASK_FS);
+      break;
+
+    case 'Z':
+      (*info->fprintf_func) (info->stream, "$v%d",
+                            (l >> OP_SH_FT) & OP_MASK_FT);
+      break;
+
     default:
       /* xgettext:c-format */
       (*info->fprintf_func) (info->stream,
@@ -365,7 +412,7 @@ mips_isa_type (mach, isa, cputype)
       break;
     case bfd_mach_mips16:
       *cputype = CPU_MIPS16;
-      *isa = ISA_MIPS3;
+      *isa = ISA_MIPS3 | INSN_MIPS16;
       break;
     case bfd_mach_mips5:
       *cputype = CPU_MIPS5;
@@ -373,15 +420,21 @@ mips_isa_type (mach, isa, cputype)
       break;
     case bfd_mach_mips_sb1:
       *cputype = CPU_SB1;
-      *isa = ISA_MIPS64 | INSN_SB1;
+      *isa = ISA_MIPS64 | INSN_MIPS3D | INSN_SB1;
       break;
     case bfd_mach_mipsisa32:
       *cputype = CPU_MIPS32;
-      *isa = ISA_MIPS32;
+      /* For stock MIPS32, disassemble all applicable MIPS-specified ASEs.
+        Note that MIPS-3D and MDMX are not applicable to MIPS32.  (See
+        _MIPS32 Architecture For Programmers Volume I: Introduction to the
+        MIPS32 Architecture_ (MIPS Document Number MD00082, Revision 0.95),
+        page 1.  */
+      *isa = ISA_MIPS32 | INSN_MIPS16;
       break;
     case bfd_mach_mipsisa64:
       *cputype = CPU_MIPS64;
-      *isa = ISA_MIPS64;
+      /* For stock MIPS64, disassemble all applicable MIPS-specified ASEs.  */
+      *isa = ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX;
       break;
 
     default:
@@ -401,10 +454,8 @@ is_newabi (header)
   if (header->e_ident[EI_CLASS] == ELFCLASS64)
     return 1;
 
-  /* If a 32-bit ELF file, N32, EABI32, and EABI64 are new-style ABIs.  */
-  if ((header->e_flags & EF_MIPS_ABI2) != 0
-      || (header->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32
-      || (header->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI64)
+  /* If a 32-bit ELF file, n32 is a new-style ABI.  */
+  if ((header->e_flags & EF_MIPS_ABI2) != 0)
     return 1;
 
   return 0;