/* Print mips instructions for GDB, the GNU debugger, or for objdump.
- Copyright (C) 1989-2016 Free Software Foundation, Inc.
+ Copyright (C) 1989-2017 Free Software Foundation, Inc.
Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
This file is part of the GNU opcodes library.
/* This entry, mips16, is here only for ISA/processor selection; do
not print its name. */
- { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3, 0,
+ { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS64, 0,
mips_cp0_names_numeric, NULL, 0, mips_cp1_names_numeric,
mips_hwr_names_numeric },
};
Elf_Internal_Ehdr *header = elf_elfheader (abfd);
Elf_Internal_ABIFlags_v0 *abiflags = NULL;
- /* We won't ever get here if !BFD64, because we won't then have
- a MIPS/ELF BFD, however we need to guard against a link error
- in a `--enable-targets=...' configuration with a 32-bit host,
- where the MIPS target is a secondary. */
-#ifdef BFD64
+ /* We won't ever get here if !HAVE_BFD_MIPS_ELF_GET_ABIFLAGS,
+ because we won't then have a MIPS/ELF BFD, however we need
+ to guard against a link error in a `--enable-targets=...'
+ configuration with a 32-bit host where the MIPS target is
+ a secondary, or with MIPS/ECOFF configurations. */
+#ifdef HAVE_BFD_MIPS_ELF_GET_ABIFLAGS
abiflags = bfd_mips_elf_get_abiflags (abfd);
#endif
/* If an ELF "newabi" binary, use the n32/(n)64 GPR names. */
const fprintf_ftype infprintf = info->fprintf_func;
void *is = info->stream;
const struct mips_operand *operand, *ext_operand;
+ unsigned short ext_size;
unsigned int uval;
bfd_vma baseaddr;
info->data_size = 1 << int_op->shift;
}
- if (operand->size == 26)
- uval = ((extend & 0x1f) << 21) | ((extend & 0x3e0) << 11) | insn;
- else
+ ext_size = 0;
+ if (use_extend)
{
- /* Calculate the full field value. */
- uval = mips_extract_operand (operand, (extend << 16) | insn);
- if (use_extend)
+ ext_operand = decode_mips16_operand (type, TRUE);
+ if (ext_operand != operand)
{
- ext_operand = decode_mips16_operand (type, TRUE);
- if (ext_operand != operand)
- {
- operand = ext_operand;
- if (operand->size == 16)
- uval = (((extend & 0x1f) << 11) | (extend & 0x7e0)
- | (uval & 0x1f));
- else if (operand->size == 15)
- uval |= ((extend & 0xf) << 11) | (extend & 0x7f0);
- else
- uval = ((((extend >> 6) & 0x1f) | (extend & 0x20))
- & ((1U << operand->size) - 1));
- }
+ ext_size = ext_operand->size;
+ operand = ext_operand;
}
}
+ if (operand->size == 26)
+ uval = ((extend & 0x1f) << 21) | ((extend & 0x3e0) << 11) | insn;
+ else if (ext_size == 16)
+ uval = ((extend & 0x1f) << 11) | (extend & 0x7e0) | (insn & 0x1f);
+ else if (ext_size == 15)
+ uval = ((extend & 0xf) << 11) | (extend & 0x7f0) | (insn & 0xf);
+ else if (ext_size == 6)
+ uval = ((extend >> 6) & 0x1f) | (extend & 0x20);
+ else
+ uval = mips_extract_operand (operand, (extend << 16) | insn);
baseaddr = memaddr + 2;
if (operand->type == OP_PCREL)
{
enum match_kind match;
+ if (!opcode_is_member (op, mips_isa, mips_ase, mips_processor))
+ continue;
+
if (op->pinfo == INSN_MACRO
|| (no_aliases && (op->pinfo2 & INSN2_ALIAS)))
match = MATCH_NONE;
}
else if ((first & 0xf800) == 0xf000
&& have_second
+ && !(op->pinfo2 & INSN2_SHORT_ONLY)
&& (second & op->mask) == op->match)
match = MATCH_FULL;
else