* varobj.c (varobj_create): Call do_cleanups on early exit path.

[deliverable/binutils-gdb.git] / opcodes / mips-dis.c

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index bcfef7237eb07852c601d0dd57bf9d81964e158e..c38a7e164c1cfee9c46dfe9d95e696a8604d0578 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -512,6 +512,10 @@ const struct mips_arch_choice mips_arch_choices[] =
     ISA_MIPS3 | INSN_LOONGSON_2F, mips_cp0_names_numeric, 
     NULL, 0, mips_hwr_names_numeric },
 
+  { "loongson3a",   1, bfd_mach_mips_loongson_3a, CPU_LOONGSON_3A,
+    ISA_MIPS64 | INSN_LOONGSON_3A, mips_cp0_names_numeric, 
+    NULL, 0, mips_hwr_names_numeric },
+
   { "octeon",   1, bfd_mach_mips_octeon, CPU_OCTEON,
     ISA_MIPS64R2 | INSN_OCTEON, mips_cp0_names_numeric, NULL, 0,
     mips_hwr_names_numeric },
@@ -969,6 +973,38 @@ print_insn_args (const char *d,
              (*info->fprintf_func) (info->stream, "%d", op);
              break;
 
+           case 'a':           /* 8-bit signed offset in bit 6 */
+             delta = (l >> OP_SH_OFFSET_A) & OP_MASK_OFFSET_A;
+             if (delta & 0x80)
+               delta |= ~OP_MASK_OFFSET_A;
+             (*info->fprintf_func) (info->stream, "%d", delta);
+             break;
+
+           case 'b':           /* 8-bit signed offset in bit 3 */
+             delta = (l >> OP_SH_OFFSET_B) & OP_MASK_OFFSET_B;
+             if (delta & 0x80)
+               delta |= ~OP_MASK_OFFSET_B;
+             (*info->fprintf_func) (info->stream, "%d", delta);
+             break;
+
+           case 'c':           /* 9-bit signed offset in bit 6 */
+             delta = (l >> OP_SH_OFFSET_C) & OP_MASK_OFFSET_C;
+             if (delta & 0x100)
+               delta |= ~OP_MASK_OFFSET_C;
+             /* Left shift 4 bits to print the real offset.  */
+             (*info->fprintf_func) (info->stream, "%d", delta << 4);
+             break;
+
+           case 'z':
+             (*info->fprintf_func) (info->stream, "%s",
+                                    mips_gpr_names[(l >> OP_SH_RZ) & OP_MASK_RZ]);
+             break;
+
+           case 'Z':
+             (*info->fprintf_func) (info->stream, "%s",
+                                    mips_fpr_names[(l >> OP_SH_FZ) & OP_MASK_FZ]);
+             break;
+
            default:
              /* xgettext:c-format */
              (*info->fprintf_func) (info->stream,
@@ -1404,7 +1440,8 @@ print_insn_mips (bfd_vma memaddr,
              /* Figure out instruction type and branch delay information.  */
              if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0)
                {
-                 if ((info->insn_type & INSN_WRITE_GPR_31) != 0)
+                 if ((op->pinfo & (INSN_WRITE_GPR_31
+                                   | INSN_WRITE_GPR_D)) != 0)
                    info->insn_type = dis_jsr;
                  else
                    info->insn_type = dis_branch;
@@ -1413,7 +1450,7 @@ print_insn_mips (bfd_vma memaddr,
              else if ((op->pinfo & (INSN_COND_BRANCH_DELAY
                                     | INSN_COND_BRANCH_LIKELY)) != 0)
                {
-                 if ((info->insn_type & INSN_WRITE_GPR_31) != 0)
+                 if ((op->pinfo & INSN_WRITE_GPR_31) != 0)
                    info->insn_type = dis_condjsr;
                  else
                    info->insn_type = dis_condbranch;
@@ -1660,7 +1697,6 @@ print_mips16_insn_arg (char type,
            signedp = 1;
            pcrel = 1;
            branch = 1;
-           info->insn_type = dis_condbranch;
            break;
          case 'q':
            nbits = 11;
@@ -1668,7 +1704,6 @@ print_mips16_insn_arg (char type,
            signedp = 1;
            pcrel = 1;
            branch = 1;
-           info->insn_type = dis_branch;
            break;
          case 'A':
            nbits = 8;
@@ -1789,8 +1824,6 @@ print_mips16_insn_arg (char type,
       }
       info->target = ((memaddr + 4) & ~(bfd_vma) 0x0fffffff) | l;
       (*info->print_address_func) (info->target, info);
-      info->insn_type = dis_jsr;
-      info->branch_delay_insns = 1;
       break;
 
     case 'l':
@@ -2082,12 +2115,19 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
                                     info);
            }
 
+         /* Figure out branch instruction type and delay slot information.  */
          if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0)
+           info->branch_delay_insns = 1;
+         if ((op->pinfo & (INSN_UNCOND_BRANCH_DELAY
+                           | MIPS16_INSN_UNCOND_BRANCH)) != 0)
            {
-             info->branch_delay_insns = 1;
-             if (info->insn_type != dis_jsr)
+             if ((op->pinfo & INSN_WRITE_GPR_31) != 0)
+               info->insn_type = dis_jsr;
+             else
                info->insn_type = dis_branch;
            }
+         else if ((op->pinfo & MIPS16_INSN_COND_BRANCH) != 0)
+           info->insn_type = dis_condbranch;
 
          return length;
        }