sh-opc.h (sh_table): Remove ftst/nan.
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
index 03305a8488014ef0bc4b5ec17d94240d4c3c8e44..6a04f7c872561c19b635c6d1ce5cbeb3a2ab3285 100644 (file)
@@ -76,6 +76,9 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  *
 #define L1     INSN_4010
 #define V1      INSN_4100
 #define T3      INSN_3900
+/* start-sanitize-tx49 */
+#define T4      INSN_4900
+/* end-sanitize-tx49 */
 /* start-sanitize-vr5400 */
 #define N5     INSN_5400
 /* end-sanitize-vr5400 */
@@ -84,11 +87,25 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  *
 /* end-sanitize-r5900 */
 
 #define G1      (T3                   \
+/* start-sanitize-tx49 */             \
+                 | T4                 \
+/* end-sanitize-tx49 */               \
 /* start-sanitize-r5900 */            \
                  | T5                 \
 /* end-sanitize-r5900 */              \
                  )
 
+#define G2      (T3                   \
+/* start-sanitize-tx49 */             \
+                 | T4                 \
+/* end-sanitize-tx49 */               \
+                 )
+
+#define G3 (I4             \
+/* start-sanitize-tx49 */  \
+            | T4           \
+/* end-sanitize-tx49 */    \
+            )
 
 /* The order of overloaded instructions matters.  Label arguments and
    register arguments look the same. Instructions that can have either
@@ -312,7 +329,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 /* dctr and dctw are used on the r5000.  */
 {"dctr",    "o(b)",    0xbc050000, 0xfc1f0000, RD_b,   I3      },
 {"dctw",    "o(b)",    0xbc090000, 0xfc1f0000, RD_b,   I3      },
-{"deret",   "",         0x4200001f, 0xffffffff,    0,  T3      },
+{"deret",   "",         0x4200001f, 0xffffffff,    0,  G2      },
 /* For ddiv, see the comments about div.  */
 {"ddiv",    "z,s,t",   0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
 {"ddiv",    "d,v,t",   3,    (int) M_DDIV_3,   INSN_MACRO      },
@@ -357,8 +374,14 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"dmulo",   "d,v,I",   3,    (int) M_DMULO_I,  INSN_MACRO      },
 {"dmulou",  "d,v,t",   3,    (int) M_DMULOU,   INSN_MACRO      },
 {"dmulou",  "d,v,I",   3,    (int) M_DMULOU_I, INSN_MACRO      },
-{"dmult",   "s,t",     0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
-{"dmultu",  "s,t",     0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
+{"dmult",   "s,t",     0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      I3},
+  /* start-sanitize-tx49 */
+{"dmult",   "d,s,t",   0x0000001c, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
+  /* end-sanitize-tx49 */
+{"dmultu",  "s,t",     0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,      I3},
+  /* start-sanitize-tx49 */
+{"dmultu",  "d,s,t",   0x0000001d, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
+  /* end-sanitize-tx49 */
 {"dneg",    "d,w",     0x0000002e, 0xffe007ff, WR_d|RD_t,      I3      }, /* dsub 0 */
 {"dnegu",   "d,w",     0x0000002f, 0xffe007ff, WR_d|RD_t,      I3      }, /* dsubu 0*/
 {"drem",    "z,s,t",   0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,  I3      },
@@ -370,8 +393,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {
   /* start-sanitize-vr5400 */
 {"dret",    "",                0x7000003e, 0xffffffff, 0,      N5      },
 {"drorv",   "d,t,s",   0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5      },
-{"dror32",  "d,t,>",   0x0020003e, 0xffe0003f, WR_d|RD_t,      N5      },
-{"dror",    "d,t,<",   0x00200036, 0xffe0003f, WR_d|RD_t,      N5      },
+{"dror32",  "d,w,<",   0x0020003e, 0xffe0003f, WR_d|RD_t,      N5      },
+{"dror",    "d,w,>",   0x0020003e, 0xffe0003f, WR_d|RD_t,      N5      },
+{"dror",    "d,w,<",   0x00200036, 0xffe0003f, WR_d|RD_t,      N5      },
   /* end-sanitize-vr5400 */
 {"dsllv",   "d,t,s",   0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3      },
 {"dsll32",  "d,w,<",   0x0000003c, 0xffe0003f, WR_d|RD_t,      I3      },
@@ -505,20 +529,16 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"madd.s",  "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,       T5      },
   /* end-sanitize-r5900 */
 {"madd",    "s,t",     0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          L1      },
-{"madd",    "s,t",     0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T3      },
-{"madd",    "d,s,t",   0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T3      },
+{"madd",    "s,t",     0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          G1      },
+{"madd",    "d,s,t",   0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     G1      },
   /* start-sanitize-r5900 */
-{"madd",    "s,t",     0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
-{"madd",    "d,s,t",   0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
 {"madd1",   "s,t",     0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
 {"madd1",   "d,s,t",   0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
   /* end-sanitize-r5900 */
 {"maddu",   "s,t",     0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          L1      },
-{"maddu",   "s,t",     0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T3      },
-{"maddu",   "d,s,t",   0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T3      },
+{"maddu",   "s,t",     0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          G1      },
+{"maddu",   "d,s,t",   0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     G1      },
   /* start-sanitize-r5900 */
-{"maddu",   "s,t",     0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
-{"maddu",   "d,s,t",   0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
 {"maddu1",  "s,t",     0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,          T5      },
 {"maddu1",  "d,s,t",   0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d,     T5      },
   /* end-sanitize-r5900 */
@@ -772,7 +792,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"pxor",   "d,v,t",    0x700004c9, 0xfc0007ff, WR_d|RD_s|RD_t, T5      },
   /* end-sanitize-r5900 */
 
-{"pref",    "k,o(b)",  0xcc000000, 0xfc000000, RD_b,   I4      },
+{"pref",    "k,o(b)",  0xcc000000, 0xfc000000, RD_b,           G3      },
 {"prefx",   "h,t(b)",  0x4c00000f, 0xfc0007ff, RD_b|RD_t,      I4      },
 
   /* start-sanitize-r5900 */
@@ -816,8 +836,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"sd",     "t,o(b)",   0xfc000000, 0xfc000000, SM|RD_t|RD_b,   I3      },
 {"sd",      "t,o(b)",  0,    (int) M_SD_OB,    INSN_MACRO      },
 {"sd",      "t,A(b)",  0,    (int) M_SD_AB,    INSN_MACRO      },
-{"sdbbp",   "",                0x0000000e, 0xffffffff, TRAP,           T3      },
-{"sdbbp",   "c",       0x0000000e, 0xfc00003f, TRAP,           T3      },
+{"sdbbp",   "",                0x0000000e, 0xffffffff, TRAP,           G2      },
+{"sdbbp",   "c",       0x0000000e, 0xfc00003f, TRAP,           G2      },
 {"sdc1",    "T,o(b)",  0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      I2      },
 {"sdc1",    "E,o(b)",  0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      I2      },
 {"sdc1",    "T,A(b)",  2,    (int) M_SDC1_AB,  INSN_MACRO      },
@@ -972,15 +992,15 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"and.ob",  "D,S,T",    0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
 {"and.ob",  "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
 {"and.ob",  "D,S,k",    0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
-{"c.eq.ob", "S,k",     0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.eq.ob", "S,T",     0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.eq.ob", "S,T[e]",  0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
-{"c.le.ob", "S,k",     0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
+{"c.eq.ob", "S,k",     0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.le.ob", "S,T",     0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.le.ob", "S,T[e]",  0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
-{"c.lt.ob", "S,k",     0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
+{"c.le.ob", "S,k",     0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.lt.ob", "S,T",     0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"c.lt.ob", "S,T[e]",  0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
+{"c.lt.ob", "S,k",     0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"max.ob",  "D,S,T",    0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
 {"max.ob",  "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
 {"max.ob",  "D,S,k",    0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
@@ -990,18 +1010,18 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"mul.ob",  "D,S,T",    0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
 {"mul.ob",  "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
 {"mul.ob",  "D,S,k",    0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
-{"mula.ob", "S,k",     0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mula.ob", "S,T",     0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mula.ob", "S,T[e]",  0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
-{"mull.ob", "S,k",     0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
+{"mula.ob", "S,k",     0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mull.ob", "S,T",     0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mull.ob", "S,T[e]",  0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
-{"muls.ob", "S,k",     0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
+{"mull.ob", "S,k",     0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"muls.ob", "S,T",     0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"muls.ob", "S,T[e]",  0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
-{"mulsl.ob","S,k",     0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
+{"muls.ob", "S,k",     0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mulsl.ob","S,T",     0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"mulsl.ob","S,T[e]",  0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T, N5     },
+{"mulsl.ob","S,k",     0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5     },
 {"nor.ob",  "D,S,T",    0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
 {"nor.ob",  "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T,        N5      },
 {"nor.ob",  "D,S,k",    0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
@@ -1017,7 +1037,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {
 {"rach.ob", "D",       0x4a00003f, 0xfffff83f, WR_D, N5        },
 {"racl.ob", "D",       0x4800003f, 0xfffff83f, WR_D, N5        },
 {"racm.ob", "D",       0x4900003f, 0xfffff83f, WR_D, N5        },
-{"rzu.ob",  "D,S,k",    0x4bc00020, 0xffe0003f, WR_D|RD_S|RD_T,        N5      },
+{"rzu.ob",  "D,k",      0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T,        N5      },
 {"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, N5     },
 {"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, N5     },
 {"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, N5     },
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