[ARM] Support for ARMv8.1 Adv.SIMD extension
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
index 0e9f716916eed7c4aa2953dcc58399381083851d..a0b0e26988ff1dd3a5fa4284863b03e1b0599224 100644 (file)
@@ -1,5 +1,5 @@
 /* mips-opc.c -- MIPS opcode list.
-   Copyright (C) 1993-2014 Free Software Foundation, Inc.
+   Copyright (C) 1993-2015 Free Software Foundation, Inc.
    Contributed by Ralph Campbell and OSF
    Commented and modified by Ian Lance Taylor, Cygnus Support
    Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
@@ -48,11 +48,11 @@ decode_mips_operand (const char *p)
        case 'd': SPECIAL (0, 0, REPEAT_DEST_REG);
        case 's': SPECIAL (5, 21, NON_ZERO_REG);
        case 't': SPECIAL (5, 16, NON_ZERO_REG);
-       case 'u': PREV_CHECK (5, 16, TRUE, FALSE, FALSE, TRUE);
+       case 'u': PREV_CHECK (5, 16, TRUE, FALSE, FALSE, FALSE);
        case 'v': PREV_CHECK (5, 16, TRUE, TRUE, FALSE, FALSE);
        case 'w': PREV_CHECK (5, 16, FALSE, TRUE, TRUE, TRUE);
        case 'x': PREV_CHECK (5, 21, TRUE, FALSE, FALSE, TRUE);
-       case 'y': PREV_CHECK (5, 21, FALSE, TRUE, TRUE, FALSE);
+       case 'y': PREV_CHECK (5, 21, FALSE, TRUE, FALSE, FALSE);
        case 'A': PCREL (19, 0, TRUE, 2, 2, FALSE, FALSE);
        case 'B': PCREL (18, 0, TRUE, 3, 3, FALSE, FALSE);
        }
@@ -316,9 +316,10 @@ decode_mips_operand (const char *p)
 #define N5     (INSN_5400 | INSN_5500)
 #define N54    INSN_5400
 #define N55    INSN_5500
-#define IOCT   (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2)
-#define IOCTP  (INSN_OCTEONP | INSN_OCTEON2)
-#define IOCT2  INSN_OCTEON2
+#define IOCT   (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2 | INSN_OCTEON3)
+#define IOCTP  (INSN_OCTEONP | INSN_OCTEON2 | INSN_OCTEON3)
+#define IOCT2  (INSN_OCTEON2 | INSN_OCTEON3)
+#define IOCT3  INSN_OCTEON3
 #define XLR     INSN_XLR
 #define IVIRT  ASE_VIRT
 #define IVIRT64        ASE_VIRT64
@@ -429,7 +430,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"move",               "d,s",          0x00000025, 0xfc1f07ff, WR_1|RD_2,              INSN2_ALIAS,    I1,             0,      0 },/* or */
 {"b",                  "p",            0x10000000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1,             0,      0 },/* beq 0,0 */
 {"b",                  "p",            0x04010000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1,             0,      0 },/* bgez 0 */
-{"nal",                        "p",            0x04100000, 0xffff0000, WR_31|CBD,              INSN2_ALIAS,    I1,             0,      0 },/* bltzal 0 */
+{"nal",                        "",             0x04100000, 0xffffffff, WR_31|CBD,              INSN2_ALIAS,    I1,             0,      0 },/* bltzal 0 */
 {"bal",                        "p",            0x04110000, 0xffff0000, WR_31|UBD,              INSN2_ALIAS,    I1,             0,      0 },/* bgezal 0*/
 {"bc",                 "+'",           0xc8000000, 0xfc000000, NODS,                   0,              I37,            0,      0 },
 {"balc",               "+'",           0xe8000000, 0xfc000000, WR_31|NODS,             0,              I37,            0,      0 },
@@ -1146,6 +1147,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"dsubu",              "d,v,I",        0,    (int) M_DSUBU_I,  INSN_MACRO,             0,              I3,             0,      0 },
 {"dvpe",               "",             0x41600001, 0xffffffff, TRAP,                   0,              0,              MT32,   0 },
 {"dvpe",               "t",            0x41600001, 0xffe0ffff, WR_1|TRAP,              0,              0,              MT32,   0 },
+{"dvp",                        "",             0x41600024, 0xffffffff, TRAP,                   0,              I37,            0,      0 },
+{"dvp",                        "t",            0x41600024, 0xffe0ffff, WR_1|TRAP,              0,              I37,            0,      0 },
 {"ei",                 "",             0x42000038, 0xffffffff, WR_C0,                  0,              EE,             0,      0 },
 {"ei",                 "",             0x41606020, 0xffffffff, WR_C0,                  0,              I33,            0,      0 },
 {"ei",                 "t",            0x41606020, 0xffe0ffff, WR_1|WR_C0,             0,              I33,            0,      0 },
@@ -1155,6 +1158,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"eretnc",             "",             0x42000058, 0xffffffff, NODS,                   0,              I36,            0,      0 },
 {"evpe",               "",             0x41600021, 0xffffffff, TRAP,                   0,              0,              MT32,   0 },
 {"evpe",               "t",            0x41600021, 0xffe0ffff, WR_1|TRAP,              0,              0,              MT32,   0 },
+{"evp",                        "",             0x41600004, 0xffffffff, TRAP,                   0,              I37,            0,      0 },
+{"evp",                        "t",            0x41600004, 0xffe0ffff, WR_1|TRAP,              0,              I37,            0,      0 },
 {"ext",                        "t,r,+A,+C",    0x7c000000, 0xfc00003f, WR_1|RD_2,              0,              I33,            0,      0 },
 {"exts32",             "t,r,+p,+s",    0x7000003b, 0xfc00003f, WR_1|RD_2,              0,              IOCT,           0,      0 },
 {"exts",               "t,r,+P,+S",    0x7000003b, 0xfc00003f, WR_1|RD_2,              0,              IOCT,           0,      0 }, /* exts32 */
@@ -1496,11 +1501,17 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"mtlhx",              "s",            0x00000053, 0xfc1fffff, RD_1|MOD_HILO,          0,              0,              SMT,    0 },
 {"mtcr",               "t,s",          0x70000019, 0xfc00ffff, RD_1|RD_2,              0,              XLR,            0,      0 },
 {"mtm0",               "s",            0x70000008, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtm0",               "s,t",          0x70000008, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtm1",               "s",            0x7000000c, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtm1",               "s,t",          0x7000000c, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtm2",               "s",            0x7000000d, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtm2",               "s,t",          0x7000000d, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtp0",               "s",            0x70000009, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtp0",               "s,t",          0x70000009, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtp1",               "s",            0x7000000a, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtp1",               "s,t",          0x7000000a, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtp2",               "s",            0x7000000b, 0xfc1fffff, RD_1,                   0,              IOCT,           0,      0 },
+{"mtp2",               "s,t",          0x7000000b, 0xfc00ffff, RD_1|RD_2,              0,              IOCT3,          0,      0 },
 {"mtsa",               "s",            0x00000029, 0xfc1fffff, RD_1,                   0,              EE,             0,      0 },
 {"mtsab",              "s,j",          0x04180000, 0xfc1f0000, RD_1,                   0,              EE,             0,      0 },
 {"mtsah",              "s,j",          0x04190000, 0xfc1f0000, RD_1,                   0,              EE,             0,      0 },
@@ -3247,6 +3258,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"jic",                        "t,j",          0xd8000000, 0xffe00000, RD_1|NODS,              0,              I37,            0,      0 },
 
 {"bnezc",              "-s,+\"",       0xf8000000, 0xfc000000, RD_1|NODS,              FS,             I37,            0,      0 },
+{"jalrc",              "t",            0xf8000000, 0xffe0ffff, RD_1|NODS,              0,              I37,            0,      0 },
 {"jialc",              "t,j",          0xf8000000, 0xffe00000, RD_1|NODS,              0,              I37,            0,      0 },
 
 {"cmp.af.s",           "D,S,T",        0x46800000, 0xffe0003f, WR_1|RD_2|RD_3|FP_S,    0,              I37,            0,      0 },
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