dtrace-probe: Put semicolon after while on its own line

[deliverable/binutils-gdb.git] / opcodes / mips-opc.c

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 79a8417760c49dd1752a9feee9710ac169514e5f..e47d1fd84ee33fa7cc8605e23ffca6b2701a2032 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -1,5 +1,5 @@
 /* mips-opc.c -- MIPS opcode list.
-   Copyright (C) 1993-2016 Free Software Foundation, Inc.
+   Copyright (C) 1993-2017 Free Software Foundation, Inc.
    Contributed by Ralph Campbell and OSF
    Commented and modified by Ian Lance Taylor, Cygnus Support
    Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
@@ -374,6 +374,7 @@ decode_mips_operand (const char *p)
 #define DSP_VOLA INSN_NO_DELAY_SLOT
 #define D32    ASE_DSP
 #define D33    ASE_DSPR2
+#define D34    ASE_DSPR3
 #define D64    ASE_DSP64
 
 /* MIPS MT ASE support.  */
@@ -430,7 +431,6 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"move",               "d,s",          0x00000021, 0xfc1f07ff, WR_1|RD_2,              INSN2_ALIAS,    I1,             0,      0 },/* addu */
 {"b",                  "p",            0x10000000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1,             0,      0 },/* beq 0,0 */
 {"b",                  "p",            0x04010000, 0xffff0000, UBD,                    INSN2_ALIAS,    I1,             0,      0 },/* bgez 0 */
-{"nal",                        "",             0x04100000, 0xffffffff, WR_31|CBD,              INSN2_ALIAS,    I1,             0,      0 },/* bltzal 0 */
 {"bal",                        "p",            0x04110000, 0xffff0000, WR_31|UBD,              INSN2_ALIAS,    I1,             0,      0 },/* bgezal 0*/
 {"bc",                 "+'",           0xc8000000, 0xfc000000, NODS,                   0,              I37,            0,      0 },
 {"balc",               "+'",           0xe8000000, 0xfc000000, WR_31|NODS,             0,              I37,            0,      0 },
@@ -749,6 +749,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"bltz",               "s,p",          0x04000000, 0xfc1f0000, RD_1|CBD,               0,              I1,             0,      0 },
 {"bltzl",              "s,p",          0x04020000, 0xfc1f0000, RD_1|CBL,               0,              I2|T3,          0,      I37 },
 {"bltzal",             "s,p",          0x04100000, 0xfc1f0000, RD_1|WR_31|CBD,         0,              I1,             0,      I37 },
+{"nal",                        "",             0x04100000, 0xffffffff, WR_31|CBD,              0,              I1,             0,      0 }, /* bltzal 0,.+4 */
 {"bltzall",            "s,p",          0x04120000, 0xfc1f0000, RD_1|WR_31|CBL,         0,              I2|T3,          0,      I37 },
 {"bnez",               "s,p",          0x14000000, 0xfc1f0000, RD_1|CBD,               0,              I1,             0,      0 },
 {"bnezl",              "s,p",          0x54000000, 0xfc1f0000, RD_1|CBL,               0,              I2|T3,          0,      I37 },
@@ -1961,15 +1962,15 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"invalidate",         "t,o(b)",       0xb8000000, 0xfc000000, RD_1|RD_3,              0,              I2,             0,      I37 }, /* same */
 {"invalidate",         "t,A(b)",       0,    (int) M_SWR_AB,   INSN_MACRO,             0,              I2,             0,      I37 }, /* as swr */
 {"swxc1",              "S,t(b)",       0x4c000008, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_S, 0,              I4_33,          0,      I37 },
-{"synciobdma",         "",             0x0000008f, 0xffffffff, NODS,                   0,              IOCT,           0,      0 },
-{"syncs",              "",             0x0000018f, 0xffffffff, NODS,                   0,              IOCT,           0,      0 },
-{"syncw",              "",             0x0000010f, 0xffffffff, NODS,                   0,              IOCT,           0,      0 },
-{"syncws",             "",             0x0000014f, 0xffffffff, NODS,                   0,              IOCT,           0,      0 },
-{"sync_acquire",       "",             0x0000044f, 0xffffffff, NODS,                   0,              I33,            0,      0 },
-{"sync_mb",            "",             0x0000040f, 0xffffffff, NODS,                   0,              I33,            0,      0 },
-{"sync_release",       "",             0x0000048f, 0xffffffff, NODS,                   0,              I33,            0,      0 },
-{"sync_rmb",           "",             0x000004cf, 0xffffffff, NODS,                   0,              I33,            0,      0 },
-{"sync_wmb",           "",             0x0000010f, 0xffffffff, NODS,                   0,              I33,            0,      0 },
+{"synciobdma",         "",             0x0000008f, 0xffffffff, NODS,                   INSN2_ALIAS,    IOCT,           0,      0 },
+{"syncs",              "",             0x0000018f, 0xffffffff, NODS,                   INSN2_ALIAS,    IOCT,           0,      0 },
+{"syncw",              "",             0x0000010f, 0xffffffff, NODS,                   INSN2_ALIAS,    IOCT,           0,      0 },
+{"syncws",             "",             0x0000014f, 0xffffffff, NODS,                   INSN2_ALIAS,    IOCT,           0,      0 },
+{"sync_acquire",       "",             0x0000044f, 0xffffffff, NODS,                   INSN2_ALIAS,    I33,            0,      0 },
+{"sync_mb",            "",             0x0000040f, 0xffffffff, NODS,                   INSN2_ALIAS,    I33,            0,      0 },
+{"sync_release",       "",             0x0000048f, 0xffffffff, NODS,                   INSN2_ALIAS,    I33,            0,      0 },
+{"sync_rmb",           "",             0x000004cf, 0xffffffff, NODS,                   INSN2_ALIAS,    I33,            0,      0 },
+{"sync_wmb",           "",             0x0000010f, 0xffffffff, NODS,                   INSN2_ALIAS,    I33,            0,      0 },
 {"sync",               "",             0x0000000f, 0xffffffff, NODS,                   0,              I2|G1,          0,      0 },
 {"sync",               "1",            0x0000000f, 0xfffff83f, NODS,                   0,              I32,            0,      0 },
 {"sync.p",             "",             0x0000040f, 0xffffffff, NODS,                   0,              I2,             0,      0 },
@@ -2149,6 +2150,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"addwc",              "d,s,t",        0x7c000450, 0xfc0007ff, WR_1|RD_2|RD_3,         0,              0,              D32,    0 },
 {"bitrev",             "d,t",          0x7c0006d2, 0xffe007ff, WR_1|RD_2,              0,              0,              D32,    0 },
 {"bposge32",           "p",            0x041c0000, 0xffff0000, CBD,                    0,              0,              D32,    0 },
+{"bposge32c",          "p",            0x04180000, 0xffff0000, NODS,                   FS,             0,              D34,    0 },
 {"bposge64",           "p",            0x041d0000, 0xffff0000, CBD,                    0,              0,              D64,    0 },
 {"cmp.eq.ph",          "s,t",          0x7c000211, 0xfc00ffff, RD_1|RD_2,              0,              0,              D32,    0 },
 {"cmp.eq.pw",          "s,t",          0x7c000415, 0xfc00ffff, RD_1|RD_2,              0,              0,              D64,    0 },