THIS FILE IS MACHINE GENERATED WITH CGEN.
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of the GNU Binutils and/or GDB, the GNU debugger.
*/
#include "sysdep.h"
-#include <ctype.h>
#include <stdio.h>
#include <stdarg.h>
#include "ansidecl.h"
/* Machine variants. */
static const CGEN_MACH openrisc_cgen_mach_table[] = {
- { "openrisc", "openrisc", MACH_OPENRISC },
- { "or1300", "openrisc:1300", MACH_OR1300 },
- { 0, 0, 0 }
+ { "openrisc", "openrisc", MACH_OPENRISC, 0 },
+ { "or1300", "openrisc:1300", MACH_OR1300, 0 },
+ { 0, 0, 0, 0 }
};
static CGEN_KEYWORD_ENTRY openrisc_cgen_opval_h_gr_entries[] =
{
& openrisc_cgen_opval_h_gr_entries[0],
35,
- 0, 0, 0, 0
+ 0, 0, 0, 0, ""
};
#undef A
+
+/* multi ifield declarations */
+
+const CGEN_MAYBE_MULTI_IFLD OPENRISC_F_I16NC_MULTI_IFIELD [];
+
+
+/* multi ifield definitions */
+
+const CGEN_MAYBE_MULTI_IFLD OPENRISC_F_I16NC_MULTI_IFIELD [] =
+{
+ { 0, &(openrisc_cgen_ifld_table[19]) },
+ { 0, &(openrisc_cgen_ifld_table[20]) },
+ {0,0}
+};
+
/* The operand table. */
#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
{
/* pc: program counter */
{ "pc", OPENRISC_OPERAND_PC, HW_H_PC, 0, 0,
+ { 0, &(openrisc_cgen_ifld_table[0]) },
{ 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* sr: special register */
{ "sr", OPENRISC_OPERAND_SR, HW_H_SR, 0, 0,
+ { 0, 0 },
{ 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* cbit: condition bit */
{ "cbit", OPENRISC_OPERAND_CBIT, HW_H_CBIT, 0, 0,
+ { 0, 0 },
{ 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
/* simm-16: 16 bit signed immediate */
{ "simm-16", OPENRISC_OPERAND_SIMM_16, HW_H_SINT, 15, 16,
+ { 0, &(openrisc_cgen_ifld_table[7]) },
{ 0, { (1<<MACH_BASE) } } },
/* uimm-16: 16 bit unsigned immediate */
{ "uimm-16", OPENRISC_OPERAND_UIMM_16, HW_H_UINT, 15, 16,
+ { 0, &(openrisc_cgen_ifld_table[8]) },
{ 0, { (1<<MACH_BASE) } } },
/* disp-26: pc-rel 26 bit */
{ "disp-26", OPENRISC_OPERAND_DISP_26, HW_H_IADDR, 25, 26,
+ { 0, &(openrisc_cgen_ifld_table[21]) },
{ 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
/* abs-26: abs 26 bit */
{ "abs-26", OPENRISC_OPERAND_ABS_26, HW_H_IADDR, 25, 26,
+ { 0, &(openrisc_cgen_ifld_table[22]) },
{ 0|A(ABS_ADDR), { (1<<MACH_BASE) } } },
/* uimm-5: imm5 */
{ "uimm-5", OPENRISC_OPERAND_UIMM_5, HW_H_UINT, 4, 5,
+ { 0, &(openrisc_cgen_ifld_table[9]) },
{ 0, { (1<<MACH_BASE) } } },
/* rD: destination register */
{ "rD", OPENRISC_OPERAND_RD, HW_H_GR, 25, 5,
+ { 0, &(openrisc_cgen_ifld_table[4]) },
{ 0, { (1<<MACH_BASE) } } },
/* rA: source register A */
{ "rA", OPENRISC_OPERAND_RA, HW_H_GR, 20, 5,
+ { 0, &(openrisc_cgen_ifld_table[5]) },
{ 0, { (1<<MACH_BASE) } } },
/* rB: source register B */
{ "rB", OPENRISC_OPERAND_RB, HW_H_GR, 15, 5,
+ { 0, &(openrisc_cgen_ifld_table[6]) },
{ 0, { (1<<MACH_BASE) } } },
/* op-f-23: f-op23 */
{ "op-f-23", OPENRISC_OPERAND_OP_F_23, HW_H_UINT, 23, 3,
+ { 0, &(openrisc_cgen_ifld_table[15]) },
{ 0, { (1<<MACH_BASE) } } },
/* op-f-3: f-op3 */
{ "op-f-3", OPENRISC_OPERAND_OP_F_3, HW_H_UINT, 25, 5,
+ { 0, &(openrisc_cgen_ifld_table[16]) },
{ 0, { (1<<MACH_BASE) } } },
/* hi16: high 16 bit immediate, sign optional */
{ "hi16", OPENRISC_OPERAND_HI16, HW_H_HI16, 15, 16,
+ { 0, &(openrisc_cgen_ifld_table[7]) },
{ 0|A(SIGN_OPT), { (1<<MACH_BASE) } } },
/* lo16: low 16 bit immediate, sign optional */
{ "lo16", OPENRISC_OPERAND_LO16, HW_H_LO16, 15, 16,
+ { 0, &(openrisc_cgen_ifld_table[11]) },
{ 0|A(SIGN_OPT), { (1<<MACH_BASE) } } },
/* ui16nc: 16 bit immediate, sign optional */
{ "ui16nc", OPENRISC_OPERAND_UI16NC, HW_H_LO16, 10, 16,
+ { 2, &(OPENRISC_F_I16NC_MULTI_IFIELD[0]) },
{ 0|A(SIGN_OPT)|A(VIRTUAL), { (1<<MACH_BASE) } } },
{ 0, 0, 0, 0, 0, {0, {0}} }
};
#undef A
/* Initialize anything needed to be done once, before any cpu_open call. */
+static void init_tables PARAMS ((void));
static void
init_tables ()
{
}
+static const CGEN_MACH * lookup_mach_via_bfd_name
+ PARAMS ((const CGEN_MACH *, const char *));
+static void build_hw_table PARAMS ((CGEN_CPU_TABLE *));
+static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *));
+static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
+static void build_insn_table PARAMS ((CGEN_CPU_TABLE *));
+static void openrisc_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
+
/* Subroutine of openrisc_cgen_cpu_open to look up a mach via its bfd name. */
static const CGEN_MACH *
openrisc_cgen_rebuild_tables (cd)
CGEN_CPU_TABLE *cd;
{
- int i,n_isas;
+ int i;
unsigned int isas = cd->isas;
-#if 0
unsigned int machs = cd->machs;
-#endif
cd->int_insn_p = CGEN_INT_INSN_P;
{
const CGEN_ISA *isa = & openrisc_cgen_isa_table[i];
- /* Default insn sizes of all selected isas must be equal or we set
- the result to 0, meaning "unknown". */
+ /* Default insn sizes of all selected isas must be
+ equal or we set the result to 0, meaning "unknown". */
if (cd->default_insn_bitsize == UNSET)
cd->default_insn_bitsize = isa->default_insn_bitsize;
else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
else
cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
- /* Base insn sizes of all selected isas must be equal or we set
- the result to 0, meaning "unknown". */
+ /* Base insn sizes of all selected isas must be equal
+ or we set the result to 0, meaning "unknown". */
if (cd->base_insn_bitsize == UNSET)
cd->base_insn_bitsize = isa->base_insn_bitsize;
else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
cd->min_insn_bitsize = isa->min_insn_bitsize;
if (isa->max_insn_bitsize > cd->max_insn_bitsize)
cd->max_insn_bitsize = isa->max_insn_bitsize;
-
- ++n_isas;
}
-#if 0 /* Does nothing?? */
/* Data derived from the mach spec. */
for (i = 0; i < MAX_MACHS; ++i)
if (((1 << i) & machs) != 0)
{
const CGEN_MACH *mach = & openrisc_cgen_mach_table[i];
- ++n_machs;
+ if (mach->insn_chunk_bitsize != 0)
+ {
+ if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
+ {
+ fprintf (stderr, "openrisc_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
+ cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
+ abort ();
+ }
+
+ cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
+ }
}
-#endif
/* Determine which hw elements are used by MACH. */
build_hw_table (cd);
openrisc_cgen_cpu_close (cd)
CGEN_CPU_DESC cd;
{
+ unsigned int i;
+ CGEN_INSN *insns;
+
+ if (cd->macro_insn_table.init_entries)
+ {
+ insns = cd->macro_insn_table.init_entries;
+ for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
+ {
+ if (CGEN_INSN_RX ((insns)))
+ regfree(CGEN_INSN_RX (insns));
+ }
+ }
+
+ if (cd->insn_table.init_entries)
+ {
+ insns = cd->insn_table.init_entries;
+ for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
+ {
+ if (CGEN_INSN_RX (insns))
+ regfree(CGEN_INSN_RX (insns));
+ }
+ }
+
+
+
+ if (cd->macro_insn_table.init_entries)
+ free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
+
if (cd->insn_table.init_entries)
free ((CGEN_INSN *) cd->insn_table.init_entries);
+
if (cd->hw_table.entries)
free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
+
+ if (cd->operand_table.entries)
+ free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
+
free (cd);
}
projects / deliverable / binutils-gdb.git / blobdiff