* breakpoint (update_watchpoint): Minor comment adjustment.

[deliverable/binutils-gdb.git] / opcodes / or32-opc.c

diff --git a/opcodes/or32-opc.c b/opcodes/or32-opc.c
index 059bf20bb5bd173ecf3f6ffe8a0bad307a6a1ef2..24ab5cf28093bba197ef618f937a25006346661a 100644 (file)
--- a/opcodes/or32-opc.c
+++ b/opcodes/or32-opc.c
@@ -1,18 +1,18 @@
 /* Table of opcodes for the OpenRISC 1000 ISA.
-   Copyright 2002, 2004, 2005 Free Software Foundation, Inc.
+   Copyright 2002, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
    Contributed by Damjan Lampret (lampret@opencores.org).
    
-   This file is part of gen_or1k_isa, or1k, GDB and GAS.
+   This file is part of the GNU opcodes library.
 
-   This program is free software; you can redistribute it and/or modify
+   This library is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
 
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
+   It is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
@@ -586,7 +586,8 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask)
          c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first)));
          if (c)
            {
-             debug (8, "%li> #%X -> %lu\n", (long)(next - automata), i, (long)(cur - automata));
+             debug (8, "%li> #%X -> %lu\n", (long)(next - automata), i,
+                    (unsigned long)(cur - automata));
              *next = cur - automata;
              cur = c;   
            }
@@ -950,8 +951,10 @@ static void
 or32_print_register (char param_ch, char *encoding, unsigned long insn)
 {
   int regnum = or32_extract(param_ch, encoding, insn);
-  
-  sprintf (disassembled, "%sr%d", disassembled, regnum);
+  char s_regnum[20];
+
+  sprintf (s_regnum, "r%d", regnum);
+  strcat (disassembled, s_regnum);
 }
 
 /* Print immediate. Used only by print_insn.  */
@@ -960,18 +963,20 @@ static void
 or32_print_immediate (char param_ch, char *encoding, unsigned long insn)
 {
   int imm = or32_extract (param_ch, encoding, insn);
+  char s_imm[20];
 
   imm = extend_imm (imm, param_ch);
-  
+
   if (letter_signed (param_ch))
     {
       if (imm < 0)
-        sprintf (disassembled, "%s%d", disassembled, imm);
+       sprintf (s_imm, "%d", imm);
       else
-        sprintf (disassembled, "%s0x%x", disassembled, imm);
+       sprintf (s_imm, "0x%x", imm);
     }
   else
-    sprintf (disassembled, "%s%#x", disassembled, imm);
+    sprintf (s_imm, "%#x", imm);
+  strcat (disassembled, s_imm);
 }
 
 /* Disassemble one instruction from insn to disassemble.
@@ -1004,14 +1009,22 @@ disassemble_insn (unsigned long insn)
               if (strchr (opcode->encoding, *s))
                 or32_print_immediate (*s, opcode->encoding, insn);
               else
-                sprintf (disassembled, "%s%c", disassembled, *s);
+               {
+                 char s_encoding[2] = { *s, '\0' };
+
+                 strcat (disassembled, s_encoding);
+               }
+
             }
         }
     }
   else
     {
+      char s_insn[20];
+
       /* This used to be %8x for binutils.  */
-      sprintf (disassembled, "%s.word 0x%08lx", disassembled, insn);
+      sprintf (s_insn, ".word 0x%08lx", insn);
+      strcat (disassembled, s_insn);
     }
 
   return insn_len (insn);