*** empty log message ***

[deliverable/binutils-gdb.git] / opcodes / ppc-opc.c

diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 3d7bdb19793280d85659d19717f1186047413894..70167f7e9cb437832aefef0dfc390e33c95bd135 100644 (file)
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -510,6 +510,10 @@ const struct powerpc_operand powerpc_operands[] =
 #define WS_MASK (0x7 << 11)
   { 3, 11, 0, 0, 0 },
 
+  /* The L field in an mtmsrd instruction */
+#define MTMSRD_L WS + 1
+  { 1, 16, 0, 0, PPC_OPERAND_OPTIONAL },
+
 };
 
 /* The functions used to insert and extract complicated operands.  */
@@ -1412,6 +1416,9 @@ extract_tbr (insn, dialect, invalid)
 /* An X_MASK with the RA and RB fields fixed.  */
 #define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
 
+/* An XRARB_MASK, but with the L bit clear. */
+#define XRLARB_MASK (XRARB_MASK & ~((unsigned long) 1 << 16))
+
 /* An X_MASK with the RT and RA fields fixed.  */
 #define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
 
@@ -1806,7 +1813,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 { "vctuxs",    VX(4,  906), VX_MASK,   PPCVEC,         { VD, VB, UIMM } },
 { "vexptefp",  VX(4,  394), VX_MASK,   PPCVEC,         { VD, VB } },
 { "vlogefp",   VX(4,  458), VX_MASK,   PPCVEC,         { VD, VB } },
-{ "vmaddfp",   VXA(4,  46), VXA_MASK,  PPCVEC,         { VD, VA, VB, VC } },
+{ "vmaddfp",   VXA(4,  46), VXA_MASK,  PPCVEC,         { VD, VA, VC, VB } },
 { "vmaxfp",    VX(4, 1034), VX_MASK,   PPCVEC,         { VD, VA, VB } },
 { "vmaxsb",    VX(4,  258), VX_MASK,   PPCVEC,         { VD, VA, VB } },
 { "vmaxsh",    VX(4,  322), VX_MASK,   PPCVEC,         { VD, VA, VB } },
@@ -2950,7 +2957,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 { "wrteei",  X(31,163),        XE_MASK,        PPC403,         { E } },
 { "wrteei",  X(31,163),        XE_MASK,        BOOKE,          { E } },
 
-{ "mtmsrd",  X(31,178),        XRARB_MASK,     PPC64,          { RS } },
+{ "mtmsrd",  X(31,178),        XRLARB_MASK,    PPC64,          { RS, MTMSRD_L } },
 
 { "stdux",   X(31,181),        X_MASK,         PPC64,          { RS, RAS, RB } },
 
@@ -3058,6 +3065,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 { "addo.",   XO(31,266,1,1), XO_MASK,  PPCCOM,         { RT, RA, RB } },
 { "caxo.",   XO(31,266,1,1), XO_MASK,  PWRCOM,         { RT, RA, RB } },
 
+{ "tlbiel",  X(31,274), XRTRA_MASK,    POWER4,         { RB } },
+
 { "mfapidi", X(31,275), X_MASK,                BOOKE,          { RT, RA } },
 
 { "lscbx",   XRC(31,277,0), X_MASK,    M601,           { RT, RA, RB } },
@@ -3665,7 +3674,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 { "rac",     X(31,818),        X_MASK,         PWRCOM,         { RT, RA, RB } },
 
 { "dss",     XDSS(31,822,0), XDSS_MASK,        PPCVEC,         { STRM } },
-{ "dssall",  XDSS(31,822,1), XDSS_MASK,        PPCVEC,         { STRM } },
+{ "dssall",  XDSS(31,822,1), XDSS_MASK,        PPCVEC,         { 0 } },
 
 { "srawi",   XRC(31,824,0), X_MASK,    PPCCOM,         { RA, RS, SH } },
 { "srai",    XRC(31,824,0), X_MASK,    PWRCOM,         { RA, RS, SH } },
@@ -3681,7 +3690,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 { "tlbsx.",  XRC(31,914,1), X_MASK,    PPC403,         { RT, RA, RB } },
 
 { "tlbsx",   XRC(31,914,0), X_MASK,    BOOKE,          { RA, RB } },
+{ "tlbsx.",  XRC(31,914,1), X_MASK,    BOOKE,          { RA, RB } },
 { "tlbsxe",  XRC(31,915,0), X_MASK,    BOOKE,          { RA, RB } },
+{ "tlbsxe.", XRC(31,915,1), X_MASK,    BOOKE,          { RA, RB } },
 
 { "slbmfee", X(31,915), XRA_MASK,      PPC64,          { RT, RB } },