/* ppc-opc.c -- PowerPC opcode list
- Copyright (c) 1994, 95, 96, 97, 98, 99, 2000 Free Software Foundation, Inc.
+ Copyright 1994, 1995, 1996, 1997, 1998, 2000, 2001, 2002
+ Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils.
\f
/* Local insertion and extraction functions. */
-static unsigned long insert_bat PARAMS ((unsigned long, long, const char **));
-static long extract_bat PARAMS ((unsigned long, int *));
-static unsigned long insert_bba PARAMS ((unsigned long, long, const char **));
-static long extract_bba PARAMS ((unsigned long, int *));
-static unsigned long insert_bd PARAMS ((unsigned long, long, const char **));
-static long extract_bd PARAMS ((unsigned long, int *));
-static unsigned long insert_bdm PARAMS ((unsigned long, long, const char **));
-static long extract_bdm PARAMS ((unsigned long, int *));
-static unsigned long insert_bdp PARAMS ((unsigned long, long, const char **));
-static long extract_bdp PARAMS ((unsigned long, int *));
-static int valid_bo PARAMS ((long));
-static unsigned long insert_bo PARAMS ((unsigned long, long, const char **));
-static long extract_bo PARAMS ((unsigned long, int *));
-static unsigned long insert_boe PARAMS ((unsigned long, long, const char **));
-static long extract_boe PARAMS ((unsigned long, int *));
-static unsigned long insert_ds PARAMS ((unsigned long, long, const char **));
-static long extract_ds PARAMS ((unsigned long, int *));
-static unsigned long insert_li PARAMS ((unsigned long, long, const char **));
-static long extract_li PARAMS ((unsigned long, int *));
-static unsigned long insert_mbe PARAMS ((unsigned long, long, const char **));
-static long extract_mbe PARAMS ((unsigned long, int *));
-static unsigned long insert_mb6 PARAMS ((unsigned long, long, const char **));
-static long extract_mb6 PARAMS ((unsigned long, int *));
-static unsigned long insert_nb PARAMS ((unsigned long, long, const char **));
-static long extract_nb PARAMS ((unsigned long, int *));
-static unsigned long insert_nsi PARAMS ((unsigned long, long, const char **));
-static long extract_nsi PARAMS ((unsigned long, int *));
-static unsigned long insert_ral PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_ram PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_ras PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_rbs PARAMS ((unsigned long, long, const char **));
-static long extract_rbs PARAMS ((unsigned long, int *));
-static unsigned long insert_sh6 PARAMS ((unsigned long, long, const char **));
-static long extract_sh6 PARAMS ((unsigned long, int *));
-static unsigned long insert_spr PARAMS ((unsigned long, long, const char **));
-static long extract_spr PARAMS ((unsigned long, int *));
-static unsigned long insert_tbr PARAMS ((unsigned long, long, const char **));
-static long extract_tbr PARAMS ((unsigned long, int *));
+static unsigned long insert_bat
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bat
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_bba
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bba
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_bd
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bd
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_bdm
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bdm
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_bdp
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bdp
+ PARAMS ((unsigned long, int, int *));
+static int valid_bo
+ PARAMS ((long, int));
+static unsigned long insert_bo
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_bo
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_boe
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_boe
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_ds
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_ds
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_de
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_de
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_des
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_des
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_li
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_li
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_mbe
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_mbe
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_mb6
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_mb6
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_nb
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_nb
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_nsi
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_nsi
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_ral
+ PARAMS ((unsigned long, long, int, const char **));
+static unsigned long insert_ram
+ PARAMS ((unsigned long, long, int, const char **));
+static unsigned long insert_ras
+ PARAMS ((unsigned long, long, int, const char **));
+static unsigned long insert_rbs
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_rbs
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_sh6
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_sh6
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_spr
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_spr
+ PARAMS ((unsigned long, int, int *));
+static unsigned long insert_tbr
+ PARAMS ((unsigned long, long, int, const char **));
+static long extract_tbr
+ PARAMS ((unsigned long, int, int *));
\f
/* The operands table.
#define CR BT + 1
{ 3, 18, 0, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
+ /* The CT field in an X form instruction. */
+#define CT CR + 1
+ { 5, 21, 0, 0, PPC_OPERAND_OPTIONAL },
+
/* The D field in a D form instruction. This is a displacement off
a register, and implies that the next operand is a register in
parentheses. */
-#define D CR + 1
+#define D CT + 1
{ 16, 0, 0, 0, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+ /* The DE field in a DE form instruction. This is like D, but is 12
+ bits only. */
+#define DE D + 1
+ { 14, 0, insert_de, extract_de, PPC_OPERAND_PARENS },
+
+ /* The DES field in a DES form instruction. This is like DS, but is 14
+ bits only (12 stored.) */
+#define DES DE + 1
+ { 14, 0, insert_des, extract_des, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+
/* The DS field in a DS form instruction. This is like D, but the
lower two bits are forced to zero. */
-#define DS D + 1
- { 16, 0, insert_ds, extract_ds, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
+#define DS DES + 1
+ { 16, 0, insert_ds, extract_ds,
+ PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED | PPC_OPERAND_DS },
/* The E field in a wrteei instruction. */
#define E DS + 1
#define LIA LI + 1
{ 26, 0, insert_li, extract_li, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
+ /* The LS field in an X (sync) form instruction. */
+#define LS LIA + 1
+ { 2, 21, 0, 0, PPC_OPERAND_OPTIONAL },
+
/* The MB field in an M form instruction. */
-#define MB LIA + 1
+#define MB LS + 1
#define MB_MASK (0x1f << 6)
{ 5, 6, 0, 0, 0 },
#define MB6_MASK (0x3f << 5)
{ 6, 5, insert_mb6, extract_mb6, 0 },
+ /* The MO field in an mbar instruction. */
+#define MO MB6 + 1
+ { 5, 21, 0, 0, 0 },
+
/* The NB field in an X form instruction. The value 32 is stored as
0. */
-#define NB MB6 + 1
+#define NB MO + 1
{ 6, 11, insert_nb, extract_nb, 0 },
/* The NSI field in a D form instruction. This is the same as the
#define SR SPRG + 1
{ 4, 16, 0, 0, 0 },
+ /* The STRM field in an X AltiVec form instruction. */
+#define STRM SR + 1
+#define STRM_MASK (0x3 << 21)
+ { 2, 21, 0, 0, 0 },
+
/* The SV field in a POWER SC form instruction. */
-#define SV SR + 1
+#define SV STRM + 1
{ 14, 2, 0, 0, 0 },
/* The TBR field in an XFX form instruction. This is like the SPR
/* The VA field in a VA, VX or VXR form instruction. */
#define VA UI + 1
#define VA_MASK (0x1f << 16)
- {5, 16, 0, 0, PPC_OPERAND_VR},
+ { 5, 16, 0, 0, PPC_OPERAND_VR },
/* The VB field in a VA, VX or VXR form instruction. */
#define VB VA + 1
#define VB_MASK (0x1f << 11)
- {5, 11, 0, 0, PPC_OPERAND_VR},
+ { 5, 11, 0, 0, PPC_OPERAND_VR },
/* The VC field in a VA form instruction. */
#define VC VB + 1
#define VC_MASK (0x1f << 6)
- {5, 6, 0, 0, PPC_OPERAND_VR},
+ { 5, 6, 0, 0, PPC_OPERAND_VR },
/* The VD or VS field in a VA, VX, VXR or X form instruction. */
#define VD VC + 1
#define VS VD
#define VD_MASK (0x1f << 21)
- {5, 21, 0, 0, PPC_OPERAND_VR},
+ { 5, 21, 0, 0, PPC_OPERAND_VR },
/* The SIMM field in a VX form instruction. */
#define SIMM VD + 1
/* The SHB field in a VA form instruction. */
#define SHB UIMM + 1
{ 4, 6, 0, 0, 0 },
+
+ /* The WS field. */
+#define WS SHB + 1
+#define WS_MASK (0x7 << 11)
+ { 3, 11, 0, 0, 0 },
+
+ /* The L field in an mtmsrd instruction */
+#define MTMSRD_L WS + 1
+ { 1, 16, 0, 0, PPC_OPERAND_OPTIONAL },
+
};
/* The functions used to insert and extract complicated operands. */
/*ARGSUSED*/
static unsigned long
-insert_bat (insn, value, errmsg)
+insert_bat (insn, value, dialect, errmsg)
unsigned long insn;
long value ATTRIBUTE_UNUSED;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (((insn >> 21) & 0x1f) << 16);
}
static long
-extract_bat (insn, invalid)
+extract_bat (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid;
{
if (invalid != (int *) NULL
/*ARGSUSED*/
static unsigned long
-insert_bba (insn, value, errmsg)
+insert_bba (insn, value, dialect, errmsg)
unsigned long insn;
long value ATTRIBUTE_UNUSED;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (((insn >> 16) & 0x1f) << 11);
}
static long
-extract_bba (insn, invalid)
+extract_bba (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid;
{
if (invalid != (int *) NULL
/*ARGSUSED*/
static unsigned long
-insert_bd (insn, value, errmsg)
+insert_bd (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (value & 0xfffc);
/*ARGSUSED*/
static long
-extract_bd (insn, invalid)
+extract_bd (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
+ return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
}
/* The BD field in a B form instruction when the - modifier is used.
This modifier means that the branch is not expected to be taken.
- We must set the y bit of the BO field to 1 if the offset is
- negative. When extracting, we require that the y bit be 1 and that
- the offset be positive, since if the y bit is 0 we just want to
- print the normal form of the instruction. */
+ For chips built to versions of the architecture prior to version 2
+ (ie. not Power4 compatible), we set the y bit of the BO field to 1
+ if the offset is negative. When extracting, we require that the y
+ bit be 1 and that the offset be positive, since if the y bit is 0
+ we just want to print the normal form of the instruction.
+ Power4 compatible targets use two bits, "a", and "t", instead of
+ the "y" bit. "at" == 00 => no hint, "at" == 01 => unpredictable,
+ "at" == 10 => not taken, "at" == 11 => taken. The "t" bit is 00001
+ in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000
+ for branch on CTR. We only handle the taken/not-taken hint here. */
/*ARGSUSED*/
static unsigned long
-insert_bdm (insn, value, errmsg)
+insert_bdm (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect;
const char **errmsg ATTRIBUTE_UNUSED;
{
- if ((value & 0x8000) != 0)
- insn |= 1 << 21;
+ if ((dialect & PPC_OPCODE_POWER4) == 0)
+ {
+ if ((value & 0x8000) != 0)
+ insn |= 1 << 21;
+ }
+ else
+ {
+ if ((insn & (0x14 << 21)) == (0x04 << 21))
+ insn |= 0x02 << 21;
+ else if ((insn & (0x14 << 21)) == (0x10 << 21))
+ insn |= 0x08 << 21;
+ }
return insn | (value & 0xfffc);
}
static long
-extract_bdm (insn, invalid)
+extract_bdm (insn, dialect, invalid)
unsigned long insn;
+ int dialect;
int *invalid;
{
- if (invalid != (int *) NULL
- && ((insn & (1 << 21)) == 0
- || (insn & (1 << 15)) == 0))
- *invalid = 1;
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
+ if (invalid != (int *) NULL)
+ {
+ if ((dialect & PPC_OPCODE_POWER4) == 0)
+ {
+ if (((insn & (1 << 21)) == 0) != ((insn & (1 << 15)) == 0))
+ *invalid = 1;
+ }
+ else
+ {
+ if ((insn & (0x17 << 21)) != (0x06 << 21)
+ && (insn & (0x1d << 21)) != (0x18 << 21))
+ *invalid = 1;
+ }
+ }
+ return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
}
/* The BD field in a B form instruction when the + modifier is used.
/*ARGSUSED*/
static unsigned long
-insert_bdp (insn, value, errmsg)
+insert_bdp (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect;
const char **errmsg ATTRIBUTE_UNUSED;
{
- if ((value & 0x8000) == 0)
- insn |= 1 << 21;
+ if ((dialect & PPC_OPCODE_POWER4) == 0)
+ {
+ if ((value & 0x8000) == 0)
+ insn |= 1 << 21;
+ }
+ else
+ {
+ if ((insn & (0x14 << 21)) == (0x04 << 21))
+ insn |= 0x03 << 21;
+ else if ((insn & (0x14 << 21)) == (0x10 << 21))
+ insn |= 0x09 << 21;
+ }
return insn | (value & 0xfffc);
}
static long
-extract_bdp (insn, invalid)
+extract_bdp (insn, dialect, invalid)
unsigned long insn;
+ int dialect;
int *invalid;
{
- if (invalid != (int *) NULL
- && ((insn & (1 << 21)) == 0
- || (insn & (1 << 15)) != 0))
- *invalid = 1;
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
+ if (invalid != (int *) NULL)
+ {
+ if ((dialect & PPC_OPCODE_POWER4) == 0)
+ {
+ if (((insn & (1 << 21)) == 0) == ((insn & (1 << 15)) == 0))
+ *invalid = 1;
+ }
+ else
+ {
+ if ((insn & (0x17 << 21)) != (0x07 << 21)
+ && (insn & (0x1d << 21)) != (0x19 << 21))
+ *invalid = 1;
+ }
+ }
+ return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
}
/* Check for legal values of a BO field. */
static int
-valid_bo (value)
+valid_bo (value, dialect)
long value;
+ int dialect;
{
- /* Certain encodings have bits that are required to be zero. These
- are (z must be zero, y may be anything):
- 001zy
- 011zy
- 1z00y
- 1z01y
- 1z1zz
- */
- switch (value & 0x14)
+ if ((dialect & PPC_OPCODE_POWER4) == 0)
+ {
+ /* Certain encodings have bits that are required to be zero.
+ These are (z must be zero, y may be anything):
+ 001zy
+ 011zy
+ 1z00y
+ 1z01y
+ 1z1zz
+ */
+ switch (value & 0x14)
+ {
+ default:
+ case 0:
+ return 1;
+ case 0x4:
+ return (value & 0x2) == 0;
+ case 0x10:
+ return (value & 0x8) == 0;
+ case 0x14:
+ return value == 0x14;
+ }
+ }
+ else
{
- default:
- case 0:
- return 1;
- case 0x4:
- return (value & 0x2) == 0;
- case 0x10:
- return (value & 0x8) == 0;
- case 0x14:
- return value == 0x14;
+ /* Certain encodings have bits that are required to be zero.
+ These are (z must be zero, a & t may be anything):
+ 0000z
+ 0001z
+ 0100z
+ 0101z
+ 001at
+ 011at
+ 1a00t
+ 1a01t
+ 1z1zz
+ */
+ if ((value & 0x14) == 0)
+ return (value & 0x1) == 0;
+ else if ((value & 0x14) == 0x14)
+ return value == 0x14;
+ else
+ return 1;
}
}
the field to an illegal value. */
static unsigned long
-insert_bo (insn, value, errmsg)
+insert_bo (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect;
const char **errmsg;
{
if (errmsg != (const char **) NULL
- && ! valid_bo (value))
+ && ! valid_bo (value, dialect))
*errmsg = _("invalid conditional option");
return insn | ((value & 0x1f) << 21);
}
static long
-extract_bo (insn, invalid)
+extract_bo (insn, dialect, invalid)
unsigned long insn;
+ int dialect;
int *invalid;
{
long value;
value = (insn >> 21) & 0x1f;
if (invalid != (int *) NULL
- && ! valid_bo (value))
+ && ! valid_bo (value, dialect))
*invalid = 1;
return value;
}
extracting it, we force it to be even. */
static unsigned long
-insert_boe (insn, value, errmsg)
+insert_boe (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect;
const char **errmsg;
{
if (errmsg != (const char **) NULL)
{
- if (! valid_bo (value))
+ if (! valid_bo (value, dialect))
*errmsg = _("invalid conditional option");
else if ((value & 1) != 0)
*errmsg = _("attempt to set y bit when using + or - modifier");
}
static long
-extract_boe (insn, invalid)
+extract_boe (insn, dialect, invalid)
unsigned long insn;
+ int dialect;
int *invalid;
{
long value;
value = (insn >> 21) & 0x1f;
if (invalid != (int *) NULL
- && ! valid_bo (value))
+ && ! valid_bo (value, dialect))
*invalid = 1;
return value & 0x1e;
}
/*ARGSUSED*/
static unsigned long
-insert_ds (insn, value, errmsg)
+insert_ds (insn, value, dialect, errmsg)
unsigned long insn;
long value;
- const char **errmsg ATTRIBUTE_UNUSED;
+ int dialect ATTRIBUTE_UNUSED;
+ const char **errmsg;
{
+ if ((value & 3) != 0 && errmsg != NULL)
+ *errmsg = _("offset not a multiple of 4");
return insn | (value & 0xfffc);
}
/*ARGSUSED*/
static long
-extract_ds (insn, invalid)
+extract_ds (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
+ return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
+}
+
+/* The DE field in a DE form instruction. */
+
+/*ARGSUSED*/
+static unsigned long
+insert_de (insn, value, dialect, errmsg)
+ unsigned long insn;
+ long value;
+ int dialect ATTRIBUTE_UNUSED;
+ const char **errmsg;
+{
+ if ((value > 2047 || value < -2048) && errmsg != NULL)
+ *errmsg = _("offset not between -2048 and 2047");
+ return insn | ((value << 4) & 0xfff0);
+}
+
+/*ARGSUSED*/
+static long
+extract_de (insn, dialect, invalid)
+ unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
+ int *invalid ATTRIBUTE_UNUSED;
+{
+ return (insn & 0xfff0) >> 4;
+}
+
+/* The DES field in a DES form instruction. */
+
+/*ARGSUSED*/
+static unsigned long
+insert_des (insn, value, dialect, errmsg)
+ unsigned long insn;
+ long value;
+ int dialect ATTRIBUTE_UNUSED;
+ const char **errmsg;
+{
+ if ((value > 8191 || value < -8192) && errmsg != NULL)
+ *errmsg = _("offset not between -8192 and 8191");
+ else if ((value & 3) != 0 && errmsg != NULL)
+ *errmsg = _("offset not a multiple of 4");
+ return insn | ((value << 2) & 0xfff0);
+}
+
+/*ARGSUSED*/
+static long
+extract_des (insn, dialect, invalid)
+ unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
+ int *invalid ATTRIBUTE_UNUSED;
+{
+ return (((insn >> 2) & 0x3ffc) ^ 0x2000) - 0x2000;
}
/* The LI field in an I form instruction. The lower two bits are
/*ARGSUSED*/
static unsigned long
-insert_li (insn, value, errmsg)
+insert_li (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
if ((value & 3) != 0 && errmsg != (const char **) NULL)
/*ARGSUSED*/
static long
-extract_li (insn, invalid)
+extract_li (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
- if ((insn & 0x2000000) != 0)
- return (insn & 0x3fffffc) - 0x4000000;
- else
- return insn & 0x3fffffc;
+ return ((insn & 0x3fffffc) ^ 0x2000000) - 0x2000000;
}
/* The MB and ME fields in an M form instruction expressed as a single
instruction which uses a field of this type. */
static unsigned long
-insert_mbe (insn, value, errmsg)
+insert_mbe (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
unsigned long uval, mask;
/* me: location of last 1->0 transition */
/* count: # transitions */
- for (mx = 0, mask = 1 << 31; mx < 32; ++mx, mask >>= 1)
+ for (mx = 0, mask = (long) 1 << 31; mx < 32; ++mx, mask >>= 1)
{
if ((uval & mask) && !last)
{
}
static long
-extract_mbe (insn, invalid)
+extract_mbe (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid;
{
long ret;
/*ARGSUSED*/
static unsigned long
-insert_mb6 (insn, value, errmsg)
+insert_mb6 (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | ((value & 0x1f) << 6) | (value & 0x20);
/*ARGSUSED*/
static long
-extract_mb6 (insn, invalid)
+extract_mb6 (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
return ((insn >> 6) & 0x1f) | (insn & 0x20);
0. */
static unsigned long
-insert_nb (insn, value, errmsg)
+insert_nb (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
if (value < 0 || value > 32)
/*ARGSUSED*/
static long
-extract_nb (insn, invalid)
+extract_nb (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
long ret;
/*ARGSUSED*/
static unsigned long
-insert_nsi (insn, value, errmsg)
+insert_nsi (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | ((- value) & 0xffff);
}
static long
-extract_nsi (insn, invalid)
+extract_nsi (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid;
{
if (invalid != (int *) NULL)
*invalid = 1;
- if ((insn & 0x8000) != 0)
- return - ((long)(insn & 0xffff) - 0x10000);
- else
- return - (long)(insn & 0xffff);
+ return - (((insn & 0xffff) ^ 0x8000) - 0x8000);
}
/* The RA field in a D or X form instruction which is an updating
equal the RT field. */
static unsigned long
-insert_ral (insn, value, errmsg)
+insert_ral (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
if (value == 0
restrictions. */
static unsigned long
-insert_ram (insn, value, errmsg)
+insert_ram (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
if ((unsigned long) value >= ((insn >> 21) & 0x1f))
field may not be zero. */
static unsigned long
-insert_ras (insn, value, errmsg)
+insert_ras (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg;
{
if (value == 0)
/*ARGSUSED*/
static unsigned long
-insert_rbs (insn, value, errmsg)
+insert_rbs (insn, value, dialect, errmsg)
unsigned long insn;
long value ATTRIBUTE_UNUSED;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | (((insn >> 21) & 0x1f) << 11);
}
static long
-extract_rbs (insn, invalid)
+extract_rbs (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid;
{
if (invalid != (int *) NULL
/*ARGSUSED*/
static unsigned long
-insert_sh6 (insn, value, errmsg)
+insert_sh6 (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
/*ARGSUSED*/
static long
-extract_sh6 (insn, invalid)
+extract_sh6 (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
lower 5 bits are stored in the upper 5 and vice- versa. */
static unsigned long
-insert_spr (insn, value, errmsg)
+insert_spr (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
}
static long
-extract_spr (insn, invalid)
+extract_spr (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
#define TB (268)
static unsigned long
-insert_tbr (insn, value, errmsg)
+insert_tbr (insn, value, dialect, errmsg)
unsigned long insn;
long value;
+ int dialect ATTRIBUTE_UNUSED;
const char **errmsg ATTRIBUTE_UNUSED;
{
if (value == 0)
}
static long
-extract_tbr (insn, invalid)
+extract_tbr (insn, dialect, invalid)
unsigned long insn;
+ int dialect ATTRIBUTE_UNUSED;
int *invalid ATTRIBUTE_UNUSED;
{
long ret;
/* A BBO_MASK with the y bit of the BO field removed. This permits
matching a conditional branch regardless of the setting of the y
- bit. */
-#define Y_MASK (((unsigned long)1) << 21)
-#define BBOY_MASK (BBO_MASK &~ Y_MASK)
+ bit. Similarly for the 'at' bits used for power4 branch hints. */
+#define Y_MASK (((unsigned long) 1) << 21)
+#define AT1_MASK (((unsigned long) 3) << 21)
+#define AT2_MASK (((unsigned long) 9) << 21)
+#define BBOY_MASK (BBO_MASK &~ Y_MASK)
+#define BBOAT_MASK (BBO_MASK &~ AT1_MASK)
/* A B form instruction setting the BO field and the condition bits of
the BI field. */
/* A BBOCB_MASK with the y bit of the BO field removed. */
#define BBOYCB_MASK (BBOCB_MASK &~ Y_MASK)
+#define BBOATCB_MASK (BBOCB_MASK &~ AT1_MASK)
+#define BBOAT2CB_MASK (BBOCB_MASK &~ AT2_MASK)
/* A BBOYCB_MASK in which the BI field is fixed. */
#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK)
+#define BBOATBI_MASK (BBOAT2CB_MASK | BI_MASK)
/* The main opcode mask with the RA field clear. */
#define DRA_MASK (OP_MASK | RA_MASK)
#define DSO(op, xop) (OP (op) | ((xop) & 0x3))
#define DS_MASK DSO (0x3f, 3)
+/* A DE form instruction. */
+#define DEO(op, xop) (OP (op) | ((xop) & 0xf))
+#define DE_MASK DEO (0x3e, 0xf)
+
/* An M form instruction. */
#define M(op, rc) (OP (op) | ((rc) & 1))
#define M_MASK M (0x3f, 1)
#define VX_MASK VX(0x3f, 0x7ff)
/* An VA form instruction. */
-#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x07f))
+#define VXA(op, xop) (OP (op) | (((unsigned long)(xop)) & 0x03f))
/* The mask for an VA form instruction. */
-#define VXA_MASK VXA(0x3f, 0x7f)
+#define VXA_MASK VXA(0x3f, 0x3f)
/* An VXR form instruction. */
#define VXR(op, xop, rc) (OP (op) | (((rc) & 1) << 10) | (((unsigned long)(xop)) & 0x3ff))
/* An X_MASK with the RA and RB fields fixed. */
#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
+/* An XRARB_MASK, but with the L bit clear. */
+#define XRLARB_MASK (XRARB_MASK & ~((unsigned long) 1 << 16))
+
/* An X_MASK with the RT and RA fields fixed. */
#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
+/* An XRTRA_MASK, but with L bit clear. */
+#define XRTLRA_MASK (XRTRA_MASK & ~((unsigned long) 1 << 21))
+
/* An X form comparison instruction. */
#define XCMPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21))
#define XTO(op, xop, to) (X ((op), (xop)) | ((((unsigned long)(to)) & 0x1f) << 21))
#define XTO_MASK (X_MASK | TO_MASK)
+/* An X form tlb instruction with the SH field specified. */
+#define XTLB(op, xop, sh) (X ((op), (xop)) | ((((unsigned long)(sh)) & 0x1f) << 11))
+#define XTLB_MASK (X_MASK | SH_MASK)
+
+/* An X form sync instruction. */
+#define XSYNC(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 3) << 21))
+
+/* An X form sync instruction with everything filled in except the LS field. */
+#define XSYNC_MASK (0xff9fffff)
+
+/* An X form AltiVec dss instruction. */
+#define XDSS(op, xop, a) (X ((op), (xop)) | ((((unsigned long)(a)) & 1) << 25))
+#define XDSS_MASK XDSS(0x3f, 0x3ff, 1)
+
/* An XFL form instruction. */
#define XFL(op, xop, rc) (OP (op) | ((((unsigned long)(xop)) & 0x3ff) << 1) | (((unsigned long)(rc)) & 1))
#define XFL_MASK (XFL (0x3f, 0x3ff, 1) | (((unsigned long)1) << 25) | (((unsigned long)1) << 16))
#define BODNZFP (0x1)
#define BODZF (0x2)
#define BODZFP (0x3)
-#define BOF (0x4)
-#define BOFP (0x5)
#define BODNZT (0x8)
#define BODNZTP (0x9)
#define BODZT (0xa)
#define BODZTP (0xb)
+
+#define BOF (0x4)
+#define BOFP (0x5)
+#define BOFM4 (0x6)
+#define BOFP4 (0x7)
#define BOT (0xc)
#define BOTP (0xd)
+#define BOTM4 (0xe)
+#define BOTP4 (0xf)
+
#define BODNZ (0x10)
#define BODNZP (0x11)
#define BODZ (0x12)
#define BODZP (0x13)
+#define BODNZM4 (0x18)
+#define BODNZP4 (0x19)
+#define BODZM4 (0x1a)
+#define BODZP4 (0x1b)
+
#define BOU (0x14)
/* The BI condition bit encodings used in extended conditional branch
#undef PPC
#define PPC PPC_OPCODE_PPC | PPC_OPCODE_ANY
#define PPCCOM PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_ANY
-#define PPC32 PPC_OPCODE_PPC | PPC_OPCODE_32 | PPC_OPCODE_ANY
-#define PPC64 PPC_OPCODE_PPC | PPC_OPCODE_64 | PPC_OPCODE_ANY
+#define NOPOWER4 PPC_OPCODE_NOPOWER4 | PPCCOM
+#define POWER4 PPC_OPCODE_POWER4 | PPCCOM
+#define PPC32 PPC_OPCODE_32 | PPC_OPCODE_PPC | PPC_OPCODE_ANY
+#define PPC64 PPC_OPCODE_64 | PPC_OPCODE_PPC | PPC_OPCODE_ANY
#define PPCONLY PPC_OPCODE_PPC
-#define PPC403 PPC
+#define PPC403 PPC_OPCODE_403
+#define PPC405 PPC403
#define PPC750 PPC
#define PPC860 PPC
-#define PPCVEC PPC_OPCODE_ALTIVEC | PPC_OPCODE_ANY
+#define PPCVEC PPC_OPCODE_ALTIVEC | PPC_OPCODE_ANY | PPC_OPCODE_PPC
#define POWER PPC_OPCODE_POWER | PPC_OPCODE_ANY
#define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY
#define PPCPWR2 PPC_OPCODE_PPC | PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_ANY
#define PWRCOM PPC_OPCODE_POWER | PPC_OPCODE_601 | PPC_OPCODE_COMMON | PPC_OPCODE_ANY
#define MFDEC1 PPC_OPCODE_POWER
#define MFDEC2 PPC_OPCODE_PPC | PPC_OPCODE_601
+#define BOOKE PPC_OPCODE_BOOKE
+#define BOOKE64 PPC_OPCODE_BOOKE64
\f
/* The opcode table.
{ "tnei", OPTO(3,TONE), OPTO_MASK, PWRCOM, { RA, SI } },
{ "twi", OP(3), OP_MASK, PPCCOM, { TO, RA, SI } },
{ "ti", OP(3), OP_MASK, PWRCOM, { TO, RA, SI } },
-
+
+{ "macchw", XO(4,172,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchw.", XO(4,172,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwo", XO(4,172,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwo.", XO(4,172,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchws", XO(4,236,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchws.", XO(4,236,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwso", XO(4,236,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwso.", XO(4,236,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwsu", XO(4,204,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwsu.", XO(4,204,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwsuo", XO(4,204,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwsuo.", XO(4,204,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwu", XO(4,140,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwu.", XO(4,140,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwuo", XO(4,140,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "macchwuo.", XO(4,140,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhw", XO(4,44,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhw.", XO(4,44,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwo", XO(4,44,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwo.", XO(4,44,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhws", XO(4,108,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhws.", XO(4,108,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwso", XO(4,108,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwso.", XO(4,108,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwsu", XO(4,76,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwsu.", XO(4,76,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwsuo", XO(4,76,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwsuo.", XO(4,76,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwu", XO(4,12,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwu.", XO(4,12,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwuo", XO(4,12,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "machhwuo.", XO(4,12,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhw", XO(4,428,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhw.", XO(4,428,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwo", XO(4,428,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwo.", XO(4,428,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhws", XO(4,492,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhws.", XO(4,492,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwso", XO(4,492,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwso.", XO(4,492,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwsu", XO(4,460,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwsu.", XO(4,460,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwsuo", XO(4,460,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwsuo.", XO(4,460,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwu", XO(4,396,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwu.", XO(4,396,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwuo", XO(4,396,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "maclhwuo.", XO(4,396,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "mulchw", XRC(4,168,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulchw.", XRC(4,168,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulchwu", XRC(4,136,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulchwu.", XRC(4,136,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulhhw", XRC(4,40,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulhhw.", XRC(4,40,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulhhwu", XRC(4,8,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mulhhwu.", XRC(4,8,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "mullhw", XRC(4,424,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mullhw.", XRC(4,424,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "mullhwu", XRC(4,392,0), X_MASK, PPC405, { RT, RA, RB } },
+{ "mullhwu.", XRC(4,392,1), X_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchw", XO(4,174,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchw.", XO(4,174,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchwo", XO(4,174,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchwo.", XO(4,174,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchws", XO(4,238,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchws.", XO(4,238,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchwso", XO(4,238,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmacchwso.", XO(4,238,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhw", XO(4,46,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhw.", XO(4,46,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhwo", XO(4,46,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhwo.", XO(4,46,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhws", XO(4,110,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhws.", XO(4,110,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhwso", XO(4,110,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmachhwso.", XO(4,110,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhw", XO(4,430,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhw.", XO(4,430,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhwo", XO(4,430,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhwo.", XO(4,430,1,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhws", XO(4,494,0,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhws.", XO(4,494,0,1), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhwso", XO(4,494,1,0), XO_MASK, PPC405, { RT, RA, RB } },
+{ "nmaclhwso.", XO(4,494,1,1), XO_MASK, PPC405, { RT, RA, RB } },
{ "mfvscr", VX(4, 1540), VX_MASK, PPCVEC, { VD } },
-{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VD } },
+{ "mtvscr", VX(4, 1604), VX_MASK, PPCVEC, { VB } },
{ "vaddcuw", VX(4, 384), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddfp", VX(4, 10), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vaddsbs", VX(4, 768), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vctuxs", VX(4, 906), VX_MASK, PPCVEC, { VD, VB, UIMM } },
{ "vexptefp", VX(4, 394), VX_MASK, PPCVEC, { VD, VB } },
{ "vlogefp", VX(4, 458), VX_MASK, PPCVEC, { VD, VB } },
-{ "vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, { VD, VA, VB, VC } },
+{ "vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, { VD, VA, VC, VB } },
{ "vmaxfp", VX(4, 1034), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vmaxsb", VX(4, 258), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vmaxsh", VX(4, 322), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vsldoi", VXA(4, 44), VXA_MASK, PPCVEC, { VD, VA, VB, SHB } },
{ "vslh", VX(4, 324), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vslo", VX(4, 1036), VX_MASK, PPCVEC, { VD, VA, VB } },
-{ "vslw", VX(4, 338), VX_MASK, PPCVEC, { VD, VA, VB } },
+{ "vslw", VX(4, 388), VX_MASK, PPCVEC, { VD, VA, VB } },
{ "vspltb", VX(4, 524), VX_MASK, PPCVEC, { VD, VB, UIMM } },
{ "vsplth", VX(4, 588), VX_MASK, PPCVEC, { VD, VB, UIMM } },
{ "vspltisb", VX(4, 780), VX_MASK, PPCVEC, { VD, SIMM } },
{ "dozi", OP(9), OP_MASK, M601, { RT, RA, SI } },
+{ "bce", B(9,0,0), B_MASK, BOOKE64, { BO, BI, BD } },
+{ "bcel", B(9,0,1), B_MASK, BOOKE64, { BO, BI, BD } },
+{ "bcea", B(9,1,0), B_MASK, BOOKE64, { BO, BI, BDA } },
+{ "bcela", B(9,1,1), B_MASK, BOOKE64, { BO, BI, BDA } },
+
{ "cmplwi", OPL(10,0), OPL_MASK, PPCCOM, { OBF, RA, UI } },
{ "cmpldi", OPL(10,1), OPL_MASK, PPC64, { OBF, RA, UI } },
{ "cmpli", OP(10), OP_MASK, PPCONLY, { BF, L, RA, UI } },
{ "cau", OP(15), OP_MASK, PWRCOM, { RT,RA,SISIGNOPT } },
{ "subis", OP(15), OP_MASK, PPCCOM, { RT, RA, NSI } },
-{ "bdnz-", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BDM } },
-{ "bdnz+", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BDP } },
-{ "bdnz", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPCCOM, { BD } },
-{ "bdn", BBO(16,BODNZ,0,0), BBOYBI_MASK, PWRCOM, { BD } },
-{ "bdnzl-", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BDM } },
-{ "bdnzl+", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BDP } },
-{ "bdnzl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPCCOM, { BD } },
-{ "bdnl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PWRCOM, { BD } },
-{ "bdnza-", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDMA } },
-{ "bdnza+", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDPA } },
-{ "bdnza", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPCCOM, { BDA } },
-{ "bdna", BBO(16,BODNZ,1,0), BBOYBI_MASK, PWRCOM, { BDA } },
-{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDMA } },
-{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDPA } },
-{ "bdnzla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPCCOM, { BDA } },
-{ "bdnla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PWRCOM, { BDA } },
-{ "bdz-", BBO(16,BODZ,0,0), BBOYBI_MASK, PPCCOM, { BDM } },
-{ "bdz+", BBO(16,BODZ,0,0), BBOYBI_MASK, PPCCOM, { BDP } },
-{ "bdz", BBO(16,BODZ,0,0), BBOYBI_MASK, COM, { BD } },
-{ "bdzl-", BBO(16,BODZ,0,1), BBOYBI_MASK, PPCCOM, { BDM } },
-{ "bdzl+", BBO(16,BODZ,0,1), BBOYBI_MASK, PPCCOM, { BDP } },
-{ "bdzl", BBO(16,BODZ,0,1), BBOYBI_MASK, COM, { BD } },
-{ "bdza-", BBO(16,BODZ,1,0), BBOYBI_MASK, PPCCOM, { BDMA } },
-{ "bdza+", BBO(16,BODZ,1,0), BBOYBI_MASK, PPCCOM, { BDPA } },
-{ "bdza", BBO(16,BODZ,1,0), BBOYBI_MASK, COM, { BDA } },
-{ "bdzla-", BBO(16,BODZ,1,1), BBOYBI_MASK, PPCCOM, { BDMA } },
-{ "bdzla+", BBO(16,BODZ,1,1), BBOYBI_MASK, PPCCOM, { BDPA } },
-{ "bdzla", BBO(16,BODZ,1,1), BBOYBI_MASK, COM, { BDA } },
-{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } },
-{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } },
-{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } },
-{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } },
-{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, COM, { CR, BD } },
-{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, COM, { CR, BDA } },
-{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPCCOM, { CR, BD } },
-{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDM } },
-{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BDP } },
-{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPCCOM, { CR, BD } },
-{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPCCOM, { CR, BDA } },
-{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDMA } },
-{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDPA } },
-{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPCCOM, { CR, BDA } },
-{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdnz-", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BDM } },
+{ "bdnz+", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BDP } },
+{ "bdnz", BBO(16,BODNZ,0,0), BBOATBI_MASK, PPCCOM, { BD } },
+{ "bdn", BBO(16,BODNZ,0,0), BBOATBI_MASK, PWRCOM, { BD } },
+{ "bdnzl-", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BDM } },
+{ "bdnzl+", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BDP } },
+{ "bdnzl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PPCCOM, { BD } },
+{ "bdnl", BBO(16,BODNZ,0,1), BBOATBI_MASK, PWRCOM, { BD } },
+{ "bdnza-", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDMA } },
+{ "bdnza+", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDPA } },
+{ "bdnza", BBO(16,BODNZ,1,0), BBOATBI_MASK, PPCCOM, { BDA } },
+{ "bdna", BBO(16,BODNZ,1,0), BBOATBI_MASK, PWRCOM, { BDA } },
+{ "bdnzla-", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDMA } },
+{ "bdnzla+", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDPA } },
+{ "bdnzla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PPCCOM, { BDA } },
+{ "bdnla", BBO(16,BODNZ,1,1), BBOATBI_MASK, PWRCOM, { BDA } },
+{ "bdz-", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, { BDM } },
+{ "bdz+", BBO(16,BODZ,0,0), BBOATBI_MASK, PPCCOM, { BDP } },
+{ "bdz", BBO(16,BODZ,0,0), BBOATBI_MASK, COM, { BD } },
+{ "bdzl-", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, { BDM } },
+{ "bdzl+", BBO(16,BODZ,0,1), BBOATBI_MASK, PPCCOM, { BDP } },
+{ "bdzl", BBO(16,BODZ,0,1), BBOATBI_MASK, COM, { BD } },
+{ "bdza-", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, { BDMA } },
+{ "bdza+", BBO(16,BODZ,1,0), BBOATBI_MASK, PPCCOM, { BDPA } },
+{ "bdza", BBO(16,BODZ,1,0), BBOATBI_MASK, COM, { BDA } },
+{ "bdzla-", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, { BDMA } },
+{ "bdzla+", BBO(16,BODZ,1,1), BBOATBI_MASK, PPCCOM, { BDPA } },
+{ "bdzla", BBO(16,BODZ,1,1), BBOATBI_MASK, COM, { BDA } },
+{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BD } },
+{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BD } },
+{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDA } },
+{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDA } },
+{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, COM, { CR, BD } },
+{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, COM, { CR, BDA } },
+{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOATCB_MASK, PPCCOM, { CR, BD } },
+{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDM } },
+{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BDP } },
+{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOATCB_MASK, PPCCOM, { CR, BD } },
+{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOATCB_MASK, PPCCOM, { CR, BDA } },
+{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDMA } },
+{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDPA } },
+{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOATCB_MASK, PPCCOM, { CR, BDA } },
+{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bt-", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bt+", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
-{ "bt", BBO(16,BOT,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bbt", BBO(16,BOT,0,0), BBOY_MASK, PWRCOM, { BI, BD } },
-{ "btl-", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "btl+", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
-{ "btl", BBO(16,BOT,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bbtl", BBO(16,BOT,0,1), BBOY_MASK, PWRCOM, { BI, BD } },
-{ "bta-", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bta+", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
-{ "bta", BBO(16,BOT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bbta", BBO(16,BOT,1,0), BBOY_MASK, PWRCOM, { BI, BDA } },
-{ "btla-", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "btla+", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
-{ "btla", BBO(16,BOT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bbtla", BBO(16,BOT,1,1), BBOY_MASK, PWRCOM, { BI, BDA } },
-{ "bf-", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bf+", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
-{ "bf", BBO(16,BOF,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bbf", BBO(16,BOF,0,0), BBOY_MASK, PWRCOM, { BI, BD } },
-{ "bfl-", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bfl+", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
-{ "bfl", BBO(16,BOF,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bbfl", BBO(16,BOF,0,1), BBOY_MASK, PWRCOM, { BI, BD } },
-{ "bfa-", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bfa+", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
-{ "bfa", BBO(16,BOF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bbfa", BBO(16,BOF,1,0), BBOY_MASK, PWRCOM, { BI, BDA } },
-{ "bfla-", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bfla+", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
-{ "bfla", BBO(16,BOF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bbfla", BBO(16,BOF,1,1), BBOY_MASK, PWRCOM, { BI, BDA } },
-{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bt-", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BDM } },
+{ "bt+", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BDP } },
+{ "bt", BBO(16,BOT,0,0), BBOAT_MASK, PPCCOM, { BI, BD } },
+{ "bbt", BBO(16,BOT,0,0), BBOAT_MASK, PWRCOM, { BI, BD } },
+{ "btl-", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BDM } },
+{ "btl+", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BDP } },
+{ "btl", BBO(16,BOT,0,1), BBOAT_MASK, PPCCOM, { BI, BD } },
+{ "bbtl", BBO(16,BOT,0,1), BBOAT_MASK, PWRCOM, { BI, BD } },
+{ "bta-", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDMA } },
+{ "bta+", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDPA } },
+{ "bta", BBO(16,BOT,1,0), BBOAT_MASK, PPCCOM, { BI, BDA } },
+{ "bbta", BBO(16,BOT,1,0), BBOAT_MASK, PWRCOM, { BI, BDA } },
+{ "btla-", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDMA } },
+{ "btla+", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDPA } },
+{ "btla", BBO(16,BOT,1,1), BBOAT_MASK, PPCCOM, { BI, BDA } },
+{ "bbtla", BBO(16,BOT,1,1), BBOAT_MASK, PWRCOM, { BI, BDA } },
+{ "bf-", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BDM } },
+{ "bf+", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BDP } },
+{ "bf", BBO(16,BOF,0,0), BBOAT_MASK, PPCCOM, { BI, BD } },
+{ "bbf", BBO(16,BOF,0,0), BBOAT_MASK, PWRCOM, { BI, BD } },
+{ "bfl-", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BDM } },
+{ "bfl+", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BDP } },
+{ "bfl", BBO(16,BOF,0,1), BBOAT_MASK, PPCCOM, { BI, BD } },
+{ "bbfl", BBO(16,BOF,0,1), BBOAT_MASK, PWRCOM, { BI, BD } },
+{ "bfa-", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDMA } },
+{ "bfa+", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDPA } },
+{ "bfa", BBO(16,BOF,1,0), BBOAT_MASK, PPCCOM, { BI, BDA } },
+{ "bbfa", BBO(16,BOF,1,0), BBOAT_MASK, PWRCOM, { BI, BDA } },
+{ "bfla-", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDMA } },
+{ "bfla+", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDPA } },
+{ "bfla", BBO(16,BOF,1,1), BBOAT_MASK, PPCCOM, { BI, BDA } },
+{ "bbfla", BBO(16,BOF,1,1), BBOAT_MASK, PWRCOM, { BI, BDA } },
+{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BDM } },
-{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BDP } },
+{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDM } },
+{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, NOPOWER4, { BI, BDP } },
{ "bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPCCOM, { BI, BD } },
-{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPCCOM, { BI, BDA } },
-{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDMA } },
-{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDPA } },
+{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDMA } },
+{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, NOPOWER4, { BI, BDPA } },
{ "bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPCCOM, { BI, BDA } },
{ "bc-", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDM } },
{ "bc+", B(16,0,0), B_MASK, PPCCOM, { BOE, BI, BDP } },
{ "svca", SC(17,1,0), SC_MASK, PWRCOM, { SV } },
{ "svcla", SC(17,1,1), SC_MASK, POWER, { SV } },
-{ "b", B(18,0,0), B_MASK, COM, { LI } },
-{ "bl", B(18,0,1), B_MASK, COM, { LI } },
-{ "ba", B(18,1,0), B_MASK, COM, { LIA } },
-{ "bla", B(18,1,1), B_MASK, COM, { LIA } },
+{ "b", B(18,0,0), B_MASK, COM, { LI } },
+{ "bl", B(18,0,1), B_MASK, COM, { LI } },
+{ "ba", B(18,1,0), B_MASK, COM, { LIA } },
+{ "bla", B(18,1,1), B_MASK, COM, { LIA } },
{ "mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, { BF, BFA } },
{ "blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
{ "brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PWRCOM, { 0 } },
{ "bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
+{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdnzlr-", XLO(19,BODNZM4,16,0), XLBOBIBB_MASK, POWER4, { 0 } },
+{ "bdnzlr+", XLO(19,BODNZP4,16,0), XLBOBIBB_MASK, POWER4, { 0 } },
{ "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
+{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdnzlrl-",XLO(19,BODNZM4,16,1), XLBOBIBB_MASK, POWER4, { 0 } },
+{ "bdnzlrl+",XLO(19,BODNZP4,16,1), XLBOBIBB_MASK, POWER4, { 0 } },
{ "bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPCCOM, { 0 } },
+{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdzlr-", XLO(19,BODZM4,16,0), XLBOBIBB_MASK, POWER4, { 0 } },
+{ "bdzlr+", XLO(19,BODZP4,16,0), XLBOBIBB_MASK, POWER4, { 0 } },
{ "bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
-{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPCCOM, { 0 } },
+{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, NOPOWER4, { 0 } },
+{ "bdzlrl-", XLO(19,BODZM4,16,1), XLBOBIBB_MASK, POWER4, { 0 } },
+{ "bdzlrl+", XLO(19,BODZP4,16,1), XLBOBIBB_MASK, POWER4, { 0 } },
{ "bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltlr-", XLOCB(19,BOTM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bltlr+", XLOCB(19,BOTP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltlrl-", XLOCB(19,BOTM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bltlrl+", XLOCB(19,BOTP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtlr-", XLOCB(19,BOTM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgtlr+", XLOCB(19,BOTP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtlrl-", XLOCB(19,BOTM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgtlrl+", XLOCB(19,BOTP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqlr-", XLOCB(19,BOTM4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "beqlr+", XLOCB(19,BOTP4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqlrl-", XLOCB(19,BOTM4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "beqlrl+", XLOCB(19,BOTP4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsolr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bsolr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsolrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bsolrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunlr-", XLOCB(19,BOTM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bunlr+", XLOCB(19,BOTP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunlrl-", XLOCB(19,BOTM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bunlrl+", XLOCB(19,BOTP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgelr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgelr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgelrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgelrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnllr-", XLOCB(19,BOFM4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnllr+", XLOCB(19,BOFP4,CBLT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnllrl-", XLOCB(19,BOFM4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnllrl+", XLOCB(19,BOFP4,CBLT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blelr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "blelr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blelrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "blelrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnglr-", XLOCB(19,BOFM4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnglr+", XLOCB(19,BOFP4,CBGT,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnglrl-", XLOCB(19,BOFM4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnglrl+", XLOCB(19,BOFP4,CBGT,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnelr-", XLOCB(19,BOFM4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnelr+", XLOCB(19,BOFP4,CBEQ,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnelrl-", XLOCB(19,BOFM4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnelrl+", XLOCB(19,BOFP4,CBEQ,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnslr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnslr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnslrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnslrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PWRCOM, { CR } },
{ "bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnulr-", XLOCB(19,BOFM4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnulr+", XLOCB(19,BOFP4,CBSO,16,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnulrl-", XLOCB(19,BOFM4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnulrl+", XLOCB(19,BOFP4,CBSO,16,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btlr-", XLO(19,BOTM4,16,0), XLBOBB_MASK, POWER4, { BI } },
+{ "btlr+", XLO(19,BOTP4,16,0), XLBOBB_MASK, POWER4, { BI } },
{ "bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, PWRCOM, { BI } },
{ "btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btlrl-", XLO(19,BOTM4,16,1), XLBOBB_MASK, POWER4, { BI } },
+{ "btlrl+", XLO(19,BOTP4,16,1), XLBOBB_MASK, POWER4, { BI } },
{ "bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, PWRCOM, { BI } },
{ "bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bflr-", XLO(19,BOFM4,16,0), XLBOBB_MASK, POWER4, { BI } },
+{ "bflr+", XLO(19,BOFP4,16,0), XLBOBB_MASK, POWER4, { BI } },
{ "bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, PWRCOM, { BI } },
{ "bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bflrl-", XLO(19,BOFM4,16,1), XLBOBB_MASK, POWER4, { BI } },
+{ "bflrl+", XLO(19,BOFP4,16,1), XLBOBB_MASK, POWER4, { BI } },
{ "bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, PWRCOM, { BI } },
{ "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPCCOM,{ BI } },
+{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPCCOM,{ BI } },
+{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } },
{ "bclr", XLLK(19,16,0), XLYBB_MASK, PPCCOM, { BO, BI } },
{ "bclrl", XLLK(19,16,1), XLYBB_MASK, PPCCOM, { BO, BI } },
{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } },
{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } },
{ "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } },
{ "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } },
+{ "bclre", XLLK(19,17,0), XLBB_MASK, BOOKE64, { BO, BI } },
+{ "bclrel", XLLK(19,17,1), XLBB_MASK, BOOKE64, { BO, BI } },
+
+{ "rfid", XL(19,18), 0xffffffff, PPC64, { 0 } },
{ "crnot", XL(19,33), XL_MASK, PPCCOM, { BT, BA, BBA } },
{ "crnor", XL(19,33), XL_MASK, COM, { BT, BA, BB } },
{ "rfi", XL(19,50), 0xffffffff, COM, { 0 } },
-{ "rfci", XL(19,51), 0xffffffff, PPC, { 0 } },
+{ "rfci", XL(19,51), 0xffffffff, PPC403, { 0 } },
+{ "rfci", XL(19,51), 0xffffffff, BOOKE, { 0 } },
{ "rfsvc", XL(19,82), 0xffffffff, POWER, { 0 } },
{ "bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, COM, { 0 } },
{ "bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, COM, { 0 } },
{ "bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltctr-", XLOCB(19,BOTM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bltctr+", XLOCB(19,BOTP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bltctrl-",XLOCB(19,BOTM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bltctrl+",XLOCB(19,BOTP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtctr-", XLOCB(19,BOTM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgtctr+", XLOCB(19,BOTP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgtctrl-",XLOCB(19,BOTM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgtctrl+",XLOCB(19,BOTP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqctr-", XLOCB(19,BOTM4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "beqctr+", XLOCB(19,BOTP4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "beqctrl-",XLOCB(19,BOTM4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "beqctrl+",XLOCB(19,BOTP4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsoctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bsoctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bsoctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bsoctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunctr-", XLOCB(19,BOTM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bunctr+", XLOCB(19,BOTP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bunctrl-",XLOCB(19,BOTM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bunctrl+",XLOCB(19,BOTP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgectr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgectr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bgectrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bgectrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnlctr-", XLOCB(19,BOFM4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnlctr+", XLOCB(19,BOFP4,CBLT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnlctrl-",XLOCB(19,BOFM4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnlctrl+",XLOCB(19,BOFP4,CBLT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blectr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "blectr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "blectrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "blectrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bngctr-", XLOCB(19,BOFM4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bngctr+", XLOCB(19,BOFP4,CBGT,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bngctrl-",XLOCB(19,BOFM4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bngctrl+",XLOCB(19,BOFP4,CBGT,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnectr-", XLOCB(19,BOFM4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnectr+", XLOCB(19,BOFP4,CBEQ,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnectrl-",XLOCB(19,BOFM4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnectrl+",XLOCB(19,BOFP4,CBEQ,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnsctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnsctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnsctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnsctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnuctr-", XLOCB(19,BOFM4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnuctr+", XLOCB(19,BOFP4,CBSO,528,0), XLBOCBBB_MASK, POWER4, { CR } },
{ "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
-{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPCCOM, { CR } },
+{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, NOPOWER4, { CR } },
+{ "bnuctrl-",XLOCB(19,BOFM4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
+{ "bnuctrl+",XLOCB(19,BOFP4,CBSO,528,1), XLBOCBBB_MASK, POWER4, { CR } },
{ "btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btctr-", XLO(19,BOTM4,528,0), XLBOBB_MASK, POWER4, { BI } },
+{ "btctr+", XLO(19,BOTP4,528,0), XLBOBB_MASK, POWER4, { BI } },
{ "btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "btctrl-", XLO(19,BOTM4,528,1), XLBOBB_MASK, POWER4, { BI } },
+{ "btctrl+", XLO(19,BOTP4,528,1), XLBOBB_MASK, POWER4, { BI } },
{ "bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bfctr-", XLO(19,BOFM4,528,0), XLBOBB_MASK, POWER4, { BI } },
+{ "bfctr+", XLO(19,BOFP4,528,0), XLBOBB_MASK, POWER4, { BI } },
{ "bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPCCOM, { BI } },
-{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPCCOM, { BI } },
+{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, NOPOWER4, { BI } },
+{ "bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, POWER4, { BI } },
+{ "bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, POWER4, { BI } },
{ "bcctr", XLLK(19,528,0), XLYBB_MASK, PPCCOM, { BO, BI } },
{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } },
{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } },
{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } },
{ "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } },
{ "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } },
+{ "bcctre", XLLK(19,529,0), XLYBB_MASK, BOOKE64, { BO, BI } },
+{ "bcctrel", XLLK(19,529,1), XLYBB_MASK, BOOKE64, { BO, BI } },
{ "rlwimi", M(20,0), M_MASK, PPCCOM, { RA,RS,SH,MBE,ME } },
{ "rlimi", M(20,0), M_MASK, PWRCOM, { RA,RS,SH,MBE,ME } },
{ "rlmi", M(22,0), M_MASK, M601, { RA,RS,RB,MBE,ME } },
{ "rlmi.", M(22,1), M_MASK, M601, { RA,RS,RB,MBE,ME } },
+{ "be", B(22,0,0), B_MASK, BOOKE64, { LI } },
+{ "bel", B(22,0,1), B_MASK, BOOKE64, { LI } },
+{ "bea", B(22,1,0), B_MASK, BOOKE64, { LIA } },
+{ "bela", B(22,1,1), B_MASK, BOOKE64, { LIA } },
+
{ "rotlw", MME(23,31,0), MMBME_MASK, PPCCOM, { RA, RS, RB } },
{ "rlwnm", M(23,0), M_MASK, PPCCOM, { RA,RS,RB,MBE,ME } },
{ "rlnm", M(23,0), M_MASK, PWRCOM, { RA,RS,RB,MBE,ME } },
{ "ldx", X(31,21), X_MASK, PPC64, { RT, RA, RB } },
+{ "icbt", X(31,22), X_MASK, BOOKE, { CT, RA, RB } },
+
{ "lwzx", X(31,23), X_MASK, PPCCOM, { RT, RA, RB } },
{ "lx", X(31,23), X_MASK, PWRCOM, { RT, RA, RB } },
{ "maskg", XRC(31,29,0), X_MASK, M601, { RA, RS, RB } },
{ "maskg.", XRC(31,29,1), X_MASK, M601, { RA, RS, RB } },
+{ "icbte", X(31,30), X_MASK, BOOKE64, { CT, RA, RB } },
+
+{ "lwzxe", X(31,31), X_MASK, BOOKE64, { RT, RA, RB } },
+
{ "cmplw", XCMPL(31,32,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } },
{ "cmpld", XCMPL(31,32,1), XCMPL_MASK, PPC64, { OBF, RA, RB } },
{ "cmpl", X(31,32), XCMP_MASK, PPCONLY, { BF, L, RA, RB } },
{ "lwzux", X(31,55), X_MASK, PPCCOM, { RT, RAL, RB } },
{ "lux", X(31,55), X_MASK, PWRCOM, { RT, RA, RB } },
+{ "dcbste", X(31,62), XRT_MASK, BOOKE64, { RA, RB } },
+
+{ "lwzuxe", X(31,63), X_MASK, BOOKE64, { RT, RAL, RB } },
+
{ "cntlzd", XRC(31,58,0), XRB_MASK, PPC64, { RA, RS } },
{ "cntlzd.", XRC(31,58,1), XRB_MASK, PPC64, { RA, RS } },
-{ "andc", XRC(31,60,0), X_MASK, COM, { RA, RS, RB } },
-{ "andc.", XRC(31,60,1), X_MASK, COM, { RA, RS, RB } },
+{ "andc", XRC(31,60,0), X_MASK, COM, { RA, RS, RB } },
+{ "andc.", XRC(31,60,1), X_MASK, COM, { RA, RS, RB } },
{ "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC64, { RA, RB } },
{ "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC64, { RA, RB } },
{ "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } },
{ "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } },
+{ "mtsrd", X(31,82), XRB_MASK|(1<<20), PPC64, { SR, RS } },
+
{ "mfmsr", X(31,83), XRARB_MASK, COM, { RT } },
{ "ldarx", X(31,84), X_MASK, PPC64, { RT, RA, RB } },
{ "lbzx", X(31,87), X_MASK, COM, { RT, RA, RB } },
+{ "dcbfe", X(31,94), XRT_MASK, BOOKE64, { RA, RB } },
+
+{ "lbzxe", X(31,95), X_MASK, BOOKE64, { RT, RA, RB } },
+
{ "neg", XO(31,104,0,0), XORB_MASK, COM, { RT, RA } },
{ "neg.", XO(31,104,0,1), XORB_MASK, COM, { RT, RA } },
{ "nego", XO(31,104,1,0), XORB_MASK, COM, { RT, RA } },
{ "mulo", XO(31,107,1,0), XO_MASK, M601, { RT, RA, RB } },
{ "mulo.", XO(31,107,1,1), XO_MASK, M601, { RT, RA, RB } },
-{ "clf", X(31,118), XRB_MASK, POWER, { RT, RA } },
+{ "mtsrdin", X(31,114), XRA_MASK, PPC64, { RS, RB } },
+
+{ "clf", X(31,118), XTO_MASK, POWER, { RA, RB } },
{ "lbzux", X(31,119), X_MASK, COM, { RT, RAL, RB } },
{ "not.", XRC(31,124,1), X_MASK, COM, { RA, RS, RBS } },
{ "nor.", XRC(31,124,1), X_MASK, COM, { RA, RS, RB } },
+{ "lwarxe", X(31,126), X_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "lbzuxe", X(31,127), X_MASK, BOOKE64, { RT, RAL, RB } },
+
{ "wrtee", X(31,131), XRARB_MASK, PPC403, { RS } },
+{ "wrtee", X(31,131), XRARB_MASK, BOOKE, { RS } },
{ "subfe", XO(31,136,0,0), XO_MASK, PPCCOM, { RT, RA, RB } },
{ "sfe", XO(31,136,0,0), XO_MASK, PWRCOM, { RT, RA, RB } },
{ "stwx", X(31,151), X_MASK, PPCCOM, { RS, RA, RB } },
{ "stx", X(31,151), X_MASK, PWRCOM, { RS, RA, RB } },
+{ "stwcxe.", XRC(31,158,1), X_MASK, BOOKE64, { RS, RA, RB } },
+
+{ "stwxe", X(31,159), X_MASK, BOOKE64, { RS, RA, RB } },
+
{ "slq", XRC(31,152,0), X_MASK, M601, { RA, RS, RB } },
{ "slq.", XRC(31,152,1), X_MASK, M601, { RA, RS, RB } },
{ "sle.", XRC(31,153,1), X_MASK, M601, { RA, RS, RB } },
{ "wrteei", X(31,163), XE_MASK, PPC403, { E } },
+{ "wrteei", X(31,163), XE_MASK, BOOKE, { E } },
+
+{ "mtmsrd", X(31,178), XRLARB_MASK, PPC64, { RS, MTMSRD_L } },
{ "stdux", X(31,181), X_MASK, PPC64, { RS, RAS, RB } },
{ "sliq", XRC(31,184,0), X_MASK, M601, { RA, RS, SH } },
{ "sliq.", XRC(31,184,1), X_MASK, M601, { RA, RS, SH } },
+{ "stwuxe", X(31,191), X_MASK, BOOKE64, { RS, RAS, RB } },
+
{ "subfze", XO(31,200,0,0), XORB_MASK, PPCCOM, { RT, RA } },
{ "sfze", XO(31,200,0,0), XORB_MASK, PWRCOM, { RT, RA } },
{ "subfze.", XO(31,200,0,1), XORB_MASK, PPCCOM, { RT, RA } },
{ "stdcx.", XRC(31,214,1), X_MASK, PPC64, { RS, RA, RB } },
-{ "stbx", X(31,215), X_MASK, COM, { RS, RA, RB } },
+{ "stbx", X(31,215), X_MASK, COM, { RS, RA, RB } },
{ "sllq", XRC(31,216,0), X_MASK, M601, { RA, RS, RB } },
{ "sllq.", XRC(31,216,1), X_MASK, M601, { RA, RS, RB } },
{ "sleq", XRC(31,217,0), X_MASK, M601, { RA, RS, RB } },
{ "sleq.", XRC(31,217,1), X_MASK, M601, { RA, RS, RB } },
+{ "stbxe", X(31,223), X_MASK, BOOKE64, { RS, RA, RB } },
+
{ "subfme", XO(31,232,0,0), XORB_MASK, PPCCOM, { RT, RA } },
{ "sfme", XO(31,232,0,0), XORB_MASK, PWRCOM, { RT, RA } },
{ "subfme.", XO(31,232,0,1), XORB_MASK, PPCCOM, { RT, RA } },
{ "mtsrin", X(31,242), XRA_MASK, PPC32, { RS, RB } },
{ "mtsri", X(31,242), XRA_MASK, POWER32, { RS, RB } },
-{ "dcbtst", X(31,246), XRT_MASK, PPC, { RA, RB } },
+{ "dcbtst", X(31,246), XRT_MASK, PPC, { CT, RA, RB } },
{ "stbux", X(31,247), X_MASK, COM, { RS, RAS, RB } },
{ "slliq", XRC(31,248,0), X_MASK, M601, { RA, RS, SH } },
{ "slliq.", XRC(31,248,1), X_MASK, M601, { RA, RS, SH } },
+{ "dcbtste", X(31,253), X_MASK, BOOKE64, { CT, RA, RB } },
+
+{ "stbuxe", X(31,255), X_MASK, BOOKE64, { RS, RAS, RB } },
+
+{ "mfdcrx", X(31,259), X_MASK, BOOKE, { RS, RA } },
+
+{ "icbt", X(31,262), XRT_MASK, PPC403, { RA, RB } },
+
{ "doz", XO(31,264,0,0), XO_MASK, M601, { RT, RA, RB } },
{ "doz.", XO(31,264,0,1), XO_MASK, M601, { RT, RA, RB } },
{ "dozo", XO(31,264,1,0), XO_MASK, M601, { RT, RA, RB } },
{ "addo.", XO(31,266,1,1), XO_MASK, PPCCOM, { RT, RA, RB } },
{ "caxo.", XO(31,266,1,1), XO_MASK, PWRCOM, { RT, RA, RB } },
+{ "tlbiel", X(31,274), XRTRA_MASK, POWER4, { RB } },
+
+{ "mfapidi", X(31,275), X_MASK, BOOKE, { RT, RA } },
+
{ "lscbx", XRC(31,277,0), X_MASK, M601, { RT, RA, RB } },
{ "lscbx.", XRC(31,277,1), X_MASK, M601, { RT, RA, RB } },
-{ "dcbt", X(31,278), XRT_MASK, PPC, { RA, RB } },
+{ "dcbt", X(31,278), XRT_MASK, PPC, { CT, RA, RB } },
{ "lhzx", X(31,279), X_MASK, COM, { RT, RA, RB } },
-{ "icbt", X(31,262), XRT_MASK, PPC, { RA, RB } },
-
{ "eqv", XRC(31,284,0), X_MASK, COM, { RA, RS, RB } },
{ "eqv.", XRC(31,284,1), X_MASK, COM, { RA, RS, RB } },
-{ "tlbie", X(31,306), XRTRA_MASK, PPC, { RB } },
+{ "dcbte", X(31,286), X_MASK, BOOKE64, { CT, RA, RB } },
+
+{ "lhzxe", X(31,287), X_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "tlbie", X(31,306), XRTLRA_MASK, PPC, { RB, L } },
{ "tlbi", X(31,306), XRT_MASK, POWER, { RA, RB } },
{ "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
{ "xor", XRC(31,316,0), X_MASK, COM, { RA, RS, RB } },
{ "xor.", XRC(31,316,1), X_MASK, COM, { RA, RS, RB } },
+{ "lhzuxe", X(31,319), X_MASK, BOOKE64, { RT, RAL, RB } },
+
{ "mfexisr", XSPR(31,323,64), XSPR_MASK, PPC403, { RT } },
{ "mfexier", XSPR(31,323,66), XSPR_MASK, PPC403, { RT } },
{ "mfbr0", XSPR(31,323,128), XSPR_MASK, PPC403, { RT } },
{ "mfdmasa3", XSPR(31,323,219), XSPR_MASK, PPC403, { RT } },
{ "mfdmacc3", XSPR(31,323,220), XSPR_MASK, PPC403, { RT } },
{ "mfdmasr", XSPR(31,323,224), XSPR_MASK, PPC403, { RT } },
-{ "mfdcr", X(31,323), X_MASK, PPC, { RT, SPR } },
+{ "mfdcr", X(31,323), X_MASK, PPC403, { RT, SPR } },
+{ "mfdcr", X(31,323), X_MASK, BOOKE, { RT, SPR } },
{ "div", XO(31,331,0,0), XO_MASK, M601, { RT, RA, RB } },
{ "div.", XO(31,331,0,1), XO_MASK, M601, { RT, RA, RB } },
{ "mflctrl2", XSPR(31,339,157), XSPR_MASK, PPC860, { RT } },
{ "mfictrl", XSPR(31,339,158), XSPR_MASK, PPC860, { RT } },
{ "mfbar", XSPR(31,339,159), XSPR_MASK, PPC860, { RT } },
+{ "mfvrsave", XSPR(31,339,256), XSPR_MASK, PPCVEC, { RT } },
+{ "mfsprg4", XSPR(31,339,260), XSPR_MASK, PPC405, { RT } },
+{ "mfsprg5", XSPR(31,339,261), XSPR_MASK, PPC405, { RT } },
+{ "mfsprg6", XSPR(31,339,262), XSPR_MASK, PPC405, { RT } },
+{ "mfsprg7", XSPR(31,339,263), XSPR_MASK, PPC405, { RT } },
{ "mfsprg", XSPR(31,339,272), XSPRG_MASK, PPC, { RT, SPRG } },
{ "mfsprg0", XSPR(31,339,272), XSPR_MASK, PPC, { RT } },
{ "mfsprg1", XSPR(31,339,273), XSPR_MASK, PPC, { RT } },
{ "mfmd_dbcam", XSPR(31,339,824), XSPR_MASK, PPC860, { RT } },
{ "mfmd_dbram0",XSPR(31,339,825), XSPR_MASK, PPC860, { RT } },
{ "mfmd_dbram1",XSPR(31,339,826), XSPR_MASK, PPC860, { RT } },
-{ "mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, { RT } },
-{ "mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, { RT } },
-{ "mficdbdr",XSPR(31,339,979), XSPR_MASK, PPC403, { RT } },
+{ "mfzpr", XSPR(31,339,944), XSPR_MASK, PPC403, { RT } },
+{ "mfpid", XSPR(31,339,945), XSPR_MASK, PPC403, { RT } },
+{ "mfccr0", XSPR(31,339,947), XSPR_MASK, PPC405, { RT } },
+{ "mficdbdr", XSPR(31,339,979), XSPR_MASK, PPC403, { RT } },
{ "mfummcr0", XSPR(31,339,936), XSPR_MASK, PPC750, { RT } },
{ "mfupmc1", XSPR(31,339,937), XSPR_MASK, PPC750, { RT } },
{ "mfupmc2", XSPR(31,339,938), XSPR_MASK, PPC750, { RT } },
{ "mfummcr1", XSPR(31,339,940), XSPR_MASK, PPC750, { RT } },
{ "mfupmc3", XSPR(31,339,941), XSPR_MASK, PPC750, { RT } },
{ "mfupmc4", XSPR(31,339,942), XSPR_MASK, PPC750, { RT } },
+{ "mfiac3", XSPR(31,339,948), XSPR_MASK, PPC405, { RT } },
+{ "mfiac4", XSPR(31,339,949), XSPR_MASK, PPC405, { RT } },
+{ "mfdvc1", XSPR(31,339,950), XSPR_MASK, PPC405, { RT } },
+{ "mfdvc2", XSPR(31,339,951), XSPR_MASK, PPC405, { RT } },
{ "mfmmcr0", XSPR(31,339,952), XSPR_MASK, PPC750, { RT } },
{ "mfpmc1", XSPR(31,339,953), XSPR_MASK, PPC750, { RT } },
+{ "mfsgr", XSPR(31,339,953), XSPR_MASK, PPC403, { RT } },
{ "mfpmc2", XSPR(31,339,954), XSPR_MASK, PPC750, { RT } },
+{ "mfdcwr", XSPR(31,339,954), XSPR_MASK, PPC403, { RT } },
{ "mfsia", XSPR(31,339,955), XSPR_MASK, PPC750, { RT } },
+{ "mfsler", XSPR(31,339,955), XSPR_MASK, PPC405, { RT } },
{ "mfmmcr1", XSPR(31,339,956), XSPR_MASK, PPC750, { RT } },
+{ "mfsu0r", XSPR(31,339,956), XSPR_MASK, PPC405, { RT } },
{ "mfpmc3", XSPR(31,339,957), XSPR_MASK, PPC750, { RT } },
+{ "mfdbcr1", XSPR(31,339,957), XSPR_MASK, PPC405, { RT } },
{ "mfpmc4", XSPR(31,339,958), XSPR_MASK, PPC750, { RT } },
{ "mfesr", XSPR(31,339,980), XSPR_MASK, PPC403, { RT } },
{ "mfdear", XSPR(31,339,981), XSPR_MASK, PPC403, { RT } },
{ "mfsrr2", XSPR(31,339,990), XSPR_MASK, PPC403, { RT } },
{ "mfsrr3", XSPR(31,339,991), XSPR_MASK, PPC403, { RT } },
{ "mfdbsr", XSPR(31,339,1008), XSPR_MASK, PPC403, { RT } },
+{ "mfdbcr0", XSPR(31,339,1010), XSPR_MASK, PPC405, { RT } },
{ "mfiac1", XSPR(31,339,1012), XSPR_MASK, PPC403, { RT } },
{ "mfiac2", XSPR(31,339,1013), XSPR_MASK, PPC403, { RT } },
{ "mfdac1", XSPR(31,339,1014), XSPR_MASK, PPC403, { RT } },
{ "lwax", X(31,341), X_MASK, PPC64, { RT, RA, RB } },
+{ "dst", XDSS(31,342,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
+{ "dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
+
{ "lhax", X(31,343), X_MASK, COM, { RT, RA, RB } },
-{ "dccci", X(31,454), XRT_MASK, PPC, { RA, RB } },
+{ "lhaxe", X(31,351), X_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "dstst", XDSS(31,374,0), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
+{ "dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, { RA, RB, STRM } },
+
+{ "dccci", X(31,454), XRT_MASK, PPC403, { RA, RB } },
{ "abs", XO(31,360,0,0), XORB_MASK, M601, { RT, RA } },
{ "abs.", XO(31,360,0,1), XORB_MASK, M601, { RT, RA } },
{ "tlbia", X(31,370), 0xffffffff, PPC, { 0 } },
+{ "mftbl", XSPR(31,371,268), XSPR_MASK, PPC, { RT } },
{ "mftbu", XSPR(31,371,269), XSPR_MASK, PPC, { RT } },
{ "mftb", X(31,371), X_MASK, PPC, { RT, TBR } },
{ "lhaux", X(31,375), X_MASK, COM, { RT, RAL, RB } },
+{ "lhauxe", X(31,383), X_MASK, BOOKE64, { RT, RAL, RB } },
+
+{ "mtdcrx", X(31,387), X_MASK, BOOKE, { RA, RS } },
+
+{ "subfe64", XO(31,392,0,0), XO_MASK, BOOKE64, { RT, RA, RB } },
+{ "subfe64o",XO(31,392,1,0), XO_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "adde64", XO(31,394,0,0), XO_MASK, BOOKE64, { RT, RA, RB } },
+{ "adde64o", XO(31,394,1,0), XO_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "slbmte", X(31,402), XRA_MASK, PPC64, { RS, RB } },
+
{ "sthx", X(31,407), X_MASK, COM, { RS, RA, RB } },
{ "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } },
{ "sradi", XS(31,413,0), XS_MASK, PPC64, { RA, RS, SH6 } },
{ "sradi.", XS(31,413,1), XS_MASK, PPC64, { RA, RS, SH6 } },
+{ "sthxe", X(31,415), X_MASK, BOOKE64, { RS, RA, RB } },
+
{ "slbie", X(31,434), XRTRA_MASK, PPC64, { RB } },
{ "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
{ "sthux", X(31,439), X_MASK, COM, { RS, RAS, RB } },
+{ "sthuxe", X(31,447), X_MASK, BOOKE64, { RS, RAS, RB } },
+
{ "mr", XRC(31,444,0), X_MASK, COM, { RA, RS, RBS } },
{ "or", XRC(31,444,0), X_MASK, COM, { RA, RS, RB } },
{ "mr.", XRC(31,444,1), X_MASK, COM, { RA, RS, RBS } },
{ "mtdmasa3", XSPR(31,451,219), XSPR_MASK, PPC403, { RT } },
{ "mtdmacc3", XSPR(31,451,220), XSPR_MASK, PPC403, { RT } },
{ "mtdmasr", XSPR(31,451,224), XSPR_MASK, PPC403, { RT } },
-{ "mtummcr0", XSPR(31,451,936), XSPR_MASK, PPC750, { RT } },
-{ "mtupmc1", XSPR(31,451,937), XSPR_MASK, PPC750, { RT } },
-{ "mtupmc2", XSPR(31,451,938), XSPR_MASK, PPC750, { RT } },
-{ "mtusia", XSPR(31,451,939), XSPR_MASK, PPC750, { RT } },
-{ "mtummcr1", XSPR(31,451,940), XSPR_MASK, PPC750, { RT } },
-{ "mtupmc3", XSPR(31,451,941), XSPR_MASK, PPC750, { RT } },
-{ "mtupmc4", XSPR(31,451,942), XSPR_MASK, PPC750, { RT } },
-{ "mtmmcr0", XSPR(31,451,952), XSPR_MASK, PPC750, { RT } },
-{ "mtpmc1", XSPR(31,451,953), XSPR_MASK, PPC750, { RT } },
-{ "mtpmc2", XSPR(31,451,954), XSPR_MASK, PPC750, { RT } },
-{ "mtsia", XSPR(31,451,955), XSPR_MASK, PPC750, { RT } },
-{ "mtmmcr1", XSPR(31,451,956), XSPR_MASK, PPC750, { RT } },
-{ "mtpmc3", XSPR(31,451,957), XSPR_MASK, PPC750, { RT } },
-{ "mtpmc4", XSPR(31,451,958), XSPR_MASK, PPC750, { RT } },
-{ "mtl2cr", XSPR(31,451,1017), XSPR_MASK, PPC750, { RT } },
-{ "mtictc", XSPR(31,451,1019), XSPR_MASK, PPC750, { RT } },
-{ "mtthrm1", XSPR(31,451,1020), XSPR_MASK, PPC750, { RT } },
-{ "mtthrm2", XSPR(31,451,1021), XSPR_MASK, PPC750, { RT } },
-{ "mtthrm3", XSPR(31,451,1022), XSPR_MASK, PPC750, { RT } },
-{ "mtdcr", X(31,451), X_MASK, PPC, { SPR, RS } },
+{ "mtdcr", X(31,451), X_MASK, PPC403, { SPR, RS } },
+{ "mtdcr", X(31,451), X_MASK, BOOKE, { SPR, RS } },
+
+{ "subfze64",XO(31,456,0,0), XORB_MASK, BOOKE64, { RT, RA } },
+{ "subfze64o",XO(31,456,1,0), XORB_MASK, BOOKE64, { RT, RA } },
{ "divdu", XO(31,457,0,0), XO_MASK, PPC64, { RT, RA, RB } },
{ "divdu.", XO(31,457,0,1), XO_MASK, PPC64, { RT, RA, RB } },
{ "divduo", XO(31,457,1,0), XO_MASK, PPC64, { RT, RA, RB } },
{ "divduo.", XO(31,457,1,1), XO_MASK, PPC64, { RT, RA, RB } },
+{ "addze64", XO(31,458,0,0), XORB_MASK, BOOKE64, { RT, RA } },
+{ "addze64o",XO(31,458,1,0), XORB_MASK, BOOKE64, { RT, RA } },
+
{ "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } },
{ "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } },
{ "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } },
{ "mtlctrl2", XSPR(31,467,157), XSPR_MASK, PPC860, { RT } },
{ "mtictrl", XSPR(31,467,158), XSPR_MASK, PPC860, { RT } },
{ "mtbar", XSPR(31,467,159), XSPR_MASK, PPC860, { RT } },
+{ "mtvrsave",XSPR(31,467,256), XSPR_MASK, PPCVEC, { RT } },
{ "mtsprg", XSPR(31,467,272), XSPRG_MASK, PPC, { SPRG, RS } },
{ "mtsprg0", XSPR(31,467,272), XSPR_MASK, PPC, { RT } },
{ "mtsprg1", XSPR(31,467,273), XSPR_MASK, PPC, { RT } },
{ "mtsprg2", XSPR(31,467,274), XSPR_MASK, PPC, { RT } },
{ "mtsprg3", XSPR(31,467,275), XSPR_MASK, PPC, { RT } },
+{ "mtsprg4", XSPR(31,467,276), XSPR_MASK, PPC405, { RT } },
+{ "mtsprg5", XSPR(31,467,277), XSPR_MASK, PPC405, { RT } },
+{ "mtsprg6", XSPR(31,467,278), XSPR_MASK, PPC405, { RT } },
+{ "mtsprg7", XSPR(31,467,279), XSPR_MASK, PPC405, { RT } },
{ "mtasr", XSPR(31,467,280), XSPR_MASK, PPC64, { RS } },
{ "mtear", XSPR(31,467,282), XSPR_MASK, PPC, { RS } },
{ "mttbl", XSPR(31,467,284), XSPR_MASK, PPC, { RS } },
{ "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
{ "mtzpr", XSPR(31,467,944), XSPR_MASK, PPC403, { RT } },
{ "mtpid", XSPR(31,467,945), XSPR_MASK, PPC403, { RT } },
+{ "mtccr0", XSPR(31,467,947), XSPR_MASK, PPC405, { RT } },
+{ "mtiac3", XSPR(31,467,948), XSPR_MASK, PPC405, { RT } },
+{ "mtiac4", XSPR(31,467,949), XSPR_MASK, PPC405, { RT } },
+{ "mtdvc1", XSPR(31,467,950), XSPR_MASK, PPC405, { RT } },
+{ "mtdvc2", XSPR(31,467,951), XSPR_MASK, PPC405, { RT } },
+{ "mtsgr", XSPR(31,467,953), XSPR_MASK, PPC403, { RT } },
+{ "mtdcwr", XSPR(31,467,954), XSPR_MASK, PPC403, { RT } },
+{ "mtsler", XSPR(31,467,955), XSPR_MASK, PPC405, { RT } },
+{ "mtsu0r", XSPR(31,467,956), XSPR_MASK, PPC405, { RT } },
+{ "mtdbcr1", XSPR(31,467,957), XSPR_MASK, PPC405, { RT } },
{ "mticdbdr",XSPR(31,467,979), XSPR_MASK, PPC403, { RT } },
{ "mtesr", XSPR(31,467,980), XSPR_MASK, PPC403, { RT } },
+{ "mtdear", XSPR(31,467,981), XSPR_MASK, PPC403, { RT } },
{ "mtevpr", XSPR(31,467,982), XSPR_MASK, PPC403, { RT } },
{ "mtcdbcr", XSPR(31,467,983), XSPR_MASK, PPC403, { RT } },
{ "mttsr", XSPR(31,467,984), XSPR_MASK, PPC403, { RT } },
{ "mtsrr2", XSPR(31,467,990), XSPR_MASK, PPC403, { RT } },
{ "mtsrr3", XSPR(31,467,991), XSPR_MASK, PPC403, { RT } },
{ "mtdbsr", XSPR(31,467,1008), XSPR_MASK, PPC403, { RT } },
+{ "mtdbcr0", XSPR(31,467,1010), XSPR_MASK, PPC405, { RT } },
{ "mtiac1", XSPR(31,467,1012), XSPR_MASK, PPC403, { RT } },
{ "mtiac2", XSPR(31,467,1013), XSPR_MASK, PPC403, { RT } },
{ "mtdac1", XSPR(31,467,1014), XSPR_MASK, PPC403, { RT } },
{ "mtpbu1", XSPR(31,467,1021), XSPR_MASK, PPC403, { RT } },
{ "mtpbl2", XSPR(31,467,1022), XSPR_MASK, PPC403, { RT } },
{ "mtpbu2", XSPR(31,467,1023), XSPR_MASK, PPC403, { RT } },
+{ "mtummcr0", XSPR(31,467,936), XSPR_MASK, PPC750, { RT } },
+{ "mtupmc1", XSPR(31,467,937), XSPR_MASK, PPC750, { RT } },
+{ "mtupmc2", XSPR(31,467,938), XSPR_MASK, PPC750, { RT } },
+{ "mtusia", XSPR(31,467,939), XSPR_MASK, PPC750, { RT } },
+{ "mtummcr1", XSPR(31,467,940), XSPR_MASK, PPC750, { RT } },
+{ "mtupmc3", XSPR(31,467,941), XSPR_MASK, PPC750, { RT } },
+{ "mtupmc4", XSPR(31,467,942), XSPR_MASK, PPC750, { RT } },
+{ "mtmmcr0", XSPR(31,467,952), XSPR_MASK, PPC750, { RT } },
+{ "mtpmc1", XSPR(31,467,953), XSPR_MASK, PPC750, { RT } },
+{ "mtpmc2", XSPR(31,467,954), XSPR_MASK, PPC750, { RT } },
+{ "mtsia", XSPR(31,467,955), XSPR_MASK, PPC750, { RT } },
+{ "mtmmcr1", XSPR(31,467,956), XSPR_MASK, PPC750, { RT } },
+{ "mtpmc3", XSPR(31,467,957), XSPR_MASK, PPC750, { RT } },
+{ "mtpmc4", XSPR(31,467,958), XSPR_MASK, PPC750, { RT } },
+{ "mtl2cr", XSPR(31,467,1017), XSPR_MASK, PPC750, { RT } },
+{ "mtictc", XSPR(31,467,1019), XSPR_MASK, PPC750, { RT } },
+{ "mtthrm1", XSPR(31,467,1020), XSPR_MASK, PPC750, { RT } },
+{ "mtthrm2", XSPR(31,467,1021), XSPR_MASK, PPC750, { RT } },
+{ "mtthrm3", XSPR(31,467,1022), XSPR_MASK, PPC750, { RT } },
{ "mtspr", X(31,467), X_MASK, COM, { SPR, RS } },
{ "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
{ "nand", XRC(31,476,0), X_MASK, COM, { RA, RS, RB } },
{ "nand.", XRC(31,476,1), X_MASK, COM, { RA, RS, RB } },
+{ "dcbie", X(31,478), XRT_MASK, BOOKE64, { RA, RB } },
+
{ "dcread", X(31,486), X_MASK, PPC403, { RT, RA, RB }},
{ "nabs", XO(31,488,0,0), XORB_MASK, M601, { RT, RA } },
+{ "subfme64",XO(31,488,0,0), XORB_MASK, BOOKE64, { RT, RA } },
{ "nabs.", XO(31,488,0,1), XORB_MASK, M601, { RT, RA } },
{ "nabso", XO(31,488,1,0), XORB_MASK, M601, { RT, RA } },
+{ "subfme64o",XO(31,488,1,0), XORB_MASK, BOOKE64, { RT, RA } },
{ "nabso.", XO(31,488,1,1), XORB_MASK, M601, { RT, RA } },
{ "divd", XO(31,489,0,0), XO_MASK, PPC64, { RT, RA, RB } },
{ "divdo", XO(31,489,1,0), XO_MASK, PPC64, { RT, RA, RB } },
{ "divdo.", XO(31,489,1,1), XO_MASK, PPC64, { RT, RA, RB } },
+{ "addme64", XO(31,490,0,0), XORB_MASK, BOOKE64, { RT, RA } },
+{ "addme64o",XO(31,490,1,0), XORB_MASK, BOOKE64, { RT, RA } },
+
{ "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } },
{ "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } },
{ "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } },
{ "cli", X(31,502), XRB_MASK, POWER, { RT, RA } },
+{ "stdcxe.", XRC(31,511,1), X_MASK, BOOKE64, { RS, RA, RB } },
+
{ "mcrxr", X(31,512), XRARB_MASK|(3<<21), COM, { BF } },
+{ "mcrxr64", X(31,544), XRARB_MASK|(3<<21), BOOKE, { BF } },
+
{ "clcs", X(31,531), XRB_MASK, M601, { RT, RA } },
{ "lswx", X(31,533), X_MASK, PPCCOM, { RT, RA, RB } },
{ "maskir", XRC(31,541,0), X_MASK, M601, { RA, RS, RB } },
{ "maskir.", XRC(31,541,1), X_MASK, M601, { RA, RS, RB } },
+{ "lwbrxe", X(31,542), X_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "lfsxe", X(31,543), X_MASK, BOOKE64, { FRT, RA, RB } },
+
{ "tlbsync", X(31,566), 0xffffffff, PPC, { 0 } },
{ "lfsux", X(31,567), X_MASK, COM, { FRT, RAS, RB } },
+{ "lfsuxe", X(31,575), X_MASK, BOOKE64, { FRT, RAS, RB } },
+
{ "mfsr", X(31,595), XRB_MASK|(1<<20), COM32, { RT, SR } },
{ "lswi", X(31,597), X_MASK, PPCCOM, { RT, RA, NB } },
{ "lsi", X(31,597), X_MASK, PWRCOM, { RT, RA, NB } },
-{ "sync", X(31,598), 0xffffffff, PPCCOM, { 0 } },
+{ "lwsync", XSYNC(31,598,1), 0xffffffff, PPCONLY, { 0 } },
+{ "ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, { 0 } },
+{ "sync", X(31,598), XSYNC_MASK, PPCCOM, { LS } },
{ "dcs", X(31,598), 0xffffffff, PWRCOM, { 0 } },
+{ "msync", X(31,598), 0xf80007fe, BOOKE, { 0 } },
{ "lfdx", X(31,599), X_MASK, COM, { FRT, RA, RB } },
+{ "lfdxe", X(31,607), X_MASK, BOOKE64, { FRT, RA, RB } },
+
{ "mfsri", X(31,627), X_MASK, PWRCOM, { RT, RA, RB } },
{ "dclst", X(31,630), XRB_MASK, PWRCOM, { RS, RA } },
{ "lfdux", X(31,631), X_MASK, COM, { FRT, RAS, RB } },
+{ "lfduxe", X(31,639), X_MASK, BOOKE64, { FRT, RAS, RB } },
+
{ "mfsrin", X(31,659), XRA_MASK, PPC32, { RT, RB } },
{ "stswx", X(31,661), X_MASK, PPCCOM, { RS, RA, RB } },
{ "sre", XRC(31,665,0), X_MASK, M601, { RA, RS, RB } },
{ "sre.", XRC(31,665,1), X_MASK, M601, { RA, RS, RB } },
+{ "stwbrxe", X(31,670), X_MASK, BOOKE64, { RS, RA, RB } },
+
+{ "stfsxe", X(31,671), X_MASK, BOOKE64, { FRS, RA, RB } },
+
{ "stfsux", X(31,695), X_MASK, COM, { FRS, RAS, RB } },
{ "sriq", XRC(31,696,0), X_MASK, M601, { RA, RS, SH } },
{ "sriq.", XRC(31,696,1), X_MASK, M601, { RA, RS, SH } },
+{ "stfsuxe", X(31,703), X_MASK, BOOKE64, { FRS, RAS, RB } },
+
{ "stswi", X(31,725), X_MASK, PPCCOM, { RS, RA, NB } },
{ "stsi", X(31,725), X_MASK, PWRCOM, { RS, RA, NB } },
{ "sreq", XRC(31,729,0), X_MASK, M601, { RA, RS, RB } },
{ "sreq.", XRC(31,729,1), X_MASK, M601, { RA, RS, RB } },
+{ "stfdxe", X(31,735), X_MASK, BOOKE64, { FRS, RA, RB } },
+
+{ "dcba", X(31,758), XRT_MASK, PPC405, { RA, RB } },
+{ "dcba", X(31,758), XRT_MASK, BOOKE, { RA, RB } },
+
{ "stfdux", X(31,759), X_MASK, COM, { FRS, RAS, RB } },
{ "srliq", XRC(31,760,0), X_MASK, M601, { RA, RS, SH } },
{ "srliq.", XRC(31,760,1), X_MASK, M601, { RA, RS, SH } },
+{ "dcbae", X(31,766), XRT_MASK, BOOKE64, { RA, RB } },
+
+{ "stfduxe", X(31,767), X_MASK, BOOKE64, { FRS, RAS, RB } },
+
+{ "tlbivax", X(31,786), XRT_MASK, BOOKE, { RA, RB } },
+{ "tlbivaxe",X(31,787), XRT_MASK, BOOKE, { RA, RB } },
+
{ "lhbrx", X(31,790), X_MASK, COM, { RT, RA, RB } },
{ "sraw", XRC(31,792,0), X_MASK, PPCCOM, { RA, RS, RB } },
{ "srad", XRC(31,794,0), X_MASK, PPC64, { RA, RS, RB } },
{ "srad.", XRC(31,794,1), X_MASK, PPC64, { RA, RS, RB } },
+{ "lhbrxe", X(31,798), X_MASK, BOOKE64, { RT, RA, RB } },
+
+{ "ldxe", X(31,799), X_MASK, BOOKE64, { RT, RA, RB } },
+{ "lduxe", X(31,831), X_MASK, BOOKE64, { RT, RA, RB } },
+
{ "rac", X(31,818), X_MASK, PWRCOM, { RT, RA, RB } },
+{ "dss", XDSS(31,822,0), XDSS_MASK, PPCVEC, { STRM } },
+{ "dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, { 0 } },
+
{ "srawi", XRC(31,824,0), X_MASK, PPCCOM, { RA, RS, SH } },
{ "srai", XRC(31,824,0), X_MASK, PWRCOM, { RA, RS, SH } },
{ "srawi.", XRC(31,824,1), X_MASK, PPCCOM, { RA, RS, SH } },
{ "srai.", XRC(31,824,1), X_MASK, PWRCOM, { RA, RS, SH } },
+{ "slbmfev", X(31,851), XRA_MASK, PPC64, { RT, RB } },
+
{ "eieio", X(31,854), 0xffffffff, PPC, { 0 } },
+{ "mbar", X(31,854), 0xffffffff, BOOKE, { MO } },
+
+{ "tlbsx", XRC(31,914,0), X_MASK, PPC403, { RT, RA, RB } },
+{ "tlbsx.", XRC(31,914,1), X_MASK, PPC403, { RT, RA, RB } },
+
+{ "tlbsx", XRC(31,914,0), X_MASK, BOOKE, { RA, RB } },
+{ "tlbsx.", XRC(31,914,1), X_MASK, BOOKE, { RA, RB } },
+{ "tlbsxe", XRC(31,915,0), X_MASK, BOOKE, { RA, RB } },
+{ "tlbsxe.", XRC(31,915,1), X_MASK, BOOKE, { RA, RB } },
-{ "tlbsx", XRC(31,914,0), X_MASK, PPC403, { RT, RA, RB } },
-{ "tlbsx.", XRC(31,914,1), X_MASK, PPC403, { RT, RA, RB } },
+{ "slbmfee", X(31,915), XRA_MASK, PPC64, { RT, RB } },
{ "sthbrx", X(31,918), X_MASK, COM, { RS, RA, RB } },
{ "extsh.", XRC(31,922,1), XRB_MASK, PPCCOM, { RA, RS } },
{ "exts.", XRC(31,922,1), XRB_MASK, PWRCOM, { RA, RS } },
-{ "tlbre", X(31,946), X_MASK, PPC403, { RT, RA, SH } },
+{ "sthbrxe", X(31,926), X_MASK, BOOKE64, { RS, RA, RB } },
+
+{ "stdxe", X(31,927), X_MASK, BOOKE64, { RS, RA, RB } },
+
+{ "tlbre", X(31,946), X_MASK, BOOKE, { RT, RA, WS } },
+
+{ "tlbrehi", XTLB(31,946,0), XTLB_MASK, PPC403, { RT, RA } },
+{ "tlbrelo", XTLB(31,946,1), XTLB_MASK, PPC403, { RT, RA } },
{ "sraiq", XRC(31,952,0), X_MASK, M601, { RA, RS, SH } },
{ "sraiq.", XRC(31,952,1), X_MASK, M601, { RA, RS, SH } },
{ "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
{ "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
-{ "iccci", X(31,966), XRT_MASK, PPC, { RA, RB } },
+{ "stduxe", X(31,959), X_MASK, BOOKE64, { RS, RAS, RB } },
+
+{ "iccci", X(31,966), XRT_MASK, PPC403, { RA, RB } },
{ "tlbld", X(31,978), XRTRA_MASK, PPC, { RB } },
+
+{ "tlbwehi", XTLB(31,978,0), XTLB_MASK, PPC403, { RT, RA } },
+{ "tlbwelo", XTLB(31,978,1), XTLB_MASK, PPC403, { RT, RA } },
{ "tlbwe", X(31,978), X_MASK, PPC403, { RS, RA, SH } },
+{ "tlbwe", X(31,978), X_MASK, BOOKE, { RT, RA, WS } },
+
{ "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },
{ "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } },
{ "icread", X(31,998), XRT_MASK, PPC403, { RA, RB } },
+{ "icbie", X(31,990), XRT_MASK, BOOKE64, { RA, RB } },
+{ "stfiwxe", X(31,991), X_MASK, BOOKE64, { FRS, RA, RB } },
+
{ "tlbli", X(31,1010), XRTRA_MASK, PPC, { RB } },
{ "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
{ "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
+{ "dcbze", X(31,1022), XRT_MASK, BOOKE64, { RA, RB } },
+
{ "lvebx", X(31, 7), X_MASK, PPCVEC, { VD, RA, RB } },
{ "lvehx", X(31, 39), X_MASK, PPCVEC, { VD, RA, RB } },
{ "lvewx", X(31, 71), X_MASK, PPCVEC, { VD, RA, RB } },
{ "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA } },
+{ "lbze", DEO(58,0), DE_MASK, BOOKE64, { RT, DE, RA } },
+{ "lbzue", DEO(58,1), DE_MASK, BOOKE64, { RT, DE, RAL } },
+{ "lhze", DEO(58,2), DE_MASK, BOOKE64, { RT, DE, RA } },
+{ "lhzue", DEO(58,3), DE_MASK, BOOKE64, { RT, DE, RAL } },
+{ "lhae", DEO(58,4), DE_MASK, BOOKE64, { RT, DE, RA } },
+{ "lhaue", DEO(58,5), DE_MASK, BOOKE64, { RT, DE, RAL } },
+{ "lwze", DEO(58,6), DE_MASK, BOOKE64, { RT, DE, RA } },
+{ "lwzue", DEO(58,7), DE_MASK, BOOKE64, { RT, DE, RAL } },
+{ "stbe", DEO(58,8), DE_MASK, BOOKE64, { RS, DE, RA } },
+{ "stbue", DEO(58,9), DE_MASK, BOOKE64, { RS, DE, RAS } },
+{ "sthe", DEO(58,10), DE_MASK, BOOKE64, { RS, DE, RA } },
+{ "sthue", DEO(58,11), DE_MASK, BOOKE64, { RS, DE, RAS } },
+{ "stwe", DEO(58,14), DE_MASK, BOOKE64, { RS, DE, RA } },
+{ "stwue", DEO(58,15), DE_MASK, BOOKE64, { RS, DE, RAS } },
+
{ "ld", DSO(58,0), DS_MASK, PPC64, { RT, DS, RA } },
{ "ldu", DSO(58,1), DS_MASK, PPC64, { RT, DS, RAL } },
{ "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } },
+{ "lde", DEO(62,0), DE_MASK, BOOKE64, { RT, DES, RA } },
+{ "ldue", DEO(62,1), DE_MASK, BOOKE64, { RT, DES, RA } },
+{ "lfse", DEO(62,4), DE_MASK, BOOKE64, { FRT, DES, RA } },
+{ "lfsue", DEO(62,5), DE_MASK, BOOKE64, { FRT, DES, RAS } },
+{ "lfde", DEO(62,6), DE_MASK, BOOKE64, { FRT, DES, RA } },
+{ "lfdue", DEO(62,7), DE_MASK, BOOKE64, { FRT, DES, RAS } },
+{ "stde", DEO(62,8), DE_MASK, BOOKE64, { RS, DES, RA } },
+{ "stdue", DEO(62,9), DE_MASK, BOOKE64, { RS, DES, RAS } },
+{ "stfse", DEO(62,12), DE_MASK, BOOKE64, { FRS, DES, RA } },
+{ "stfsue", DEO(62,13), DE_MASK, BOOKE64, { FRS, DES, RAS } },
+{ "stfde", DEO(62,14), DE_MASK, BOOKE64, { FRS, DES, RA } },
+{ "stfdue", DEO(62,15), DE_MASK, BOOKE64, { FRS, DES, RAS } },
+
{ "std", DSO(62,0), DS_MASK, PPC64, { RS, DS, RA } },
{ "stdu", DSO(62,1), DS_MASK, PPC64, { RS, DS, RAS } },