Remove i860, i960, bout and aout-adobe targets

[deliverable/binutils-gdb.git] / opcodes / riscv-dis.c

diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index cb263505d169390fb8deecb55258be5d6679790f..e8fc6ea332676a31a02f215b6b191fa99db70de2 100644 (file)
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -1,5 +1,5 @@
 /* RISC-V disassembler
-   Copyright 2011-2016 Free Software Foundation, Inc.
+   Copyright (C) 2011-2018 Free Software Foundation, Inc.
 
    Contributed by Andrew Waterman (andrew@sifive.com).
    Based on MIPS target.
@@ -21,7 +21,7 @@
    see <http://www.gnu.org/licenses/>.  */
 
 #include "sysdep.h"
-#include "dis-asm.h"
+#include "disassemble.h"
 #include "libiberty.h"
 #include "opcode/riscv.h"
 #include "opintl.h"
@@ -64,8 +64,8 @@ parse_riscv_dis_option (const char *option)
     }
   else
     {
-      /* Invalid option.  */
-      fprintf (stderr, _("Unrecognized disassembler option: %s\n"), option);
+      /* xgettext:c-format */
+      opcodes_error_handler (_("unrecognized disassembler option: %s"), option);
     }
 }
 
@@ -101,7 +101,7 @@ maybe_print_address (struct riscv_private_data *pd, int base_reg, int offset)
 {
   if (pd->hi_addr[base_reg] != (bfd_vma)-1)
     {
-      pd->print_addr = pd->hi_addr[base_reg] + offset;
+      pd->print_addr = (base_reg != 0 ? pd->hi_addr[base_reg] : 0) + offset;
       pd->hi_addr[base_reg] = -1;
     }
   else if (base_reg == X_GP && pd->gp != (bfd_vma)-1)
@@ -153,6 +153,7 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
            case 'i':
              print (info->stream, "%d", (int)EXTRACT_RVC_SIMM3 (l));
              break;
+           case 'o':
            case 'j':
              print (info->stream, "%d", (int)EXTRACT_RVC_IMM (l));
              break;
@@ -225,6 +226,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 
        case 'b':
        case 's':
+         if ((l & MASK_JALR) == MATCH_JALR)
+           maybe_print_address (pd, rs1, 0);
          print (info->stream, "%s", riscv_gpr_names[rs1]);
          break;
 
@@ -255,6 +258,7 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 
        case 'o':
          maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l));
+         /* Fall through.  */
        case 'j':
          if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
              || (l & MASK_JALR) == MATCH_JALR)
@@ -383,7 +387,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
        pd->hi_addr[i] = -1;
 
       for (i = 0; i < info->symtab_size; i++)
-       if (strcmp (bfd_asymbol_name (info->symtab[i]), "_gp") == 0)
+       if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0)
          pd->gp = bfd_asymbol_value (info->symtab[i]);
     }
   else
@@ -496,7 +500,7 @@ The following RISC-V-specific disassembler options are supported for use\n\
 with the -M switch (multiple options should be separated by commas):\n"));
 
   fprintf (stream, _("\n\
-  numeric       Print numeric reigster names, rather than ABI names.\n"));
+  numeric       Print numeric register names, rather than ABI names.\n"));
 
   fprintf (stream, _("\n\
   no-aliases    Disassemble only into canonical instructions, rather\n\