/* Print SPARC instructions.
Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
+ 2000, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
+ Free Software Foundation, Inc.
- This program is free software; you can redistribute it and/or modify
+ This file is part of the GNU opcodes library.
+
+ This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
+ It is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
static char *v9a_asr_reg_names[] =
{
"pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint",
- "softint", "tick_cmpr", "sys_tick", "sys_tick_cmpr"
+ "softint", "tick_cmpr", "stick", "stick_cmpr", "resv26",
+ "resv27", "cps"
};
/* Macros used to extract instruction fields. Not all fields have
#define X_LDST_I(i) (((i) >> 13) & 1)
#define X_ASI(i) (((i) >> 5) & 0xff)
#define X_RS2(i) (((i) >> 0) & 0x1f)
+#define X_RS3(i) (((i) >> 9) & 0x1f)
#define X_IMM(i,n) (((i) >> 0) & ((1 << (n)) - 1))
#define X_SIMM(i,n) SEX (X_IMM ((i), (n)), (n))
#define X_DISP22(i) (((i) >> 0) & 0x3fffff)
fregx (X_RS2 (insn));
break;
+ case '4':
+ freg (X_RS3 (insn));
+ break;
+ case '5': /* Double/even. */
+ fregx (X_RS3 (insn));
+ break;
+
case 'g':
freg (X_RD (insn));
break;
break;
case '/':
- if (X_RS1 (insn) < 16 || X_RS1 (insn) > 25)
+ if (X_RS1 (insn) < 16 || X_RS1 (insn) > 28)
(*info->fprintf_func) (stream, "%%reserved");
else
(*info->fprintf_func) (stream, "%%%s",
break;
case '_':
- if (X_RD (insn) < 16 || X_RD (insn) > 25)
+ if (X_RD (insn) < 16 || X_RD (insn) > 28)
(*info->fprintf_func) (stream, "%%reserved");
else
(*info->fprintf_func) (stream, "%%%s",
(*info->fprintf_func) (stream, "%%fsr");
break;
+ case '(':
+ (*info->fprintf_func) (stream, "%%efsr");
+ break;
+
case 'p':
(*info->fprintf_func) (stream, "%%psr");
break;
if (opcode->flags & (F_UNBR|F_CONDBR|F_JSR))
{
- /* FIXME -- check is_annulled flag. */
+ /* FIXME -- check is_annulled flag. */
+ (void) is_annulled;
if (opcode->flags & F_UNBR)
info->insn_type = dis_branch;
if (opcode->flags & F_CONDBR)