/* Disassemble V850 instructions.
- Copyright (C) 1996 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
#include <stdio.h>
-#include "ansidecl.h"
+#include "sysdep.h"
#include "opcode/v850.h"
#include "dis-asm.h"
+#include "opintl.h"
static const char *const v850_reg_names[] =
{ "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31" };
+ "r24", "r25", "r26", "r27", "r28", "r29", "ep", "lp" };
static const char *const v850_sreg_names[] =
{ "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
- "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
+ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
+ "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
+ "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
"sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23",
"sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31" };
{ "v", "c/l", "z", "nh", "s/n", "t", "lt", "le",
"nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt" };
+static int disassemble
+ PARAMS ((bfd_vma, struct disassemble_info *, unsigned long));
+
static int
disassemble (memaddr, info, insn)
bfd_vma memaddr;
int match = 0;
int short_op = ((insn & 0x0600) != 0x0600);
int bytes_read;
-
-
+ int target_processor;
+
/* Special case: 32 bit MOV */
if ((insn & 0xffe0) == 0x0620)
short_op = true;
-
+
bytes_read = short_op ? 2 : 4;
/* If this is a two byte insn, then mask off the high bits. */
if (short_op)
insn &= 0xffff;
+ switch (info->mach)
+ {
+ case 0:
+ default:
+ target_processor = PROCESSOR_V850;
+ break;
+
+ case bfd_mach_v850e:
+ target_processor = PROCESSOR_V850E;
+ break;
+ }
+
/* Find the opcode. */
while (op->name)
{
- if ((op->mask & insn) == op->opcode)
+ if ((op->mask & insn) == op->opcode
+ && (op->processors & target_processor))
{
const unsigned char * opindex_ptr;
unsigned int opnum;
match = 1;
(*info->fprintf_func) (info->stream, "%s\t", op->name);
-//fprintf (stderr, "match: mask: %x insn: %x, opcode: %x, name: %s\n", op->mask, insn, op->opcode, op->name );
+/*fprintf (stderr, "match: mask: %x insn: %x, opcode: %x, name: %s\n", op->mask, insn, op->opcode, op->name );*/
memop = op->memop;
/* Now print the operands.
case V850_OPERAND_SRG: info->fprintf_func (info->stream, "%s", v850_sreg_names[value]); break;
case V850_OPERAND_CC: info->fprintf_func (info->stream, "%s", v850_cc_names[value]); break;
case V850_OPERAND_EP: info->fprintf_func (info->stream, "ep"); break;
- case V850_OPERAND_DISP: info->print_address_func (value + memaddr, info); break;
default: info->fprintf_func (info->stream, "%d", value); break;
-/* start-sanitize-v850e */
+ case V850_OPERAND_DISP:
+ {
+ bfd_vma addr = value + memaddr;
+
+ /* On the v850 the top 8 bits of an address are used by an overlay manager.
+ Thus it may happen that when we are looking for a symbol to match
+ against an address with some of its top bits set, the search fails to
+ turn up an exact match. In this case we try to find an exact match
+ against a symbol in the lower address space, and if we find one, we
+ use that address. We only do this for JARL instructions however, as
+ we do not want to misinterpret branch instructions. */
+ if (operand->bits == 22)
+ {
+ if ( ! info->symbol_at_address_func (addr, info)
+ && ((addr & 0xFF000000) != 0)
+ && info->symbol_at_address_func (addr & 0x00FFFFFF, info))
+ {
+ addr &= 0x00FFFFFF;
+ }
+ }
+ info->print_address_func (addr, info);
+ break;
+ }
+
case V850E_PUSH_POP:
{
- static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
-/* start-sanitize-v850eq */
+ static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
static int list18_h_regs[32] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
static int list18_l_regs[32] = { 3, 2, 1, -2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
-/* end-sanitize-v850eq */
int * regs;
int i;
unsigned long int mask = 0;
switch (operand->shift)
{
case 0xffe00001: regs = list12_regs; break;
-/* start-sanitize-v850eq */
case 0xfff8000f: regs = list18_h_regs; break;
case 0xfff8001f: regs = list18_l_regs; value &= ~0x10; break; /* Do not include magic bit */
-/* end-sanitize-v850eq */
default:
- fprintf (stderr, "unknown operand shift: %x\n", operand->shift );
+ /* xgettext:c-format */
+ fprintf (stderr, _("unknown operand shift: %x\n"), operand->shift );
abort();
}
switch (regs[ i ])
{
default: mask |= (1 << regs[ i ]); break;
-/* start-sanitize-v850eq */
- case 0: fprintf (stderr, "unknown pop reg: %d\n", i ); abort();
+ /* xgettext:c-format */
+ case 0: fprintf (stderr, _("unknown pop reg: %d\n"), i ); abort();
case -1: pc = true; break;
case -2: sr = true; break;
-/* end-sanitize-v850eq */
}
}
}
info->memory_error_func (status, memaddr + bytes_read, info);
}
break;
-/* end-sanitize-v850e */
}
/* Handle jmp correctly. */
{
int status;
bfd_byte buffer[ 4 ];
- unsigned long insn;
+ unsigned long insn = 0;
/* First figure out how big the opcode is. */
/* Make sure we tell our caller how many bytes we consumed. */
return disassemble (memaddr, info, insn);
}
-
-
projects / deliverable / binutils-gdb.git / blobdiff