Don't write to inferior_ptid in target.c

[deliverable/binutils-gdb.git] / sim / aarch64 / ChangeLog

diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog
index f1574a5aed783f80b4f841763cc2e66e87391d66..1b907b94c9c506d50540aca4a2234089ca5db82d 100644 (file)
--- a/sim/aarch64/ChangeLog
+++ b/sim/aarch64/ChangeLog
@@ -1,3 +1,18 @@
+2020-02-06  Carlo Bramini  <carlo_bramini@users.sourceforge.net>
+
+       PR sim/25318
+       * simulator.c (blr): Read destination register before calling
+       aarch64_save_LR.
+
+2019-03-28  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * cpustate.c: Add 'libiberty.h' include.
+       * interp.c: Add 'sim-assert.h' include.
+
+2017-09-06  John Baldwin  <jhb@FreeBSD.org>
+
+       * configure: Regenerate.
+
 2017-04-22  Jim Wilson  <jim.wilson@linaro.org>
 
        * simulator.c (vec_load): Add M argument.  Rewrite to iterate over