#endif
typedef unsigned long ARMword; /* must be 32 bits wide */
+typedef unsigned long long ARMdword; /* Must be at least 64 bits wide. */
typedef struct ARMul_State ARMul_State;
typedef unsigned ARMul_CPInits (ARMul_State * state);
unsigned ErrorCode; /* type of illegal instruction */
ARMword Reg[16]; /* the current register file */
ARMword RegBank[7][16]; /* all the registers */
+ /* 40 bit accumulator. We always keep this 64 bits wide,
+ and move only 40 bits out of it in an MRA insn. */
+ ARMdword Accumulator;
ARMword Cpsr; /* the current psr */
ARMword Spsr[7]; /* the exception psr's */
ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
+ ARMword SFlag;
#ifdef MODET
ARMword TFlag; /* Thumb state */
#endif
const struct Dbg_HostosInterface *hostif;
- int verbose; /* non-zero means print various messages like the banner */
+ unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
+ unsigned is_v5; /* Are we emulating a v5 architecture ? */
+ unsigned is_v5e; /* Are we emulating a v5e architecture ? */
+ unsigned is_XScale; /* Are we emulating an XScale architecture ? */
+ unsigned verbose; /* Print various messages like the banner */
};
#define ResetPin NresetSig
#define LateAbortPin lateabtSig
/***************************************************************************\
-* Types of ARM we know about *
+* Properties of ARM we know about *
\***************************************************************************/
/* The bitflags */
#define ARM_Debug_Prop 0x10
#define ARM_Isync_Prop ARM_Debug_Prop
#define ARM_Lock_Prop 0x20
-
-/* ARM2 family */
-#define ARM2 (ARM_Fix26_Prop)
-#define ARM2as ARM2
-#define ARM61 ARM2
-#define ARM3 ARM2
-
-#ifdef ARM60 /* previous definition in armopts.h */
-#undef ARM60
-#endif
-
-/* ARM6 family */
-#define ARM6 (ARM_Lock_Prop)
-#define ARM60 ARM6
-#define ARM600 ARM6
-#define ARM610 ARM6
-#define ARM620 ARM6
-
+#define ARM_v4_Prop 0x40
+#define ARM_v5_Prop 0x80
+#define ARM_v5e_Prop 0x100
+#define ARM_XScale_Prop 0x200
/***************************************************************************\
* Macros to extract instruction fields *
* Mode and Bank Constants *
\***************************************************************************/
-#define USER26MODE 0L
-#define FIQ26MODE 1L
-#define IRQ26MODE 2L
-#define SVC26MODE 3L
-#define USER32MODE 16L
-#define FIQ32MODE 17L
-#define IRQ32MODE 18L
-#define SVC32MODE 19L
+#define USER26MODE 0L
+#define FIQ26MODE 1L
+#define IRQ26MODE 2L
+#define SVC26MODE 3L
+#define USER32MODE 16L
+#define FIQ32MODE 17L
+#define IRQ32MODE 18L
+#define SVC32MODE 19L
#define ABORT32MODE 23L
#define UNDEF32MODE 27L
+#define SYSTEMMODE 31L
#define ARM32BITMODE (state->Mode > 3)
#define ARM26BITMODE (state->Mode <= 3)
#define ABORTBANK 4
#define UNDEFBANK 5
#define DUMMYBANK 6
+#define SYSTEMBANK USERBANK
+
+#define BANK_CAN_ACCESS_SPSR(bank) \
+ ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
/***************************************************************************\
* Definitons of things in the emulator *